On Mon, Nov 08, 2010 at 09:55:23AM +, Chris Wilson wrote:
> > While, I am not saying I am waiting upstream to receive that patch. I
> > mean we can hold on for a while: I think the trace-event can export
> > some more friendly interface for enabling specified event at module
> > load time. (
--- Begin Message ---
On Mon, 2010-11-08 at 23:24 +, Chris Wilson wrote:
> Commit 219adae1 cached the EDID found during LVDS init, but in the
> process prevented the init routine from discovering the preferred
> fixed-mode for the panel. This was causing us to guess the correct mode,
> which s
Am Montag, den 08.11.2010, 18:08 -0500 schrieb Jon Masters:
[…]
> I tried this, which didn't work. Then I added this (ignore stupid
> evolution formatting - convenient for email backlog, but not mutt):
You can select the corresponding sections and choose preformatted over
normal in the list righ
On Mon, 2010-11-08 at 12:13 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 06:29:09 -0500, Jon Masters
> wrote:
> > On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > > As I mentioned on IRC, I'm familiar with how I2C works electrically, and
> > > therefore EDID implementation as a conce
On Sat, 06 Nov 2010 09:23:06 +, Peter Clifton wrote:
> Fixes corruption with glBufferSubData on my machine,
>
> Can someone review and push?
Looks good. Thanks!
pgpj9dGzySOaO.pgp
Description: PGP signature
___
Intel-gfx mailing list
Intel-gfx@li
On Mon, 2010-11-08 at 12:13 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 06:29:09 -0500, Jon Masters
> wrote:
> > On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > > As I mentioned on IRC, I'm familiar with how I2C works electrically, and
> > > therefore EDID implementation as a conce
> Sent: Wednesday, November 03, 2010 2:06 PM
>
> Looks like an ordinary userspace bo leak. Now you want to start
> instrumenting textures and making sure they are all accounted for.
Equally
> the bug may be in mesa leaking references.
As a followup on this issue,
Texture tracking looks good so
On Mon, 08 Nov 2010 06:29:09 -0500, Jon Masters wrote:
> On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > As I mentioned on IRC, I'm familiar with how I2C works electrically, and
> > therefore EDID implementation as a concept, but I am not really a
> > graphics hacker so I wasn't aware th
On Mon, 2010-11-08 at 11:33 +, James Courtier-Dutton wrote:
> On 8 November 2010 10:54, Jon Masters wrote:
> >
> > Here is the EDID output after booting:
> >
> > [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> > 000 ff00 00ff 6422 03e9 8544 0001
> > 010 141c 03
On Mon, 2010-11-08 at 06:29 -0500, Jon Masters wrote:
> On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> > On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
> >
> > > Here is the EDID output after booting:
> > >
> > > [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> > > 0
On Mon, 2010-11-08 at 11:26 +, James Courtier-Dutton wrote:
> On 8 November 2010 10:27, Chris Wilson wrote:
> > On Mon, 08 Nov 2010 05:18:32 -0500, Jon Masters
> > wrote:
> >> Hi Chris,
> >>
> >> The following patch that you recently committed breaks my ASUS Eee PC
> >> 1015PEM by causing th
On Mon, 2010-11-08 at 06:22 -0500, Jon Masters wrote:
> On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
>
> > Here is the EDID output after booting:
> >
> > [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> > 000 ff00 00ff 6422 03e9 8544 0001
> > 010 141c 0301
On Mon, 2010-11-08 at 05:54 -0500, Jon Masters wrote:
> Here is the EDID output after booting:
>
> [...@monticello ~]$ hexdump /sys/class/drm/card0-LVDS-1/edid
> 000 ff00 00ff 6422 03e9 8544 0001
> 010 141c 0301 1680 780d 860a 9426 5157 2790
> 020 4f21 0054 0101 0101 01
On Mon, 2010-11-08 at 10:27 +, Chris Wilson wrote:
> On Mon, 08 Nov 2010 05:18:32 -0500, Jon Masters
> wrote:
> > Hi Chris,
> >
> > The following patch that you recently committed breaks my ASUS Eee PC
> > 1015PEM by causing the display to be offset by about 1 inch (a few
> > centimeters) wh
On Mon, 08 Nov 2010 05:18:32 -0500, Jon Masters wrote:
> Hi Chris,
>
> The following patch that you recently committed breaks my ASUS Eee PC
> 1015PEM by causing the display to be offset by about 1 inch (a few
> centimeters) when the mode is (re)set during boot. I previously posted
> both photogr
On Mon, 2010-11-08 at 05:18 -0500, Jon Masters wrote:
> The following patch that you recently committed breaks my ASUS Eee PC
> 1015PEM by causing the display to be offset by about 1 inch (a few
> centimeters) when the mode is (re)set during boot. I previously posted
> both photographs and video o
Hi Chris,
The following patch that you recently committed breaks my ASUS Eee PC
1015PEM by causing the display to be offset by about 1 inch (a few
centimeters) when the mode is (re)set during boot. I previously posted
both photographs and video of the problem in another "PROBLEM" thread.
Here is
On Mon, 8 Nov 2010 17:09:42 +0800, Yuanhan Liu
wrote:
> Filter out the read/write of GPIO registers.
I split this into two patches, in case we ever add a second user of the
notrace interface and want to re-enable tracing of the GPIO registers for
any reason.
Applied these to -next, thanks. You
On Mon, 08 Nov 2010 17:23:28 +0800, Yuanhan Liu wrote:
> I just send two patches out, without trace on load patch for
> now(explained at below).
>
> On Mon, 2010-11-08 at 00:03 +0800, Chris Wilson wrote:
> > Oh my, this turns out to be quite hacky indeed...
> >
> > if (i915_trace_on_load) {
> >
I just send two patches out, without trace on load patch for
now(explained at below).
On Mon, 2010-11-08 at 00:03 +0800, Chris Wilson wrote:
> Oh my, this turns out to be quite hacky indeed...
>
> if (i915_trace_on_load) {
> const struct ftrace_event_call enable_list[] = {
> #define EVENT(n
On Mon, 08 Nov 2010 00:19:11 -0800, Eric Anholt wrote:
> I'd rather not unless we find that it does really fix someone.
Moved to -next instead.
Thanks!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@li
Filter out the read/write of GPIO registers.
Signed-off-by: Yuanhan Liu
---
drivers/gpu/drm/i915/i915_drv.h |5 +
drivers/gpu/drm/i915/intel_i2c.c | 25 +
2 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers
Add two tracepoints at I915_WRITE/READ for tracing down all the
register write and read.
Signed-off-by: Yuanhan Liu
---
drivers/gpu/drm/i915/i915_drv.h | 61 -
drivers/gpu/drm/i915/i915_trace.h | 23 ++
2 files changed, 76 insertions(+), 8 de
On Fri, Nov 05, 2010 at 01:02:33PM -0700, Carl Worth wrote:
> This is an intermediate snapshot of ongoing driver development. The
> primary purpose of this snapshot is to capture some recent
> improvements, (particularly in Sandybridge support), for further
> testing.
>
> As always, we look forwar
On Sat, 06 Nov 2010 22:07:40 +, Chris Wilson
wrote:
> On Sat, 6 Nov 2010 14:53:32 -0700, Eric Anholt wrote:
> > This is not known to fix any particular bugs we have, but the spec
> > says to do it, and the BIOS hadn't already set it up on my system.
>
> Whilst you haven't directly identifi
25 matches
Mail list logo
