Help on command overriding

Hello, I would like to accomplish overriding commands without getting the warning "warning: overriding recipe for target". The makefile I'm working with is generated (by automake). I want to override its target commands. Essentially, my Makefile looks like libfoo.la: $(libfoo_la_OBJECTS) $

Re: Command producing several targets at once

Am 26.07.2017 um 09:24 schrieb Sébastien Hinderer: Dear all, OCaml's parser generator, ocamlyacc, produces two files simultaneously. For example, the command ocamlyacc parsermly will produce both parser.ml (the code of the parser) and parser.mli (the interface of the parsing module, descrbing

Re: Proper usage of multiple rules for the same targets

Am 06.09.18 um 14:56 schrieb Paul Smith: On Thu, 2018-09-06 at 08:05 +, Tiphaine Turpin wrote: The static pattern solution looks very nice, thanks. It seems to work fine in the real Makefile. And there is no visible performance impact, as far as I can tell (I'm not sure about how efficiently