Hello,
I would like to accomplish overriding commands without getting the
warning "warning: overriding recipe for target".
The makefile I'm working with is generated (by automake). I want to
override its target commands.
Essentially, my Makefile looks like
libfoo.la: $(libfoo_la_OBJECTS) $(libfoo_la_DEPENDENCIES)
$(EXTRA_libfoo_la_DEPENDENCIES)
$(LINK) [...]
local_targets = libfoo.la
$(local_targets):
$(MAKE) -C .. foo/$@
The default behavior is to ignore the first recipes and only execute the
latter. This is exactly what I want, however make always issues the warning:
Makefile:1219: warning: overriding recipe for target 'libfoo.la'
Makefile:762: warning: ignoring old recipe for target 'libfoo.la'
Is there a better way to do this, or at least a way to disable the
warning (ideally only for the libfoo.la target)?
PS: I know that if I write out "libfoo.la:" verbatim, then automake will
not generate the automatic rules for libfoo.la. However, in my system I
need the indirection via $(local_targets) which automake doesn't evaluate.
Best regards.
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