Thanks Jason
This is a great start and help for me!
On Fri, 29 Oct 2021 at 16:43, Jason Lowe-Power wrote:
> Hi Nitesh,
>
> I don't think there's any good documentation. This may help with Arm SVE
> support, but it's from a while ago. Things have changed since 2018.
> https://community.arm.com/a
Hi Nitesh,
I don't think there's any good documentation. This may help with Arm SVE
support, but it's from a while ago. Things have changed since 2018.
https://community.arm.com/arm-research/b/articles/posts/simulating-the-arm-sve-with-gem5
On Fri, Oct 29, 2021 at 2:27 AM Nitesh Narayana GS
wrot
Hi
Thanks for the information. I will check the code base for that. Do you
have any suggestions for the documentation regarding it ?
Regards
Nitesh
On Thu, 28 Oct 2021 at 17:53, Jason Lowe-Power wrote:
> Hello,
>
> For Arm, gem5 has SVE support and (some/most/all?) of the NEON
> instructions.
Hello,
For Arm, gem5 has SVE support and (some/most/all?) of the NEON
instructions. For x86, we support most 128-bit SIMD instructions, but very
few or no 256-bit or 512-bit SIMD instructions. I have heard of
forks/groups that have implemented many of the x86 vector instructions, and
I have heard
