[gem5-users] Re: Setting up a TLB for Virtual Address to Physical Address translations

Hi Anshul, My research group has recently released a gem5 modification to support page walk (and use of TLB) in syscall emulation mode. You can find it at the following link: https://github.com/mircomannino/gem5/tree/rapido24 The modifications were made only for RISC-V, I don't know which ISA

[gem5-users] Re: TLB statistics riscv

/gem5/gem5/issues/484 Regards, Harshil Patel On Wed, Oct 18, 2023 at 1:40 AM Mirco Mannino via gem5-users wrote: Hi all, I am looking at how the TLB is implemented (riscv ISA). In particular, I am interested in TLB statistics. I noticed that, in the TLB::lokup method

[gem5-users] TLB statistics riscv

Hi all, I am looking at how the TLB is implemented (riscv ISA). In particular, I am interested in TLB statistics. I noticed that, in the TLB::lokup method (https://github.com/gem5/gem5/blob/stable/src/arch/riscv/tlb.cc#L109), there is an input argument (i.e., hidden) which determines whether

[gem5-users] MemoryError: std::bad_alloc error with BFS benchmark

Hi all, I am trying to run BFS benchmark from the GAP benchmark suite (https://github.com/sbeamer/gapbs) using GEM5 SE. If I use an input graph with up to 16 million vertices everything works fine. However, when I use an input graph with more than 16 million vertices I obtain the following err

[gem5-users] Re: SPEC CPU2017 X86 SE mode - instruction 'palignr_Vdq_Wdq_Ib' unimplemented

Hi Eliot and Abitha, After Eliot's advice, I also tried to compile spec using the flags you used, and also "-march=nocona". Unfortunately, inspecting the generated assembly, I see that the "palignr" instruction is always present. I'll update you if I manage to compile the binaries without usi

[gem5-users] SPEC CPU2017 X86 SE mode - instruction 'palignr_Vdq_Wdq_Ib' unimplemented

Hi all, I'm trying to take checkpoints from SimPoints for SPEC CPU 2017 in SE mode. I would like to generate checkpoints for different ISAs (RISCV and X86). So far, I did the following: 1) BBV files created using "qpoints" tool (https://github.com/pranith/qpoints), since "--simpoint-profile"