Re: [gem5-users] restore checkpoint with new m5 command

Joel Thanks very much for the information. I have another question related to checkpointing. There is a m5 opcode checkpoint(delay,period). It is implemented by m5_checkpoint. However, I didn't find the source code of this function. Do you know where I can find it? Basically, I want to know how

[gem5-users] Private L2 Cache

Hi All, I want to create a system with 8 cpus, each with private L1 and L2 cache as well as a shared main memory. I am looking at the code in CacheConfig.py under configs/common/. My question is: I understand I need to make multiple "system.l2" caches. However, do I need to make multiple "sys

[gem5-users] Shall we solve "unable to find destination addr" once for all ?!

Hi I think I found why randomly one receives this error: fatal: Unable to find destination for addr 0xNNN on bus system.membus A workaround for this issue is to increase the memory as discussed in the following posts http://www.mail-archive.com/gem5-users@gem5.org/msg04502.html http://www.mail-ar

Re: [gem5-users] restore checkpoint with new m5 command

Hi Hui, Looking at the do_pin() function in ./util/m5/m5.c, it appears that it doesn't do an upcall into the simulator (i.e. it doesn't try to execute a gem5 pseudo-instruction). As such, the /sbin/m5 pin call must be annotated into the benchmark that you want to run, because there isn't a way t

[gem5-users] running Parsec on X86 with 6 cpus

Hi all, I read the documents about running Parsec with gem5. It says that "to run M5 with more than 4 processors, a modified PAL code must be used". This PAL code is provided in Parsec website for the Alpha architecture. http://www.cs.utexas.edu/~parsec_m5/ However, it is not provided for X86. Does

[gem5-users] Multi-Processor Workload Termination Time

Hello All, I'm running a simulation with two processors. I've noticed that the simulation will tend to finish whenever the first processor finishes computing rather than waiting for both to complete. I would like to collect performance measurements from all possible permutations of 2 workloads fro

[gem5-users] Dumping stats every period of fixed number of instructions

Hi all, I want to dump the statistics periodically based on the fixed number of instructions. I already followed the following post: http://www.mail-archive.com/gem5-users@gem5.org/msg07544.html and this is the code I use in Simulation.py for periodic dumping (this code works in gem5-master vers

Re: [gem5-users] Ruby with OoO CPU

Sorry for the typos! On Thu, Jul 25, 2013 at 2:56 PM, Mahshid Sedghi wrote: > Hi Lu, > > Yes, it works. I am currently using gem5 with Ruby+O3CPU. I run in FS mode > and use X86 ISA. I take checkpoint with timing cpu, and restore from the > checkpoint with the same cpu type, and then switch to O

Re: [gem5-users] Ruby with OoO CPU

Hi Lu, Yes, it works. I am currently using gem5 with Ruby+O3CPU. I run in FS mode and use X86 ISA. I take checkpoint with timing cpu, and restore from the checkpoint with the same cpu type, and then switch to O3cpu to run the benchmarks. I am not sure how it works with other ISAsm, but with x86 is

Re: [gem5-users] Initialize c++ data member from Python

Hi Shao, Thank you so much for your help! I got it to work! Regards, Zheng Wu On 2013-07-25, at 1:04 PM, shaoming wrote: > > Hi Wu： > > I thought the following steps might help you for this modification. > > In the header file of AtomicCPU: add your variable (eg. bool new_member) as > an

Re: [gem5-users] a question about simpoint profiling patch

Meng Wang tupleapes.com> writes: > > Thanks Mitch! Your script does a great favor for me. I think It's very helpful to anyone who wants to reduce the simulation runtime or make the interval analysis more efficiently. Thanks again. > Meng > On Apr 5, 2013, at 6:54 PM, Mitch Hayenga gmail.com>

Re: [gem5-users] Initialize c++ data member from Python

Hi Wu: I thought the following steps might help you for this modification. In the header file of AtomicCPU: add your variable (eg. bool new_member) as an member of this class in the AtomicSimpleCPU.py" file add your parameter (e.g new_python_member= Param.Bool(False,"test a new member") )/

[gem5-users] Initialize c++ data member from Python

Hi All, I've added a new data member to AtomicSimpleCPU and I want to initialize this member in the constructor. However, I want the user to specify the value from the python script and pass this value to the c++ constructor. I am looking at the code and getting quite confused about how this wo

Re: [gem5-users] CPU Configuration

Thanks for your information. May I say it defines an index from which slot in the timeBuffer to get data, like following fromCommit = timeBuffer->getWire(-commitToIEWDelay); I'm still curious what's the content stored in timeBuffer and how it's related to different number of pipe stages. On Wed

[gem5-users] modifying trace messages

Hi Where can I customize the trace messages in the source files? I am executing --debug-flags=Exec --trace-file=trace.out ... -- Regards, Mahmood ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users