[gem5-users] 答复: ruby request latency and L1 miss rate

Hi Nilay, Yes, I've taken a look at the ruby.stats file. I'm a little confused about some naming issues, like: Request_type_LD, request_type_ST and request_type_ATOMIC, what is the difference of them? Also in the ruby.stats file, there is only average network latency which defined as: network_

Re: [gem5-users] ruby request latency and L1 miss rate

On Thu, 23 Aug 2012, Xi Chen wrote: Hi all, I have a question about calculating request latency and L1 data miss rate. My configuration is ALPHA, MESI_directory, 2 level cache, garnet network. When L1 has a miss, it should generate a request and send it into the network, then wait for the resp

[gem5-users] ruby request latency and L1 miss rate

Hi all, I have a question about calculating request latency and L1 data miss rate. My configuration is ALPHA, MESI_directory, 2 level cache, garnet network. When L1 has a miss, it should generate a request and send it into the network, then wait for the response. I wonder is there any place I can

[gem5-users] Embedding parameters in ARM psuedo instructions

In ARM, the parameters to m5 pseudo instructions are written to R0, R1, ... registers because pseudo instructions are defined as global functions. I found out that instead of passing parameters to pseudo instructions through architecture registers, it is possible to embed the parameters in the m5 p

[gem5-users] Question about instruction-based exit events.

Hello, It seems that the number of committed instructions don't always match up with an instruction-based exit event, e.g., when using -I. The CPU's number of committedInsts can sometime be a few more or less than this value. I think I understand why the number can be more, if an exit event is sch

Re: [gem5-users] segmentation fault when creating checkpoints for X86_FS+ruby

Well, whenever I get a segmentation fault with any program, I run it under GDB and figure out where the problem might be. In almost all the cases, this works out well. You might also want to do the same. -- Nilay On Thu, 23 Aug 2012, Cookie wrote: To whom it may concern, I got segmentation

[gem5-users] segmentation fault when creating checkpoints for X86_FS+ruby

To whom it may concern, I got segmentation fault when trying to create checkpoints for X86_FS with ruby. Hereunder are the steps, please tell me if there is anything wrong: 1/ Compile Gem5 with RUBY and MOESI_hammer protocol: $ scons -j4 build/X86/gem5.fast PROTOCOL=MOESI_hammer RUBY=True 2

[gem5-users] How to specify ProcsPerChip(number of processors per chip) when simulating CMPs

Hi, I am trying to simulate MOESI_CMP_directory protocol. But I cannot find out how to specify the parameters of ProcsPerChip. Can anyone advice? Thanks! ___ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users