This is target-dependant part of a two patch series.
Scheduler is free to move stack adjustment throughs
tls_global_dynamic_64 and tls_local_dynamic_base_64 patterns,
misaligning the stack for embedded call to __tls_get_addr.
The patch makes these patterns dependent on SP_REG.
Patch was bootstra
On Tue, Jul 14, 2015 at 6:46 AM, Jeff Law wrote:
> On 07/13/2015 11:03 AM, Uros Bizjak wrote:
>>
>> This is rtl-optimization part of a two-part patch series.
>>
>> As discussed in the PR, we have to prcompute register parameters
>> before stack alignment is perf
On Mon, Jul 13, 2015 at 6:09 PM, H.J. Lu wrote:
> On Sun, Jul 12, 2015 at 10:56 AM, Uros Bizjak wrote:
>> On Sat, Jul 11, 2015 at 9:23 PM, H.J. Lu wrote:
>>> On Thu, Jul 09, 2015 at 01:58:22PM -0700, H.J. Lu wrote:
>>>> On Thu, Jul 09, 2015 at 1
On Wed, Jul 15, 2015 at 1:36 PM, Uros Bizjak wrote:
>> I couldn't figure a way to add conditional constraints for "?r/rmF" and
>> "r/rmF". I simply disabled *movsf_internal if TARGET_HARD_FP_REGS
>> is false and added a new "*movsf_internal_sof
, the
patched gcc compiles the testcase to:
vpextrw $4, %xmm0, %eax
vpxor %xmm0, %xmm0, %xmm0
vpinsrw $5, %eax, %xmm0, %xmm0
ret
Also, ix86_expand_pextr is used in extzv expander for extracts
from vector registers.
2015-07-16 Uros Bizjak
PR target/66866
* c
On Wed, Jul 15, 2015 at 3:37 PM, H.J. Lu wrote:
> On Wed, Jul 15, 2015 at 5:05 AM, Uros Bizjak wrote:
>> On Wed, Jul 15, 2015 at 1:36 PM, Uros Bizjak wrote:
>>
>>>> I couldn't figure a way to add conditional constraints for "?r/rmF" and
>>&g
Hello!
When moving precompute_register_parameters, I didn't notice that the
call was wrapped with NO_DEFER_POP/OK_DEFER_POP.
Attached patch fixes this oversight.
2015-07-17 Uros Bizjak
PR rtl-optimization/66891
* calls.c (expand_call): Wrap precompute_register_parameters
If the target only has integer registers, we don't have to go through
delicately tuned alternatives, balanced between x87 regs, SSE regs and
integer regs. Attached patch introduces simple and effective
alternatives in this case.
Testcases will be provided later by HJ.
2015-07-17 Uros B
On Fri, Jul 17, 2015 at 7:49 PM, H.J. Lu wrote:
> If we put static chain on the stack, we need to replicate it on the stack
> so that static chain can be reached via (argp - 2) slot. This is needed
> for nested function with stack realignment.
>
> OK for trunk if there are no regressions?
>
> H.J
On Thu, Jul 16, 2015 at 12:17 AM, Uros Bizjak wrote:
> Attached patch fixes PR 66866. The problem was in ix86_expand_pinsr,
> where we didn't account for non-lowpart source register and just
> blindly took a SUBREG of it.
Attached patch is the version for release branches. As sugg
No functional changes.
2015-07-18 Uros Bizjak
* config/i386/i386.md (pushsf splitter): Pass curr_insn to
find_constant_src. FAIL if find_constant_src returns NULL_RTX.
(mem->fpreg splitters): Ditto.
(general_operand->nonimmediate_operand splitter): Use explicit
We have to reject misaligned insertions and extractions from
ix86_expand_pextr and ix86_expand_pinsr.
2015-07-18 Uros Bizjak
PR target/66922
* config/i386/i386.c (ix86_expand_pextr): Reject extractions
from misaligned positions.
(ix86_expand_pinsr): Reject insertions to
Attached patch backports fixes for PR 58066 to release branches.
2015-07-XX Uros Bizjak
Backport from mainline:
2015-07-17 Uros Bizjak
PR rtl-optimization/66891
* calls.c (expand_call): Wrap precompute_register_parameters with
NO_DEFER_POP/OK_DEFER_POP to prevent
2015-07-20 Uros Bizjak
* config/i386/i386.c (ix86_md_asm_adjust): Handle DImode dest_mode
for !TARGET_64BIT.
testsuite/ChangeLog:
2015-07-20 Uros Bizjak
* gcc.target/i386/asm-flag-5.c (f_ll): New.
Bootstrapped and regression tested on x86_64-linux-gnu {,m32}.
Committed to
Hello!
> On Fri, Jul 10, 2015 at 06:35:30PM +0200, Mikael Morin wrote:
>> Ping: https://gcc.gnu.org/ml/fortran/2015-06/msg00075.html
>>
>
> Patch looks ok to me.
The new test introduced several testsuite failures, please see e.g. [1]:
UNRESOLVED: gfortran.dg/derived_constructor_comps_6.f90 -O0
Straightforward implementation.
libgcc/ChangeLog:
2015-07-22 Uros Bizjak
PR target/66954
* config/i386/cpuinfo.c (enum processor_features): Add FEATURE_AES.
(get_available_features): Handle FEATURE_AES.
gcc/ChangeLog:
2015-07-22 Uros Bizjak
PR target/66954
* config
On Mon, Jul 20, 2015 at 5:00 PM, Uros Bizjak wrote:
> Attached patch backports fixes for PR 58066 to release branches.
>
> 2015-07-XX Uros Bizjak
>
> Backport from mainline:
> 2015-07-17 Uros Bizjak
>
> PR rtl-optimization/66891
> *
Hello!
This patch rewrites convoluted initialization of
sysv_va_list_type_node and ms_va_list_type_node globals.
2015-07-23 Uros Bizjak
* config/i386/i386.c (ix86_build_builtin_va_list_64): Rename
from ix86_build_builtin_va_list_abi. Handle only 64bit non-MS_ABI
targets here
This patch introduces ADJUST_INSN_LENGTH define to i386.h to increase
the length of the insn when bnd prefix is used.
2015-07-24 Uros Bizjak
PR target/64003
* config/i386/i386.h (ADJUST_INSN_LENGTH): New define.
* config/i386/i386.md (maybe_prefix_bnd): New attribute.
(*jcc_1
... and group them together.
2015-07-24 Uros Bizjak
* config/i386/i386.c (ix86_call_abi_override): Call ix86_function_abi.
(ix86_function_abi): Cleanup.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: config/i386/i386.c
These checks are already present in is_va_list_char_pointer.
2015-07-25 Uros Bizjak
* config/i386/i386.c (ix86_va_start): Remove
unneeded !TARGET_64BIT check.
(ix86_gimplify_va_arg): Ditto.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN
On Sat, Jul 25, 2015 at 1:17 AM, Tom de Vries wrote:
> On 24/07/15 18:29, Uros Bizjak wrote:
>>
>> This patch introduces ADJUST_INSN_LENGTH define to i386.h to increase
>> the length of the insn when bnd prefix is used.
[...]
> Is it possible this causes a buil
_size can be non-zero, but still less
than size_needed.
2015-07-25 Uros Bizjak
PR target/66648
* config/i386/i386.c (ix86_expand_set_or_movmem): Emit main loop
execution guard when min_size is less than size_needed.
testsuite/ChangeLog:
2015-07-25 Uros Bizjak
PR target/
This patch fixes/improves check for valid insn in newly introduced
ADJUST_INSN_LENGTH.
(Please note that other targets (e.g. aarch64) needs similar fix. MIPS
could use NONDEBUG_INSN_P instead of INSN_P there.)
2015-07-25 Uros Bizjak
PR target/67004
* config/i386/i386.h
2015-07-25 Uros Bizjak
* config/i386/i386.c: Use SUBREG_P predicate.
* config/i386/i386.md: Ditto.
* config/i386/sse.md: Ditto.
* config/i386/predicates.md: Ditto.
Bootstrapped on x86_64-linux-gnu, committed to mainline SVN.
Uros.
Index: config/i386/i386.c
2015-07-26 Uros Bizjak
* config/alpha/alpha.c: Use SUBREG_P predicate.
* config/alpha/predicates.md: Ditto.
Bootstrapped and regression tested on alpha-linux-gnu.
Committed to mainline SVN.
Uros.
Index: config/alpha/alpha.c
2015-07-26 Uros Bizjak
* gcc.target/alpha/pr66140.c (lpfc_bg_setup_bpl): Use unsigned
immediates to avoid shift-overflow warnings.
Tested on alpha-linux-gnu and committed to mainline SVN.
Uros.
Index: ChangeLog
On Mon, Jul 27, 2015 at 2:46 PM, Petr Murzin wrote:
> Hello,
> This patch converts mask type for masked builtins from signed to
> unsigned. Furthermore, several redundant builtins definitions were
> removed. Please have a look. It it ok for trunk?
I gave the patch a quick look and didn't find any
Attached patch rewrites GFC_DTYPE_SIZE_MASK definition to avoid "left
shift of negative value" warning. during ligfortran build.
2015-07-29 Uros Bizjak
PR libgfortran/66650
* libgfortran.h (GFC_DTYPE_SIZE_MASK): Rewrite to avoid
"left shift of negative
Hello!
> I submit the PR64921 fix I posted two days ago on bugzilla.
>
> The problem comes from the finalization wrapper not having the
> always_explicit attribute set, so
> that when it is called, the array argument is passed without descriptor, but
> the argument
> declaration is a descriptor
On Thu, Jul 30, 2015 at 6:01 PM, Renlin Li wrote:
> Hi Uros,
>
> You seems committing the test case in the wrong directory. I found it
> in testsuite/gcc.target/pr66648.c.
Thanks, I have moved the test to the correct place.
Uros.
On Thu, Jul 30, 2015 at 8:41 PM, H.J. Lu wrote:
> On Tue, Jul 21, 2015 at 02:45:39PM -0700, H.J. Lu wrote:
>> When __builtin_frame_address is used to retrieve the address of the
>> function stack frame, the frame pointer is always kept, which wastes one
>> register and 2 instructions. For x86-32,
Hello!
> 2015-07-30 Kyrylo Tkachov
>
> * ifcvt.c (noce_try_store_flag_constants): Make logic of the case
> when diff == STORE_FLAG_VALUE or diff == -STORE_FLAG_VALUE more
> explicit. Prefer to add the flag whenever possible.
> (noce_process_if_block): Try noce_try_store_flag_co
On Mon, Aug 3, 2015 at 3:02 PM, Kyrill Tkachov wrote:
>
> On 03/08/15 13:33, Uros Bizjak wrote:
>>
>> Hello!
>>
>>> 2015-07-30 Kyrylo Tkachov
>>>
>>> * ifcvt.c (noce_try_store_flag_constants): Make logic of the case
>>> whe
On Mon, Aug 3, 2015 at 3:02 PM, Kyrill Tkachov wrote:
>
> On 03/08/15 13:33, Uros Bizjak wrote:
>>
>> Hello!
>>
>>> 2015-07-30 Kyrylo Tkachov
>>>
>>> * ifcvt.c (noce_try_store_flag_constants): Make logic of the case
>>> whe
On Mon, Aug 3, 2015 at 3:43 PM, Kyrill Tkachov wrote:
>
> On 03/08/15 14:37, Uros Bizjak wrote:
>>
>> On Mon, Aug 3, 2015 at 3:02 PM, Kyrill Tkachov
>> wrote:
>>>
>>> On 03/08/15 13:33, Uros Bizjak wrote:
>>>>
>>>> Hello!
&
On Mon, Aug 3, 2015 at 5:37 PM, Kyrill Tkachov wrote:
>> Looking at the x86 movcc expansion code (ix86_expand_int_movcc) I
>> don't think this is a good idea. In the expander, there is already
>> quite some target-dependent code that goes great length to utilize sbb
>> insn as much as possible, b
On Mon, Aug 3, 2015 at 7:20 PM, Kyrill Tkachov wrote:
> Looking at the x86 movcc expansion code (ix86_expand_int_movcc) I
> don't think this is a good idea. In the expander, there is already
> quite some target-dependent code that goes great length to utilize sbb
> insn as much as
On Mon, Aug 3, 2015 at 11:14 PM, FX wrote:
> The attached patch extends the IEEE modules to all floating-point kinds. Last
> time, when I added IEEE support, I restricted it to the float and double
> types (real kinds 4 and 8), to be extra safe. After discussion with Uros
> Biz
On Mon, Aug 3, 2015 at 11:14 PM, FX wrote:
> The attached patch extends the IEEE modules to all floating-point kinds. Last
> time, when I added IEEE support, I restricted it to the float and double
> types (real kinds 4 and 8), to be extra safe. After discussion with Uros
> Biz
Following patch substantially improves generated code for
get_fpu_trap_exceptions, reducing insn count from 31 to 9.
2015-08-04 Uros Bizjak
* config/fpu-387.h (get_fpu_trap_exceptions): Add temporary variable
to improve generated code.
Bootstrapped and regression tested on x86_64
On Tue, Aug 4, 2015 at 1:58 PM, Kirill Yukhin wrote:
> Hello,
> I've merged ptest insn patterns from AVX and SSE.
> I've also extended mode iterator to allow any 128/256 bit mode
> for the insn as it register-wide, which may help implementing
> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02788.h
On Tue, Aug 4, 2015 at 1:47 PM, Kirill Yukhin wrote:
> Hello,
>
> For vec_dup and vec_concat patterns (of v2df mode) second operand
> is of scalar mode, so `ix86_hard_regno_mode_ok’ didn’t block EVEX registers,
> of non-512b modes (when AVX-512VL is turned off).
> This turns into 128/256b xmm[>15]
On Tue, Aug 4, 2015 at 2:15 PM, Richard Biener wrote:
>> This patch adds scatter support for vectorizer (for AVX512F
>> instructions). Please have a look. Is it OK for trunk?
>
> +/* Target builtin that implements vector scatter operation. */
> +DEFHOOK
> +(builtin_scatter,
> + "",
> + tree,
> +
line 319.
2015-08-04 Uros Bizjak
* texi2pod.pl: Escape braces in regexp involving @strong{...}.
Bootstrapped on Fedora 22 and committed to mainline SVN.
Uros.
Index: texi2pod.pl
===
--- texi2pod.pl (revision 226581)
+++ te
On Wed, Aug 5, 2015 at 10:07 AM, Kirill Yukhin wrote:
> Hello,
>
> Is it ok to backport the patch to gcc-5-branch?
A minor attribute fix is needed, please update type attribute of
*vec_concatv2df for added alternatives, also for mainline.
Otherwise, the patch looks safe, so OK for backport after
On Thu, Aug 6, 2015 at 9:27 AM, Uros Bizjak wrote:
>> Is it ok to backport the patch to gcc-5-branch?
>
> A minor attribute fix is needed, please update type attribute of
> *vec_concatv2df for added alternatives, also for mainline.
Fixed in mainline with the following patch:
2
think
the test could be used as a negative test for
ieee_support_underflow_control.
2015-08-06 Uros Bizjak
PR fortran/64022
* gfortran.dg/ieee/large_4.f90: New test.
Tested on x86_64-linux-gnu {,-m32} and alphaev68-linux-gnu.
OK for m
2015-09-15 Uros Bizjak
* config/alpha/alpha.c (alpha_expand_block_clear): Use
HOST_WIDE_INT_M1U instead of ~(HOST_WIDE_INT)0 when shifting.
Bootstrapped and regression tested on alpha-linux-gnu.
Committed to mainline SVN.
Uros.
Index: config/alpha/alpha.c
xstrndup to create permanent copy of string on the heap. This will
however create a small leak, as this copy is never deallocated.
There is no test infrastructure to check for memory errors, so there
is no testcase added.
2015-09-15 Uros Bizjak
PR target/67484
* config/i386/i386.c
cture to check for memory errors, so there
>> is no testcase added.
>>
>> 2015-09-15 Uros Bizjak
>>
>> PR target/67484
>> * config/i386/i386.c (ix86_valid_target_attribute_tree):
>> Use xstrdup to copy option_strings to opts->x_ix86_arch
Hello!
When expanding __bultin_eh_return, its address pointers can degrade to
a modeless constant. Use copy_addr_to_reg to always give temporary
register a Pmode.
2015-09-18 Uros Bizjak
PR middle-end/67619
* except.c (expand_builtin_eh_return): Use copy_addr_to_reg to copy
the
On Sat, Sep 19, 2015 at 2:32 PM, Andreas Schwab wrote:
> Uros Bizjak writes:
>
>> PR middle-end/67619
>> * gcc.dg/torture/pr67619.c: New test.
>
> On ia64:
>
> FAIL: gcc.dg/torture/pr67619.c -O0 (test for excess errors)
> Excess errors:
> /usr/
On Mon, Sep 21, 2015 at 12:50 PM, Kirill Yukhin wrote:
> Hello Uroš,
>
> This simple patch fixes mode (to iterator) in
> splitter for `not-xor' logic.
>
> Bootstrapped & reg-tested on trunk.
>
> Is it ok for trunk?
>
> Is it ok for gcc-5-branch? (if tested accordingly)
OK everywhere. Looks obviou
On Mon, Sep 21, 2015 at 4:27 PM, Kirill Yukhin wrote:
> Hello,
> This patch fixes operands in kunpck[hi|si|di] insn patterns.
> Bootstrapped (regtesting in progress).
>
> gcc/
> * gcc/config/i386/i386.md (define_insn "kunpckhi"): Fix
> operand in pattern.
> (define_insn "ku
On Mon, Sep 21, 2015 at 4:27 PM, Jakub Jelinek wrote:
> On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote:
>> Hello,
>> This patch introduces switches necessary for new Intel Server CPU
>> (code-named Skylake).
>>
>> Bootstrapped & regtested.
>>
>> Is it ok for trunk?
>>
>> gcc/
>>
On Mon, Sep 21, 2015 at 6:57 PM, Kirill Yukhin wrote:
> Hi Uroš, Jakub,
> eOn 21 Sep 16:27, Jakub Jelinek wrote:
>> On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote:
>> > Hello,
>> > This patch introduces switches necessary for new Intel Server CPU
>> > (code-named Skylake).
>> >
>> >
On Tue, Sep 22, 2015 at 11:31 AM, Kirill Yukhin wrote:
> Hello Uroš,
> On 21 Sep 19:19, Uros Bizjak wrote:
>> On Mon, Sep 21, 2015 at 6:57 PM, Kirill Yukhin
>> wrote:
>> > Patch in the bottom. Is it ok?
>>
>> Comments inline.
>>
>> > -nativ
On Tue, Sep 22, 2015 at 5:14 PM, Kirill Yukhin wrote:
> Hello,
> Patch in the bottom fixes iterator for k insns
> since QI mode is only available for AVX-512DQ.
>
> It also adds support for kshift[rl][bwdq]. This patterns
> will be used for mask load/store autogeneration on which
> Ilya Enkovich i
On Wed, Sep 23, 2015 at 12:19 PM, Ilya Enkovich wrote:
> On 14 Sep 17:50, Uros Bizjak wrote:
>>
>> +(define_insn_and_split "*zext_doubleword"
>> + [(set (match_operand:DI 0 "register_operand" "=r")
>> + (zero_extend:DI (match_operand:SWI
Hello!
Now that PR 57195 (Mode attributes with specific mode iterator can not
be used as mode iterators in *.md files) [1] is fixed, we can merge
*vec_extract_zext patterns.
2015-09-27 Uros Bizjak
* config/i386/predicates.md (register_sse4nonimm_operand): New
predicate.
* config
.
We already have a check for non-zero double value in place for unsafe
math mode. Attached patch adds additional tests that guarantee that
float and long double values are non-zero before signbit tests.
2015-09-29 Uros Bizjak
* gcc.dg/tg-tests.h (foo_1) [UNSAFE]: Also check if f and ld are
Hello!
> My recenttly introduced STV pass doesn't skip debug instructions and it
> causes transformation
> (mistly cost computation) depending on debug info. It causes bootstrap
> comparison failure. This
> patch fixes. Bootstrapped for i686-linux. Testing for
> x86_64-unknown-linux-gnu{,m3
On Wed, Sep 30, 2015 at 12:05 PM, Kumar, Venkataramanan
wrote:
> Hi Maintainers,
>
> The attached patch enables -march=znver1 (AMD family 17h Zen processor).
>
> Costs and tunings are copied from bdver4, but we will be adjusting them
> later for znver1.
> Also a basic scheduler description for z
arget/i386 directory.
The patch solves:
UNRESOLVED: gcc.target/i386/pr65105-1.c scan-assembler por
UNRESOLVED: gcc.target/i386/pr65105-1.c scan-assembler pand
2015-10-01 Uros Bizjak
* gcc.target/i386/pr65105-1.c: Require sse2 effective target.
(main): Rename to sse2_test. Abort if count
On Thu, Oct 1, 2015 at 2:37 PM, Yulia Koval wrote:
> Hi,
>
> The patch below contains some tuning changes for Lakemont, introduced
> by H.J. Lu. Bootstraped/regtested for Linux/x86_64. Ok for trunk?
>
> * gcc/config/i386/x86-tune.def (X86_TUNE_USE_BT): Enable
> for Lakemont.
>
Hello!
There is no point to use -fshort-double on x86 targets, although it
works with -mno-sse, where it avoids construction of DFmode based
vector builtins.
So, disable non-sensical test on all x86 targets.
2015-10-01 Uros Bizjak
* gcc.dg/lto/pr55113_0.c: Skip on all x86 targets
On Thu, Oct 1, 2015 at 2:24 AM, H.J. Lu wrote:
> On Wed, Sep 30, 2015 at 12:53 PM, Yulia Koval wrote:
>> Done.
>>
>
> + /* If true, the current function is an interrupt service
> + routine as specified by the "interrupt" attribute. */
> + BOOL_BITFIELD is_interrupt : 1;
> +
> + /* If true
On Thu, Oct 1, 2015 at 6:08 PM, H.J. Lu wrote:
> On Thu, Oct 1, 2015 at 8:59 AM, Uros Bizjak wrote:
>> On Thu, Oct 1, 2015 at 2:24 AM, H.J. Lu wrote:
>>> On Wed, Sep 30, 2015 at 12:53 PM, Yulia Koval wrote:
>>>> Done.
>>>>
>>>
>>>
On Fri, Oct 2, 2015 at 2:51 PM, Yulia Koval wrote:
> Hi,
> Here is a new patch. Added HJ's changes and review changes.
>
> Implement x86 interrupt attribute
+ incoming_stack_boundary
+ = (crtl->parm_stack_boundary > ix86_incoming_stack_boundary
+ ? crtl->parm_stack_boundary : ix86_incoming
offset = (offset + stack_alignment_needed) & -stack_alignment_needed;
+offset = ROUND_UP (offset, stack_alignment_needed);
[...]
-offset = (offset + stack_alignment_needed - 1) & -stack_alignment_needed;
+offset = ROUND_UP (offset, stack_alignment_needed);
2015-
On Fri, Oct 2, 2015 at 6:12 PM, Kirill Yukhin wrote:
> Hello,
>
> Patch in the bottom introduces cpuid detection
> for Skylake CPU supporting AVX-512.
>
> Bootstrapped. Changed test pass. Is it ok for trunk?
>
> libgcc/
> * libgcc/config/i386/cpuinfo.c (get_intel_cpu): Detect
> "skylake-a
On Sun, Oct 4, 2015 at 7:23 AM, Yulia Koval wrote:
> Hi,
>
> Here is the last version of the patch. Regtested/bootstraped for
> Linux/i686 and Linux/x86_64.
>
> Date: Fri, 4 Sep 2015 08:53:23 -0700
> Subject: [PATCH] Implement x86 interrupt attribute
>
> The interrupt and exception handlers are ca
On Sun, Oct 4, 2015 at 8:46 AM, Kumar, Venkataramanan
wrote:
> GCC bootstrap completed with and without -march=znver1.
> Ok for trunk after completing gcc regression tests ?
>
> ChangeLog:
> * config.gcc (i[34567]86-*-linux* | ...): Add znver1.
> (case ${target})
cted with
>
> /* { dg-require-effective-target avx512bw } */
You are correct. Fixed by attached patch.
2015-10-04 Uros Bizjak
* gcc.target/i386/vect-pack-trunc-1.c: Require avx512bw
effective target.
* gcc.target/i386/vect-pack-trunc-2.c: Ditto.
* gcc.target/i386/vect-per
Hello!
Attached patch tightens the check for general purpose register in
prologue and epilogue register save/restore functions. These functions
handle GP regs exclusively.
2015-10-04 Uros Bizjak
* config/i386/i386.c (ix86_nsaved_regs): Use GENERAL_REGNO_P to
check for general
de is also a good punishment for
rogue application :)
2015-10-04 Uros Bizjak
* config/i386/i386.c (ix86_option_override_internal): Lower minimum
allowed incoming stack boundary to 3 also for 64bit SSE targets.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66697
[2] https://bugs.
This PR was fixed by [1]. This patch adds the testcase from PR that
failed on x86 target for the same reason.
2015-10-04 Uros Bizjak
PR rtl-optimization/67447
* gcc.target/i386/pr67447.c: New test.
Tested on x86_64-linux-gnu {,-m32} and committed to mainline SVN.
[1] https
On Sun, Oct 4, 2015 at 8:15 PM, H.J. Lu wrote:
>> Looking a bit deeper into the code, it looks that we want to realign
>> the stack in the interrupt handler. Let's assume that interrupt
>> handler is calling some other function that saves SSE vector regs to
>> the stack. According to the x86 ABI,
On Sun, Oct 4, 2015 at 10:51 PM, H.J. Lu wrote:
> On Sun, Oct 4, 2015 at 1:00 PM, Uros Bizjak wrote:
>> On Sun, Oct 4, 2015 at 8:15 PM, H.J. Lu wrote:
>>
>>>> Looking a bit deeper into the code, it looks that we want to realign
>>>> the stack in t
On Mon, Oct 5, 2015 at 1:17 AM, H.J. Lu wrote:
>> Looking a bit deeper into the code, it looks that we want to realign
>> the stack in the interrupt handler. Let's assume that interrupt
>> handler is calling some other function that saves SSE vector regs to
>> the stack. According
On Mon, Oct 5, 2015 at 5:54 PM, Alexander Fomin
wrote:
> This patch addresses PR target/67849. Given a machine that does not
> support AVX512VL, following "else" branch for vec_exract_lo insn
> may result in a split using YMMs from upper-bank, hence invalid
> assembly. Tuning define_insn pattern a
On Sun, Oct 4, 2015 at 5:26 PM, Uros Bizjak wrote:
> As shown in PR 66697 [1] and WineHQ bug [2], an application can
> misalign incoming stack to less than ABI mandated 16 bytes. While it
> is possible to use -mincoming-stack-boundary=2 (= 4 bytes) for 32 bit
> targets to emit stack
On Tue, Oct 6, 2015 at 9:09 AM, Kirill Yukhin wrote:
> Hello Uroš,
>
> I've merged two patches together and rebased it
> on top of gcc-5-branch. The only change I made compared
> to trunk version is scheduling set to CPU_NEHALEM since
> CPU_HASWELL is not supported in gcc-5.
>
> Bootstrapped.
>
>
On Tue, Oct 6, 2015 at 3:36 PM, Kirill Yukhin wrote:
> Hello,
> Patch in the bottom adds missing options to libgcc/config/i386/cpuinfo.c
> It also updates documentation.
> As far as number of entries exceeded 32, I've extended
> type of features array to INT64 (most suspicious part of the patch).
On Thu, Oct 1, 2015 at 4:49 PM, Marek Polacek wrote:
> Joseph reminded me that I had forgotten about this patch. As mentioned
> here <https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01792.html>, I'm
> removing the XFAILs in the tests so people are likely to see new FAILs.
201
On Mon, Oct 5, 2015 at 7:33 PM, Uros Bizjak wrote:
>> As shown in PR 66697 [1] and WineHQ bug [2], an application can
>> misalign incoming stack to less than ABI mandated 16 bytes. While it
>> is possible to use -mincoming-stack-boundary=2 (= 4 bytes) for 32 bit
>&g
On Wed, Oct 7, 2015 at 10:53 AM, Richard Biener wrote:
>> >>> > > Since targetm.expand_to_rtl_hook may be called to switch ABI, it
>> >>> > > should
>> >>> > > be called for each function before expanding to RTL. Otherwise, we
>> >>> > > may
>> >>> > > use the stale information from compilatio
On Tue, Oct 6, 2015 at 5:15 PM, Uros Bizjak wrote:
> On Tue, Oct 6, 2015 at 3:36 PM, Kirill Yukhin wrote:
>> Hello,
>> Patch in the bottom adds missing options to libgcc/config/i386/cpuinfo.c
>> It also updates documentation.
>> As far as number of entries exceeded 3
On Wed, Oct 7, 2015 at 3:26 PM, H.J. Lu wrote:
> Define x86 CALL_USED_REGISTERS_MASK used on x86 CALL_USED_REGISTERS.
> OK for trunk?
>
> H.J.
> * config/i386/i386.c (ix86_conditional_register_usage): Use
> CALL_USED_REGISTERS_MASK.
> * config/i386/i386.h (CALL_USED_REGISTE
On Thu, Oct 8, 2015 at 7:14 AM, Kirill Yukhin wrote:
> Hello,
> On 06 Oct 15:09, Kirill Yukhin wrote:
>> > > This caused:
>> > >
>> > > FAIL: gcc.target/i386/vect-perm-odd-1.c (test for excess errors)
>> > >
>> > > on gcc-5-branch.
>> > >
>> >
>> > vect-perm-odd-1.s: Assembler messages:
>> > vect-
On Thu, Oct 8, 2015 at 7:12 AM, Kirill Yukhin wrote:
> Hi Uroš,
> On 06 Oct 17:15, Uros Bizjak wrote:
>> On Tue, Oct 6, 2015 at 3:36 PM, Kirill Yukhin
>> wrote:
>> > Hello,
>> > Patch in the bottom adds missing options to libgcc/config/i386/cpuinfo.c
>>
Hello!
Attached patch documents new functionality in gcc-6 release notes.
OK for GCC docs?
Uros.
Index: htdocs/gcc-6/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
retrieving revision 1.34
diff -r1.34 change
On Thu, Oct 8, 2015 at 8:29 PM, H.J. Lu wrote:
> There is is no point to round up the SSE register save area to 16 bytes if
> the incoming stack boundary is less than 16 bytes.
>
> OK for trunk?
OK, with the improved comment:
/* The only ABI that has saved SSE registers (Win64) also has a
On Fri, Oct 9, 2015 at 11:50 AM, Kumar, Venkataramanan
wrote:
> Hi Uros,
>
> Please find below patch that adds bdver4 target for multi versioning.
> Also I while computing model, the extended_model is incorrectly left shifted
> by 4. I have removed it now.
>
> Is below patch Ok for trunk ?
> GCC
Hello!
No functional changes.
2015-10-09 Uros Bizjak
* config/i386/i386.c
(expand_set_or_movmem_prologue_epilogue_by_misaligned_moves): Use
ROUND_DOWN where applicable.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32},
committed to mainline SVN:
Uros.
Index
2015-10-11 Uros Bizjak
* config/alpha/alpha.h (ALPHA_ROUND): Implement using ROUND_UP macro.
Bootstrapped and regression tested on alphaev68-linux-gnu, committed
to mainline SVN.
Uros
Index: config/alpha/alpha.h
Fairly trivial patch that introduces no functional changes.
2015-10-12 Uros Bizjak
* config/rs6000/rs6000.h (RS6000_ALIGN): Implement using
ROUND_UP macro.
* config/rs6000/rs6000.c (rs6000_darwin64_record_arg_advance_flush):
Use ROUND_UP and ROUND_DOWN macros where applicable
Remove private definitions and use equivalent global macros instead.
2015-10-12 Uros Bizjak
* config/aarch/aarch64.h (AARCH64_ROUND_UP): Remove.
(AARCH64_ROUND_DOWN): Ditto.
* config/aarch64/aarch64.c: Use ROUND_UP instead of AARCH64_ROUND_UP.
Tested by building a crosscompiler
WORD in stack alignment calculation
/* Always preserve double-word alignment. */
- offset = (offset + 8) & -8;
+ offset = ROUND_UP (offset, 8);
The one above looks like off-by-one bug, but this needs a confirmation.
2015-10-12 Uros Bizjak
* config/sparc/sparc.h (
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