On 01/06/16 14:44, Evandro Menezes wrote:
Hi, Wilco.
On 01/06/2016 06:04 AM, Wilco Dijkstra wrote:
Here's what I had in mind when I inquired about distinguishing FCMP
from
FCCMP. As you can see in the patch, Exynos is the only target that
cares about it, but I wonder if ThunderX or
Hi, James.
On 01/21/16 03:24, James Greenhalgh wrote:
On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote:
On 01/06/2016 06:04 AM, Wilco Dijkstra wrote:
Here's what I had in mind when I inquired about distinguishing FCMP from
FCCMP. As you can see in the patch, Exynos is the
On 01/21/16 13:58, Evandro Menezes wrote:
Hi, James.
On 01/21/16 03:24, James Greenhalgh wrote:
On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote:
On 01/06/2016 06:04 AM, Wilco Dijkstra wrote:
Here's what I had in mind when I inquired about distinguishing
FCMP from
FCCMP
On 01/21/16 16:07, James Greenhalgh wrote:
On Thu, Jan 21, 2016 at 01:58:31PM -0600, Evandro Menezes wrote:
Hi, James.
On 01/21/16 03:24, James Greenhalgh wrote:
On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote:
On 01/06/2016 06:04 AM, Wilco Dijkstra wrote:
Here's what
hanks,
James
---
2016-01-25 James Greenhalgh
* config/aarch64/aarch64.md
(arch64_sqrdmlh_lane): Fix register
constraints for operand 3.
(aarch64_sqrdmlh_laneq): Likewise.
LGTM
--
Evandro Menezes
On 01/22/16 07:52, Wilco Dijkstra wrote:
On 12/16/2015 03:30 PM, Evandro Menezes wrote:
On 10/30/2015 05:24 AM, Marcus Shawcroft wrote:
On 20 October 2015 at 00:40, Evandro Menezes
wrote:
In the existing targets, it seems that it's always faster to zero
up
On 01/08/16 16:55, Evandro Menezes wrote:
On 12/16/2015 02:11 PM, Evandro Menezes wrote:
On 12/16/2015 05:24 AM, Richard Earnshaw (lists) wrote:
On 15/12/15 23:34, Evandro Menezes wrote:
On 12/14/2015 05:26 AM, James Greenhalgh wrote:
On Thu, Dec 03, 2015 at 03:07:43PM -0600, Evandro Menezes
On 01/21/16 16:55, Evandro Menezes wrote:
On 01/21/16 16:07, James Greenhalgh wrote:
On Thu, Jan 21, 2016 at 01:58:31PM -0600, Evandro Menezes wrote:
Hi, James.
On 01/21/16 03:24, James Greenhalgh wrote:
On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote:
On 01/06/2016 06:04 AM
und, probably exacerbating
the performance penalty.
I'd like to try to split this tuning option into one for SP and another
for DP. Thoughts?
Thank you,
--
Evandro Menezes
On 02/15/16 04:53, James Greenhalgh wrote:
On Thu, Jan 21, 2016 at 04:55:40PM -0600, Evandro Menezes wrote:
Got it.
Let me try this again:
Add support for the FCCMP insn types
2016-01-21 Evandro Menezes
gcc/
* config/aarch64/aarch64.md (fccmp): Change insn type
On 02/16/16 04:28, James Greenhalgh wrote:
On Mon, Feb 15, 2016 at 11:24:53AM -0600, Evandro Menezes wrote:
James,
There seem to be SPEC CPU2000fp validation issues on A57 when this
flag is present too. Though I evaluated the algorithm with a huge
random set of values, always delivering
On 12/08/15 15:35, Evandro Menezes wrote:
Emit square root using the Newton series
2015-12-03 Evandro Menezes
gcc/
* config/aarch64/aarch64-protos.h (aarch64_emit_swsqrt):
Declare new
function.
* config/aarch64/aarch64-simd.md (sqrt2): New
On 12/10/15 04:30, Kyrill Tkachov wrote:
On 09/12/15 18:50, Evandro Menezes wrote:
On 12/09/2015 11:16 AM, Kyrill Tkachov wrote:
On 09/12/15 17:02, Kyrill Tkachov wrote:
On 09/12/15 16:59, Evandro Menezes wrote:
On 12/09/2015 10:52 AM, Kyrill Tkachov wrote:
Hi Evandro,
On 08/12/15 21:35
Minor tweaks to the cost and scheduling models for Exynos M1.
Committed as r233646 and r233647.
--
Evandro Menezes
>From ab6127823e706361315f1c8b87fb4c32bc299b65 Mon Sep 17 00:00:00 2001
From: evandro
Date: Tue, 23 Feb 2016 20:21:23 +
Subject: [PATCH 1/2] * gcc/config/aarc
On 02/26/16 06:37, Wilco Dijkstra wrote:
Evandro Menezes wrote:
I have a question though: is it necessary to add the "fp" and "simd"
attributes to both movsf_aarch64 and movdf_aarch64 as well?
You need at least the "simd" attribute, but providing "fp&qu
On 02/26/16 08:59, James Greenhalgh wrote:
On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote:
In preparation for the patch adding the Newton series also for
square root, I'd like to propose this patch changing the name of the
existing tuning flag for the reciprocal square
On 02/26/16 17:42, Evandro Menezes wrote:
On 02/26/16 08:59, James Greenhalgh wrote:
On Mon, Feb 22, 2016 at 06:50:44PM -0600, Evandro Menezes wrote:
In preparation for the patch adding the Newton series also for
square root, I'd like to propose this patch changing the name of the
exi
On 02/29/16 12:07, Wilco Dijkstra wrote:
Evandro Menezes wrote:
Please, verify the new "simd" and "fp" attributes for SF and DF.
Both movsf and movdf should be:
(set_attr "simd" "*,yes,*,*,*,*,*,*,*,*")
(set_attr "fp" "*,*,*,yes,yes
On 03/01/16 13:02, Wilco Dijkstra wrote:
Evandro Menezes wrote:
The meaning of these attributes are not clear to me. Is there a
reference somewhere about which insns are FP or SIMD or neither?
The meaning should be clear, "fp" is a floating point instruction, "simd" a
SI
On 02/16/16 14:56, Evandro Menezes wrote:
On 12/08/15 15:35, Evandro Menezes wrote:
Emit square root using the Newton series
2015-12-03 Evandro Menezes
gcc/
* config/aarch64/aarch64-protos.h (aarch64_emit_swsqrt):
Declare new
function.
* config
perhaps be good enough.
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
> Behalf Of Dr. Philipp Tomsich
> Sent: Monday, June 29, 2015 6:45
> To: James Greenha
n a single
series iteration for both SP and DP to achieve a precise enough result.
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
> Behalf Of Dr. Philipp Tomsich
>
series is faster only for the reciprocal for sqrtf().
There might still be some leg for this patch in real-world cases which I'd like
to investigate.
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [
Hi, Venkat.
Since x^1/2 = x * x^-1/2, the Newton series can also be used for the regular
square root with an extra multiplication, as it is done in x86. That's what I
was trying to estimate below.
Cheers,
--
Evandro Menezes Austin, TX
> -Original
Hi, Benedikt.
Please, see below.
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On
> Behalf Of Benedikt Huber
> Sent: Friday, July 17, 2015 10:44
> To: gcc-patc
Or rather, have an additional tuning/selection flag that a core may choose to
make -mrecip the default with -ffast-math.
Cheers,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: Andrew Pinski [mailto:pins...@gmail.com]
> Sent: Saturday
Hi, Benedikt.
It looks pretty good. I'd just hesitate to go about defining which cores
benefit from this by default, IIUC.
Cheers,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc
types neon_ldp{,_q} and neon_stp{,_q} apart
from the current neon_load2_2reg_q and neon_store2_2reg_q types,
respectively.
Thank you,
--
Evandro Menezes
>From 340249dcd2af8dfce486cb4f62d4eaf285c6a799 Mon Sep 17 00:00:00 2001
From: Evandro Menezes
Date: Mon, 28 Sep 2015 15:00:00 -0500
Subject
It's been committed as 228253.
Thank y'all for playing.
Cheers,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: Kyrill Tkachov [mailto:kyrylo.tkac...@arm.com]
> Sent: Tuesday, September 29, 2015 4:01
> To: Marcus Shawcroft
to those machines.
Thank you,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
> Behalf Of Ramana Radhakrishnan
> Sent: Tuesday, September 29, 2015 19:47
> To: Evandr
LGTM
--
Evandro Menezes
On 01/02/1970 09:27 PM, Benedikt Huber wrote:
This sixth revision of the patch:
* Cleans up style issues.
* Makes test conform to standards.
Ok for check in.
Benedikt Huber (1):
2015-10-02 Benedikt Huber
Philipp Tomsich
gcc/ChangeLog
vi %d0, %1" to type "neon_move"
* "fmov %s0, wzr" to type "f_mcr"
* "mov %0, {-1,1}" to type "mov_imm"
Please, commit if it's alright.
Thank you,
--
Evandro Menezes
>From 7e7057bf65befca9ff24ab2401bc2ce84a48c23a Mon Sep 17 00:00:0
extension.
Please, commit if it's alright.
Thank you,
--
Evandro Menezes
>From 2efc8994abfbab65d04009fa1c0a8900804c23bb Mon Sep 17 00:00:00 2001
From: Evandro Menezes
Date: Tue, 8 Sep 2015 15:15:56 -0500
Subject: [PATCH] [AArch64] Distinct costs for sign and zero extension
gcc/
In the existing targets, it seems that it's always faster to zero up a
DF register with "movi %d0, #0" instead of "fmov %d0, xzr".
This patch modifies the respective pattern.
Please, commit if it's alright.
Thank you,
--
Evandro Menezes
>From 429b1d70a7eca76
pe of "fmov %s0, wzr" to "f_mcr".
(*cmov_insn): Change the types of "mov %0, {-1,1}" to
"mov_imm".
(*cmovsi_insn_uxtw): Likewise.
Thank you,
--
Evandro Menezes
On 10/20/2015 05:59 AM, Kyrill Tkachov wrote:
Hi Evandro,
On 19/10/15 22:05,
This patch adds the scheduling and cost models for Exynos M1.
Though its a rather large patch, much of it is the DFA model for the
pipeline. Still, Id appreciate any feedback.
Please, commit if its alright.
Thank you,
--
Evandro Menezes
0001-AArch64-Add-scheduling-and-cost-models-for
Ping.
--
Evandro Menezes
On 10/20/2015 09:27 AM, Andrew Pinski wrote:
On Tue, Oct 20, 2015 at 7:59 AM, Andrew Pinski wrote:
On Tue, Oct 20, 2015 at 7:51 AM, Andrew Pinski wrote:
On Tue, Oct 20, 2015 at 7:40 AM, Evandro Menezes wrote:
In the existing targets, it seems that it's a
Ping.
--
Evandro Menezes
On 10/20/2015 11:14 AM, Evandro Menezes wrote:
Kyrill,
Indeed, the correct log would be:
The type assigned to some insn definitions was not correct.
gcc/
* config/aarch64/aarch64.md
(*movhf_aarch64): Change the type of "mov %0.h[0], %
Thank you,
--
Evandro Menezes
On 10/28/2015 05:40 AM, Andrew Pinski wrote:
On Wed, Oct 28, 2015 at 6:36 PM, James Greenhalgh
wrote:
On Tue, Oct 27, 2015 at 06:12:48PM -0500, Evandro Menezes wrote:
This patch adds the scheduling and cost models for Exynos M1.
Though it?s a rather large patch, muc
Hi, Kyrill.
True dat, I missed arm-tune.md.
And, yes, bootstrapped cross and natively on AArch64 and cross on ARM.
Thank you,
--
Evandro Menezes
On 10/28/2015 05:57 AM, Kyrill Tkachov wrote:
Hi Evandro,
On 27/10/15 23:12, Evandro Menezes wrote:
This patch adds the scheduling and cost
Hi, James.
On 10/28/2015 05:36 AM, James Greenhalgh wrote:
On Tue, Oct 27, 2015 at 06:12:48PM -0500, Evandro Menezes wrote:
This patch adds the scheduling and cost models for Exynos M1.
Though it?s a rather large patch, much of it is the DFA model for the
pipeline.? Still, I?d appreciate any
Following the suggestions to add the support for the Exynos M1 models,
the following series of patches are broken down into:
* add more target specific tuning data
* add heuristics tuning
* add the Exynos M1 cost model
* add the Exynos M1 scheduling model
Thank you,
--
Evandro Menezes
, commit if it's alright.
Thank you,
--
Evandro Menezes
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 0ab1ca8..66be417 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -43,7 +43,7 @@
AARCH64_CORE(&q
Please, ignore the previous patch. This is the intended patch.
Sorry.
--
Evandro Menezes
On 11/04/2015 05:18 PM, Evandro Menezes wrote:
This patch adds extra tuning information about AArch64 targets:
* Maximum number of case values before resorting to a jump table
The default values
parameters for target processors
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64-protos.h (tune_params): Add new members
"max_case_values" and "cache_line_size".
* config/aarch64/aarch64.c (aarch64_case_val
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Increase loop peeling limit.
This patch increases the limit for the number of peeled insns. With
this change, I noticed no major regression in either Geekbench v3 or
SPEC
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-m1.md".
* config/arm/arm-cores.def: Use the Exynos M1 sched model.
* config/arm/arm.md: Include &qu
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-m1.md".
* config/arm/arm-cores.def: Use the Exynos M1 sched model.
* config/arm/arm.md: Include &qu
2015-10-25 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 cost model.
* config/aarch64/aarch64.c (exynosm1_addrcost_table): New variable.
(exynosm1_regmove_cost): Likewise.
(exynosm1_vector_cost): Likewise.
(exynosm1_tunings
Hi, Marcus.
Have you an update from the architecture folks about this?
Thank you,
--
Evandro Menezes
On 10/30/2015 05:24 AM, Marcus Shawcroft wrote:
On 20 October 2015 at 00:40, Evandro Menezes wrote:
In the existing targets, it seems that it's always faster to zero up a DF
register
I think that it's better if I split this patch further in two others,
since one of the changes is best if done in aarch64.md.
Please, disregard this patch and watch for updates.
Thank you,
--
Evandro Menezes
On 11/05/2015 05:30 PM, Evandro Menezes wrote:
2015-11-05 Evandro Menezes
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64.md (predicated): Copy attribute from
"arm.md".
This patch duplicates an attribute from arm.md so that the same pipeline
model can be used for both AArch32 and AArch64.
Bootstrapped on arm-unknown-linux
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-m1.md".
* config/arm/arm-cores.def: Use the Exynos M1 sched model.
* config/arm/arm.md: Include &qu
On 11/12/2015 08:55 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:50:12AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64.md (predicated): Copy attribute from
"arm.md".
This patch duplicates an attribute from
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
On 11/12/2015 08:55 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:50:12AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64.md (predicated): Copy attribute from
"a
Hi, Wilco.
It looks good to me, but FCMP is quite different from FCCMP on Exynos
M1, so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}"
and "fccmp{s,d}". Would it be acceptable to add this with this patch or
later?
Thank you.
--
Evandro Meneze
PC-relative load being used to
access a literal. I hope to have data to quantifying such analysis soon.
Bootstrapped in aarch64 and arm.
Feedback is welcome.
--
Evandro Menezes
>From d0fa78c4c29a15964467276493280efa091fbd64 Mon Sep 17 00:00:00 2001
From: Evandro Menezes
Date: Fri, 13 Nov 20
On 11/13/2015 11:36 AM, Wilco Dijkstra wrote:
Evandro Menezes wrote:
Hi, Wilco.
It looks good to me, but FCMP is quite different from FCCMP on Exynos M1,
so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}"
and "fccmp{s,d}". Would it be acceptable to ad
On 10/30/2015 05:24 AM, Marcus Shawcroft wrote:
On 20 October 2015 at 00:40, Evandro Menezes wrote:
In the existing targets, it seems that it's always faster to zero up a DF
register with "movi %d0, #0" instead of "fmov %d0, xzr".
This patch modifies the respect
On 11/05/2015 02:51 PM, Evandro Menezes wrote:
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Increase loop peeling limit.
This patch increases the limit for the number of peeled insns. With
this change, I noticed no major
On 11/12/2015 11:32 AM, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
On 11/12/2015 08:55 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:50:12AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64.md
On 11/05/2015 06:09 PM, Evandro Menezes wrote:
2015-10-25 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 cost model.
* config/aarch64/aarch64.c (exynosm1_addrcost_table): New
variable.
(exynosm1_regmove_cost): Likewise
On 11/10/2015 11:54 AM, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-m1.md".
* config/arm/arm-cores.def: Use the Exynos M1 s
On 11/20/2015 06:27 AM, James Greenhalgh wrote:
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
2015-11-12 Evandro Menezes
[AArch64] Add attribute for compatibility with ARM pipeline models
gcc/
* config
On 11/20/2015 08:34 AM, Kyrill Tkachov wrote:
On 20/11/15 12:27, James Greenhalgh wrote:
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
2015-11-12 Evandro Menezes
[AArch64] Add attribute for compatibility with ARM
On 11/20/2015 11:17 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:54:00AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-
On 11/05/2015 06:09 PM, Evandro Menezes wrote:
2015-10-25 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 cost model.
* config/aarch64/aarch64.c (exynosm1_addrcost_table): New
variable.
(exynosm1_regmove_cost): Likewise
On 11/20/2015 11:17 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:54:00AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-
On 11/09/2015 04:59 PM, Evandro Menezes wrote:
Hi, Marcus.
Have you an update from the architecture folks about this?
Thank you,
Marcus?
--
Evandro Menezes
On 11/20/2015 05:53 AM, James Greenhalgh wrote:
On Thu, Nov 19, 2015 at 04:04:41PM -0600, Evandro Menezes wrote:
On 11/05/2015 02:51 PM, Evandro Menezes wrote:
2015-11-05 Evandro Menezes
gcc/
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Increase loop
On 12/04/2015 03:25 AM, Kyrill Tkachov wrote:
This is ok arm-wise, sorry for the delay.
Make sure to regenerate and commit the updated config/arm/arm-tune.md
hunk
when committing the patch.
Checked in as r231378.
Thank you,
--
Evandro Menezes
Emit square root using the Newton series
2015-12-03 Evandro Menezes
gcc/
* config/aarch64/aarch64-protos.h (aarch64_emit_swsqrt):
Declare new
function.
* config/aarch64/aarch64-simd.md (sqrt2): New
expansion and
insn definitions
t's
why I left it as a target-specific tuning.
Thank you,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: Marcus Shawcroft [mailto:marcus.shawcr...@gmail.com]
> Sent: Wednesday, December 09, 2015 8:06
> To: Evandro Menezes
> Cc:
On 12/09/2015 10:52 AM, Kyrill Tkachov wrote:
Hi Evandro,
On 08/12/15 21:35, Evandro Menezes wrote:
Emit square root using the Newton series
2015-12-03 Evandro Menezes
gcc/
* config/aarch64/aarch64-protos.h (aarch64_emit_swsqrt):
Declare new
function
On 12/09/2015 11:16 AM, Kyrill Tkachov wrote:
On 09/12/15 17:02, Kyrill Tkachov wrote:
On 09/12/15 16:59, Evandro Menezes wrote:
On 12/09/2015 10:52 AM, Kyrill Tkachov wrote:
Hi Evandro,
On 08/12/15 21:35, Evandro Menezes wrote:
Emit square root using the Newton series
2015-12-03
erent order of the structure members.
--
Evandro Menezes Austin, USA
e.mene...@samsung.com +1-512-425-3365
aarch64.diff
Description: Binary data
Thanks for the review.
--
Evandro Menezes Austin, USA
e.mene...@samsung.com +1-512-425-3365
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On Behalf Of James Greenhalgh
Sent: Friday, August 15
Ping.
--
Evandro Menezes Austin, USA
e.mene...@samsung.com +1-512-425-3365
-Original Message-
From: Evandro Menezes [mailto:e.mene...@samsung.com]
Sent: Friday, August 15, 2014 14:55
To: 'James Greenhalgh'
Cc: 'gcc-patc
Ping, pretty please.
--
Evandro Menezes Austin, USA
e.mene...@samsung.com +1-512-425-3365
-Original Message-
From: Evandro Menezes [mailto:e.mene...@samsung.com]
Sent: Monday, August 18, 2014 10:02
To: 'James Greenhalgh'
Cc: &#
This is a trivial patch. However, without it, the addressing mode cost is
incorrectly calculated, since the cost intended for HI end up being used for
SI on A57.
I'd appreciate your considering this patch fixing this issue.
Thank you,
--
Evandro Menezes Austin
All,
My apologies for being a pest. :-)
--
Evandro Menezes Austin, TX
-Original Message-
From: Ramana Radhakrishnan [mailto:ramana@googlemail.com]
Sent: Wednesday, August 20, 2014 11:08
To: Evandro Menezes
Cc: James Greenhalgh; gcc-patches; James
Bin,
This is perhaps a plus for Aarch64 as well. Is there any plan to add a
64-bit version of this patch or should a bug be open for this?
Thank you,
--
Evandro Menezes Austin, TX
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches
onfig/aarch64/aarch64.c: Include aarch64-cost-tables.h instead of
> config/arm/aarch-cost-tables.h.
> (thunderx_regmove_cost): New variable.
> (thunderx_tunings): New variable.
--
Evandro Menezes Austin, TX
pipeline-oriented scheduling either, and,
> therefore, scheduling for register pressure can provide a better win.
Cores with complex pipelines might benefit less from such scheduling, but if
x86-64, which is as complex as it gets, generally benefitted from other
scheduling algorithms at least, I'd wager that A57 could experience some
boost as well.
Cheers,
--
Evandro Menezes Austin, TX
CPU part: 0x001
CPU revision: 0
Please, let me know if you need any help.
Thank you,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: Kyrill Tkachov [mailto:kyrylo.tkac...@arm.com]
> Sent: Monday, April 20, 2015 10:48
> To: GCC
Hi, Sandra.
FWIW, I tried this patch on A15 Juno with Coremark and any difference, if
any, between specifying this option and not was below 1%.
Cheers,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mail
The Samsung Exynos M1 implements the ARMv8 ISA and this patch adds support
for it through the -mcpu command-line option.
The patch was checked on aarch64-unknown-linux-gnu without new failures.
OK for trunk?
--
Evandro Menezes Austin, TX
0001-AArch64-Add-option
The Samsung Exynos M1 implements the ARMv8 ISA and this patch adds support
for it through the -mcpu command-line option.
The patch was checked on arm-unknown-linux-gnueabihf without new failures.
OK for trunk?
--
Evandro Menezes Austin, TX
0001-ARM-Add-option
Hi, Kyrill.
At this moment, it suffices to use the same scheduling as Cortex A57, but
more specific details are to be expected.
I couldn't check the build though, as my Arndale is strange today. As soon
as it's healthy, I'll check it.
I appreciate your feedback.
--
type. BTW, do you have some tests showing
the speed up?
Thank you,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On
> Behalf Of Benedikt Huber
> Sent: Thursday, June 1
Benedikt,
Are you developing the reciprocal approximation just for 1/x proper or for any
division, as in x/y = x * 1/y?
Thank you,
--
Evandro Menezes Austin, TX
> -Original Message-
> From: Benedikt Huber [mailto:benedikt.hu...@theobroma-syste
Philipp,
I think that execute_cse_reciprocals_1() applies only when the denominator is
known at compile-time, otherwise the division stays. It doesn't seem to know
whether the target supports the approximate reciprocal or not.
Cheers,
--
Evandro Menezes A
On 05/25/16 10:52, James Greenhalgh wrote:
On Wed, Apr 27, 2016 at 04:15:45PM -0500, Evandro Menezes wrote:
gcc/
* config/aarch64/aarch64-protos.h
(aarch64_emit_approx_rsqrt): Replace with new function
"aarch64_emit_approx_sqrt".
(tune_params):
On 05/25/16 05:15, James Greenhalgh wrote:
On Wed, Apr 27, 2016 at 04:13:33PM -0500, Evandro Menezes wrote:
gcc/
* config/aarch64/aarch64-protos.h
(AARCH64_APPROX_MODE): New macro.
(AARCH64_APPROX_{NONE,SP,DP,DFORM,QFORM,SCALAR,VECTOR,ALL}):
Likewise
On 05/25/16 11:16, James Greenhalgh wrote:
On Wed, Apr 27, 2016 at 04:15:53PM -0500, Evandro Menezes wrote:
gcc/
* config/aarch64/aarch64-protos.h
(tune_params): Add new member "approx_div_modes".
(aarch64_emit_approx_div): Declare new function.
Kyrylo Tkachov
* config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Use
aarch64_fusion_enabled_p to check for fusion capabilities.
LGTM
--
Evandro Menezes
On 05/31/16 04:27, James Greenhalgh wrote:
On Fri, May 27, 2016 at 05:57:30PM -0500, Evandro Menezes wrote:
On 05/25/16 11:16, James Greenhalgh wrote:
On Wed, Apr 27, 2016 at 04:15:53PM -0500, Evandro Menezes wrote:
gcc/
* config/aarch64/aarch64-protos.h
(tune_params
On 06/02/16 09:54, Kyrill Tkachov wrote:
The Qualcomm QDF24xx processor is now supported via the
Shouldn't this read "The Qualcomm QDF24xx processors are now supported
via the"?
Not that I have a strong opinion about it, but, otherwise, OK.
--
Evandro Menezes
On 06/03/16 07:56, Wilco Dijkstra wrote:
This patch cleans up the -mpc-relative-loads option processing. Rename to
avoid the
"no*" name and confusing !no* expressions. Fix the option processing code to
implement
-mno-pc-relative-loads rather than ignore it.
OK for commit?
LGTM
On 06/01/16 04:00, James Greenhalgh wrote:
On Fri, May 27, 2016 at 05:57:26PM -0500, Evandro Menezes wrote:
2016-04-04 Evandro Menezes
Wilco Dijkstra
gcc/
* config/aarch64/aarch64-protos.h
(aarch64_emit_approx_rsqrt): Replace with new function
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