On Mon, 2014-04-21 at 13:48 -0700, Richard Henderson wrote:
> On 04/21/2014 01:19 PM, Bill Schmidt wrote:
> > + if (GET_CODE (trueop0) == VEC_SELECT
> > + && GET_MODE (XEXP (trueop0, 0)) == mode)
> > + {
> > + rtx op0_subop1 = XEXP (trueop0,
Hi,
Below is the revised patch addressing Richard's concerns about the
assertions. Bootstrapped and tested on
powerpc64[,le]-unknown-linux-gnu. Ok for trunk?
Thanks,
Bill
[gcc]
2014-04-22 Bill Schmidt
* simplify-rtx.c (simplify_binary_operation_1): Optimize ca
equally to 4.8, 4.9, and trunk. Is
this ok for trunk (and for 4.8/4.9 after a suitable burn-in period)?
Thanks,
Bill
[gcc]
2014-04-24 Bill Schmidt
PR tree-optimization/60930
* gimple-ssa-strength-reduction.c (create_mul_imm_cand): Reject
creating a multiply candidate by
LGTM! Thanks for fixing this.
Bill
On Mon, 2013-01-28 at 15:25 +0100, Jakub Jelinek wrote:
> Hi!
>
> gimple_expand_builtin_pow last two optimizations rely on earlier
> optimizations in the same function to be performed, e.g.
> folding pow (x, c) for n = 2c into sqrt(x) * powi(x, n / 2) is only
When we remove __builtin_pow statements as part of reassociation, we
have to unlink the associated VDEF. We've always done this when we
directly remove the statement. However, in reassociation the statements
are sometimes modified in place instead of removed, potentially leaving
one or more dangl
On Mon, 2013-02-18 at 13:05 +0100, Richard Biener wrote:
> On Fri, Feb 15, 2013 at 6:53 PM, Bill Schmidt
> wrote:
> > When we remove __builtin_pow statements as part of reassociation, we
> > have to unlink the associated VDEF. We've always done this when we
> >
On 1/25/21 10:23 AM, Segher Boessenkool wrote:
Hi!
On Thu, Jan 21, 2021 at 05:49:14PM -0600, will schmidt wrote:
Noted as part of the work-in-progress builtins rewrite, the
__builtin_dfp_dtstsfi_*_{dd,td} builtins are redundant, and are thusly
being marked as deprecated. They will be remove
Hi Will,
On 7/29/21 7:42 AM, Bill Schmidt wrote:
On 7/28/21 4:21 PM, will schmidt wrote:
On Thu, 2021-06-17 at 10:19 -0500, Bill Schmidt via Gcc-patches wrote:
+/* Vector compares; EQ, NE, GE, GT, LE. */
+case RS6000_BIF_VCMPEQUB:
+case RS6000_BIF_VCMPEQUH:
+case
Hi Pat,
Good stuff! Comments below.
On 8/2/21 3:19 PM, Pat Haugen via Gcc-patches wrote:
Enable store fusion on Power10.
Use the SCHED_REORDER hook to implement Power10 specific ready list reordering.
As of now, pairing stores for store fusion is the only function being
performed.
Bootstrap/
Hi Segher,
On 8/4/21 5:29 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:48AM -0500, Bill Schmidt wrote:
+rs6000-gen-builtins: rs6000-gen-builtins.o rbtree.o
+ $(LINKER_FOR_BUILD) $(BUILD_LINKERFLAGS) $(BUILD_LDFLAGS) -o $@ \
+ $(filter-out $(BUILD_LIBDEPS
Hi Kewen,
On 8/4/21 9:06 PM, Kewen.Lin wrote:
Hi,
The existing vec_unpacku_{hi,lo} supports emulated unsigned
unpacking for short and char but misses the support for int.
This patch adds the support for vec_unpacku_{hi,lo}_v4si.
Meanwhile, the current implementation uses vector permutation
way
Hi Mike,
FWIW, looks fine to me, if tests are all passing now.
Bill
On 8/5/21 9:44 PM, Michael Meissner wrote:
[PATCH] Fix typo in fold-vec-load-builtin_vec_xl-* tests.
When I checked in the fix for running tests on power10 systems with
power10 code generation, I had a typo in the
fold-vec-lo
Hi Segher,
On 8/6/21 7:01 PM, Segher Boessenkool wrote:
Hi!
On Thu, Jul 29, 2021 at 08:30:50AM -0500, Bill Schmidt wrote:
+ const vsc __builtin_altivec_abss_v16qi (vsc);
+ABSS_V16QI altivec_abss_v16qi {}
+
+ const vsi __builtin_altivec_abss_v4si (vsi);
+ABSS_V4SI altivec_abss_v4si
Hi...
On 8/8/21 3:27 PM, Segher Boessenkool wrote:
Hi!
On Sun, Aug 08, 2021 at 11:53:38AM -0500, Bill Schmidt wrote:
On 8/6/21 7:01 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:50AM -0500, Bill Schmidt wrote:
+ const vsc __builtin_altivec_abss_v16qi (vsc);
+ABSS_V16QI
Hi Segher,
+ pcvoid_type_node
+= build_pointer_type (build_qualified_type (void_type_node,
+ TYPE_QUAL_CONST));
A const void? Interesting. You are building a pointer to a const void
here, not a const pointer to void. Is that what you wanted?
On 8/9/21 6:44 PM, Segher Boessenkool wrote:
This is not a documented GCC extension either, and it might even
conflict with the existing void * extension (allowing arithmetic on it,
by defining sizeof(void)). In either case it is not currently defined.
I'm not sure how you get to this, bu
On 8/10/21 7:48 AM, Segher Boessenkool wrote:
On Tue, Aug 10, 2021 at 07:17:54AM -0500, Bill Schmidt wrote:
On 8/9/21 6:44 PM, Segher Boessenkool wrote:
This is not a documented GCC extension either, and it might even
conflict with the existing void * extension (allowing arithmetic on it,
by
On 8/10/21 8:40 AM, Segher Boessenkool wrote:
On Tue, Aug 10, 2021 at 08:02:24AM -0500, Bill Schmidt wrote:
The whole point is that this data type is only used for interfaces, as
shown in the example code. Nobody wants to define const void as
anything. The const serves only as a contract
Hi Segher,
On 8/10/21 1:38 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:52AM -0500, Bill Schmidt wrote:
* config/rs6000/rs6000-builtin-new.def: Add always, power5, and
power6 stanzas.
+ unsigned long __builtin_ppc_mftb ();
+MFTB rs6000_mftb_di {32bit}
I&#
Hi Segher,
On 8/10/21 12:34 PM, Segher Boessenkool wrote:
On Tue, Aug 10, 2021 at 11:17:05AM -0500, will schmidt wrote:
On Thu, 2021-07-29 at 08:30 -0500, Bill Schmidt wrote:
+; This will break for long double == _Float128. libgcc history.
+ const long double __builtin_pack_longdouble
Hi Kewen,
On 8/11/21 12:44 AM, Kewen.Lin wrote:
Hi,
This patch is to make prototypes of some Power10 built-in
functions consistent with what's in the documentation, as
well as the vector version. Otherwise, useless conversions
can be generated in gimple IR, and the vectorized versions
will hav
Hi Kewen,
FWIW, it's easier on reviewers if you include the patch inline instead
of as an attachment.
On 8/11/21 1:56 AM, Kewen.Lin wrote:
Hi,
This patch is to add the support to make vectorizer able to
vectorize scalar version of some built-in functions with its
corresponding vector version
Hi Peter,
LGTM. Still needs maintainer review, of course. :)
Bill
On 8/10/21 6:37 PM, Peter Bergner wrote:
PR101849 shows we ICE on a test case when we pass a non __vector_pair *
pointer to the __builtin_vsx_lxvp and __builtin_vsx_stxvp built-ins
that is cast to __vector_pair *. The problem
On 8/11/21 9:10 PM, Kewen.Lin wrote:
Hi Bill,
Thanks for your prompt review!
on 2021/8/12 上午12:34, Bill Schmidt wrote:
Hi Kewen,
FWIW, it's easier on reviewers if you include the patch inline instead of as an
attachment.
On 8/11/21 1:56 AM, Kewen.Lin wrote:
Hi,
This patch is to ad
On 8/10/21 11:02 AM, Bill Schmidt wrote:
Hm, is this code ever executed? How does this not result in assignment
through null pointers?
It would be good to figure out whether this code is reachable at all,
and just yank it out if not. Otherwise we need a test case that hits it.
I seem to
Hi Segher,
On 8/3/21 7:34 PM, Segher Boessenkool wrote:
Whoops, I forgot some stuff:
On Tue, Jul 27, 2021 at 04:06:49PM -0500, will schmidt wrote:
On Thu, 2021-06-17 at 10:19 -0500, Bill Schmidt via Gcc-patches wrote:
static rtx
ldv_expand_builtin (rtx target, insn_code icode, rtx *op
Although safe_inc_pos avoids buffer overruns in rs6000-gen-builtins.c,
there are some other routines where we fail to detect the possibility.
Clean those up!
Regstrap in progress on powerpc64le-linux-gnu. OK for trunk if that
passes?
Thanks,
Bill
2021-08-12 Bill Schmidt
gcc
Per discussion with Martin, I'm also changing the post-increment to
pre-increment in safe_inc_pos. That's what I'm regstrapping at the moment.
Thanks,
Bill
On 8/12/21 3:28 PM, Bill Schmidt via Gcc-patches wrote:
Although safe_inc_pos avoids buffer overruns in rs6000-gen-builti
Hi,
On 8/12/21 3:43 PM, Bill Schmidt via Gcc-patches wrote:
Per discussion with Martin, I'm also changing the post-increment to
pre-increment in safe_inc_pos. That's what I'm regstrapping at the moment.
Thanks,
Bill
On 8/12/21 3:28 PM, Bill Schmidt via Gcc-patches w
Hi Peter,
On 8/13/21 12:01 PM, Peter Bergner wrote:
On 8/12/21 1:20 PM, David Edelsohn wrote:
On Tue, Aug 10, 2021 at 7:37 PM Peter Bergner wrote:
gcc/
PR target/101849
* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Cast
pointer to __vector_pair *.
Hi, Paul!
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Suppress exceptions (when specified), by saving, manipulating, and
restoring the FPSCR. Similarly, save, set, and restore the floating-point
rounding mode when required.
No attempt is made to optimize writing the FPSCR (by chec
Hi Paul,
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Also, copy tests for _mm_min_epi8, _mm_min_epu16, _mm_min_epi32,
_mm_min_epu32, _mm_max_epi8, _mm_max_epu16, _mm_max_epi32, _mm_max_epu32
from gcc/testsuite/gcc.target/i386.
sse4_1-pmaxsb.c and sse4_1-pminsb.c were modified from
Hi Paul,
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Copy some simple redirections from i386 , for:
- _mm_test_all_zeros
- _mm_test_all_ones
- _mm_test_mix_ones_zeros
Testing, backports, etc.
Simple is good! LGTM.
Bill
2021-08-09 Paul A. Clarke
gcc
* config/rs60
Hi Paul,
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Also, copy tests for:
- _mm_cvtepi8_epi16, _mm_cvtepi8_epi32, _mm_cvtepi8_epi64
- _mm_cvtepi16_epi32, _mm_cvtepi16_epi64
- _mm_cvtepi32_epi64,
- _mm_cvtepu8_epi16, _mm_cvtepu8_epi32, _mm_cvtepu8_epi64
- _mm_cvtepu16_epi32, _mm_cvt
Hi Paul,
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Also, copy tests for:
- _mm_cmpeq_epi64, _mm_cmpgt_epi64
- _mm_mullo_epi32, _mm_mul_epi32
- _mm_packus_epi32
from gcc/testsuite/gcc.target/i386.
Testing, backports, etc.
This patch LGTM with the usual comment about documentin
Hi Paul,
On 8/9/21 3:23 PM, Paul A. Clarke via Gcc-patches wrote:
Some compatibility implementations of x86 intrinsics include
Power intrinsics which require POWER8. Guard them.
emmintrin.h:
- _mm_cmpord_pd: Remove code which was ostensibly for pre-POWER8,
but which indeed depended on POWER
Hi Mike,
On 8/12/21 11:20 PM, Michael Meissner wrote:
Move xx* builtins to vsx.md.
I originally posted this patch in May. It needed a slight tune up as the
souces have changed, so I'm reposting it now.
I noticed that the xx built-in functions (xxspltiw, xxspltidp, xxsplti32dx,
xxeval, xxblend
! (Also, safe_inc_pos is not quite right itself.)
Bootstrapped and tested on powerpc64le-linux-gnu, this time without
some unsubmitted patches in the way. Is this OK for trunk?
Thanks,
Bill
2021-08-19 Bill Schmidt
gcc/
PR target/101830
* config/rs6000/rs6000-gen-builtins.c
d to using
malloc and sprintf.
Bootstrapped on powerpc64le-linux-gnu, committed as obvious. Sorry for
the trouble!
Bill
2021-08-23 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_bif_entry): Don't call
asprintf, which is not available on AIX.
---
gcc/confi
On 8/23/21 4:40 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
2021-06-15 Bill Schmidt
* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
and power9-64 stanzas.
+; These things need some review to see whether they
On 8/23/21 5:15 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:56AM -0500, Bill Schmidt wrote:
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
various pointer type nodes.
* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
On 8/24/21 10:38 AM, Segher Boessenkool wrote:
Hi!
On Tue, Aug 24, 2021 at 09:20:09AM -0500, Bill Schmidt wrote:
On 8/23/21 4:40 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
+; These things need some review to see whether they really require
Hi Kewen,
Sorry this sat in my queue for so long. It looks like you addressed all
of our concerns, so LGTM -- recommend maintainers approve.
Thanks!
Bill
On 8/12/21 9:34 PM, Kewen.Lin wrote:
Hi Segher,
Thanks for the review!
on 2021/8/12 下午11:10, Segher Boessenkool wrote:
Hi!
On Wed, Au
Hi Hao Chen,
On 8/24/21 3:52 AM, HAO CHEN GUI wrote:
Hi
The patch disables gimple fold for float or double vec_min/max
builtin when fast-math is not set. Two test cases are added to verify
the patch.
The attachments are the patch diff and change log file.
Bootstrapped and teste
r float vb = vec_promote (b, PREF_F);
+ return vec_extract (vec_min (va, vb), PREF_F);
+}
On 25/8/2021 上午 6:40, Segher Boessenkool wrote:
Hi!
On Tue, Aug 24, 2021 at 03:04:26PM -0500, Bill Schmidt wrote:
On 8/24/21 3:52 AM, HAO CHEN GUI wrote:
Thanks for this patch! In the future, if you can put your
Hi Segher,
On 8/25/21 6:27 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:31:01AM -0500, Bill Schmidt wrote:
* config/rs6000/rs6000-overload.def: Add remaining overloads.
+; TODO: Note that the entry for VEC_ADDE currently gets ignored in
+; altivec_resolve_overloaded_builtin
Hi Segher,
On 8/26/21 6:15 PM, Segher Boessenkool wrote:
Hi!
On Thu, Jul 29, 2021 at 08:31:02AM -0500, Bill Schmidt wrote:
* config/rs6000/rs6000-call.c (rs6000-builtins.h): New #include.
(rs6000_init_builtins): Call rs6000_autoinit_builtins; skip the old
Hi Paul,
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Suppress exceptions (when specified), by saving, manipulating, and
restoring the FPSCR. Similarly, save, set, and restore the floating-point
rounding mode when required.
No attempt is made to optimize writing the FPSCR (by checking if the new
On 8/27/21 8:44 AM, Bill Schmidt wrote:
Again, please specify where the patch was tested and whether this is for
trunk, backports, etc. Thanks! (I know you aren't asking for
backports, but in general please get in the habit of this.)
Sorry, I see that you did this in the cover l
Hi Paul,
This looks fine to me, recommend approval.
Thanks,
Bill
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Function signatures and decorations match gcc/config/i386/smmintrin.h.
Also, copy tests for _mm_min_epi8, _mm_min_epu16, _mm_min_epi32,
_mm_min_epu32, _mm_max_epi8, _mm_max_epu16, _mm_ma
This looks fine, recommend approval.
Thanks!
Bill
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Copy some simple redirections from i386 , for:
- _mm_test_all_zeros
- _mm_test_all_ones
- _mm_test_mix_ones_zeros
2021-08-20 Paul A. Clarke
gcc
* config/rs6000/smmintrin.h (_mm_test_all_zero
This looks fine, recommend approval.
Thanks!
Bill
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Function signatures and decorations match gcc/config/i386/smmintrin.h.
Also, copy tests for:
- _mm_cvtepi8_epi16, _mm_cvtepi8_epi32, _mm_cvtepi8_epi64
- _mm_cvtepi16_epi32, _mm_cvtepi16_epi64
- _mm_cvte
Hi Paul,
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Function signatures and decorations match gcc/config/i386/smmintrin.h.
Also, copy tests for:
- _mm_cmpeq_epi64
- _mm_mullo_epi32, _mm_mul_epi32
- _mm_packus_epi32
- _mm_cmpgt_epi64 (SSE4.2)
from gcc/testsuite/gcc.target/i386.
2021-08-23 Paul
Hi Paul,
Thanks for the changes! This looks fine to me, recommend approval.
Thanks,
Bill
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
Some compatibility implementations of x86 intrinsics include
Power intrinsics which require POWER8. Guard them.
emmintrin.h:
- _mm_cmpord_pd: Remove code which
Hi Mike,
Thanks for this clean-up!
On 8/25/21 5:09 PM, Michael Meissner wrote:
From 327273dfeec5c000f3c33ca7b88ee0097fd33586 Mon Sep 17 00:00:00 2001
From: Michael Meissner
Date: Wed, 25 Aug 2021 00:31:35 -0400
Subject: [PATCH] Fix float128-call.c test for power8 IEEE 128 and power10.
I buil
Hi Paul,
On 8/30/21 4:16 PM, Paul A. Clarke wrote:
On Fri, Aug 27, 2021 at 08:44:43AM -0500, Bill Schmidt via Gcc-patches wrote:
On 8/23/21 2:03 PM, Paul A. Clarke wrote:
+ __fpscr_save.__fr = __builtin_mffsl ();
As pointed out in the v1 review, __builtin_mffsl is enabled (or supposed
Hi Segher,
On 8/27/21 6:07 PM, Segher Boessenkool wrote:
Hi!
On Thu, Jul 29, 2021 at 08:31:06AM -0500, Bill Schmidt wrote:
Although this patch looks quite large, the changes are fairly minimal.
Most of it is duplicating the large function that does the overload
resolution using the
; committed as obvious.
2020-09-15 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (altivec_init_builtins): Fix name
of __builtin_altivec_xst_len_r.
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c
index 77c7a1149fb..a8b520834c7 100644
--- a/gcc
On 9/16/20 5:32 AM, Segher Boessenkool wrote:
On Tue, Sep 15, 2020 at 08:38:42PM -0500, Bill Schmidt wrote:
The description in rs6000-builtin.def provides for a builtin named
__builtin_altivec_xst_len_r. However, it is hand-defined in
altivec_init_builtins as __builtin_xst_len_r, against the
think it's worth keeping
around in case we have a late discovery where we need it.)
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this okay for trunk?
Thanks,
Bill
2020-09-16 Bill Schmidt
gcc/
* config/rs6000/predicat
On 9/16/20 12:09 PM, Segher Boessenkool wrote:
On Wed, Sep 16, 2020 at 08:36:35AM -0500, Bill Schmidt wrote:
This is a cleanup requested by Segher in a previous review. Most
uses of rs6000_pcrel_p are called for the current function. A
specialized version for cfun is more efficient for these
On 9/25/20 6:50 PM, Segher Boessenkool wrote:
On Fri, Sep 25, 2020 at 03:34:49PM -0500, will schmidt wrote:
On Fri, 2020-09-25 at 12:36 -0500, Segher Boessenkool wrote:
No, it cannot.
This is used for pdepd/pextd/cntlzdm/cnttzdm/cfuged, all of which do
need 64-bit registers to do anything sane
t the default patterns are for
little endian, and the overridden patterns in rs6000-builtin.cc are for big
endian.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this
okay for trunk, and eventually for backport to GCC 11?
Thanks!
Bill
2022-01-18 Bill Schmidt
al
cases, but leaves vec_splats, vec_promote, vec_extract, vec_insert, and
vec_step alone.
Bootstrapped and tested on powerpc64le-linux-gnu. Is this okay for trunk?
Thanks,
Bill
2022-01-18 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.cc (resolve_vec_mul): Accept args and types
p
x27;t actually checking for
generation
of the xxsldwi instruction, so I added that check as well.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this
okay
for trunk?
Thanks!
Bill
2022-01-21 Bill Schmidt
gcc/
* config/rs6000/rs6000-overload.def (VEC_SLDW)
Thanks! Pushed as r12-6806 with the testcase adjusted.
Bill
On 1/21/22 11:47 AM, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Jan 21, 2022 at 11:31:34AM -0600, Bill Schmidt wrote:
>> It was recently discovered that Clang supports a couple of variants of
>> vec_sldw that
&g
Adding the patch author for his information.
Thanks,
Bill
On 1/24/22 2:26 PM, Jakub Jelinek via Gcc-patches wrote:
> On Mon, Jan 24, 2022 at 08:55:37AM -0600, Segher Boessenkool wrote:
>> Hi!
>>
>> On Thu, Jan 13, 2022 at 02:08:53PM -0300, Raoni Fassina Firmino wrote:
>>> Changes since v8[8]:
>>>
group primarily because
5-8 are dependent on the previous patches, particularly patch 4, which
consolidates much of the built-in code in a new file.
Thanks for your consideration!
Bill
Bill Schmidt (8):
rs6000: More factoring of overload processing
rs6000: Don't #ifdef "short" bui
d and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-18 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.cc (resolve_vec_mul): Accept args and types
parameters instead of arglist and nargs. Simplify accordingly. Remove
unnec
able using __attribute__((target)), so I
failed in this respect. This patch corrects the problem by removing the
apply. For example, #ifdef __PPU__ is still appropriate.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-06 Bill Schm
added
a note in rs6000-builtins.def that this form is deprecated in favor of
. I think it's harmless to leave it in, in case a desire for the
distinction comes up in the future.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022
These built-ins were misimplemented as always having big-endian semantics.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-18 Bill Schmidt
gcc/
PR target/95082
* config/rs6000/rs6000-builtin.cc
gest the proper incantation for an opcode ending with a period.
Bootstrapped and tested on powerpc64le-linux-gnu and on
powerpc64-linux-gnu (32- and 64-bit) with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-27 Bill Schmidt
gcc/
PR target/103686
* config/rs6000/rs
As the subject states. Fixing this is accomplished by moving the built-ins
to the correct stanzas, [altivec] and [vsx].
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-27 Bill Schmidt
gcc/
* config/rs6000/rs6000
regressions.
Is this okay for trunk?
Thanks,
Bill
2022-01-27 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin.def (MFFSL): Mark nosoft.
(MTFSB0): Likewise.
(MTFSB1): Likewise.
(SET_FPSCR_RN): Likewise.
(SET_FPSCR_DRN): Mark nosoft and no32bit.
---
gcc/
On 1/28/22 1:11 PM, Segher Boessenkool wrote:
> On Fri, Jan 28, 2022 at 11:50:19AM -0600, Bill Schmidt wrote:
>> This patch continues the refactoring started with r12-6014.
> ab3f5b71dc6e
>
>> + and the generic code will issue the appropriate error message. Skip
&
On 1/28/22 2:32 PM, Segher Boessenkool wrote:
> On Fri, Jan 28, 2022 at 11:50:20AM -0600, Bill Schmidt wrote:
>> It was recently pointed out that we get anomalous behavior when using
>> __attribute__((target)) to select a CPU. As an example, when building for
>> -
On 1/28/22 5:24 PM, Segher Boessenkool wrote:
> On Fri, Jan 28, 2022 at 11:50:21AM -0600, Bill Schmidt wrote:
>> When introducing the new built-in support, I tried to match as many
>> existing error messages as possible. One common form was "argument X must
>> b
On 1/31/22 11:28 AM, Segher Boessenkool wrote:
> On Mon, Jan 31, 2022 at 11:21:32AM -0600, Bill Schmidt wrote:
>> On 1/28/22 5:24 PM, Segher Boessenkool wrote:
>>> On Fri, Jan 28, 2022 at 11:50:21AM -0600, Bill Schmidt wrote:
>>>> When introducing the new built-in sup
Hi Segher,
On 1/31/22 3:32 PM, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Jan 28, 2022 at 11:50:22AM -0600, Bill Schmidt wrote:
>> Continuing with the refactoring effort, this patch moves as much of the
>> target-specific built-in support code into a new file, rs6000-built
insert, and
vec_step alone.
Thanks!
Bill
2022-01-31 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.cc (resolve_vec_mul): Accept args and types
parameters instead of arglist and nargs. Simplify accordingly. Remove
unnecessary test for argument count mismatch.
between two values.
It's better to be consistent. Change the error message for the n-bit
literal to look like the other one.
Bootstrapped and tested on powerpc64le-linux-gnu. Is this okay for trunk?
Thanks!
Bill
2022-01-31 Bill Schmidt
gcc/
* config/rs6000/rs6000-ca
Hi!
Jakub, thanks for fixing this. I didn't realize the PCH implications here,
clearly...
On 2/1/22 12:33 PM, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Feb 01, 2022 at 04:27:40PM +0100, Jakub Jelinek wrote:
>> +/* PR target/104323 */
>> +/* { dg-require-effective-target powerpc_altivec_ok } *
Hi!
On 2/1/22 3:48 PM, Segher Boessenkool wrote:
> On Tue, Feb 01, 2022 at 08:49:34AM -0600, Bill Schmidt wrote:
>> I've modified the previous patch to add more explanatory commentary about
>> the number-of-arguments test that was previously confusing, and to convert
>>
ing on the remaining special
cases, but leaves vec_splats, vec_promote, vec_extract, vec_insert, and
vec_step alone.
Thanks,
Bill
2022-02-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.cc (resolve_vec_mul): Accept args and types
parameters instead of arglist and nargs. Simplify
Hi!
PR100808 pointed out some trivial formatting issues with Power documentation
for basic ISA 3.1 built-in functions. This patch cleans those up.
Tested on powerpc64le-linux-gnu, committed as obvious.
Thanks!
Bill
2022-02-04 Bill Schmidt
gcc/
PR target/100808
* doc
Hi Segher,
Thanks for all the reviews for this series! I'd like to gently ping the last
two patches.
BR,
Bill
On 1/28/22 11:50 AM, Bill Schmidt via Gcc-patches wrote:
> As the subject states. Fixing this is accomplished by moving the built-ins
> to the correct stanzas, [altive
dered.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions. Is this
okay for trunk?
Thanks!
Bill
2022-02-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtins.def (VMSUMCUD): New.
* config/rs6000/rs6000-overload.def (VEC_MSUMC): New.
* config/rs6000/v
Hi!
On 2/7/22 5:05 PM, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Feb 07, 2022 at 04:20:24PM -0600, Bill Schmidt wrote:
>> I observed recently that a couple of Power10 instructions and built-in
>> functions
>> were somehow not implemented. This patch adds one of the
On 2/8/22 9:45 AM, Segher Boessenkool wrote:
> On Mon, Feb 07, 2022 at 10:06:36PM -0600, Bill Schmidt wrote:
>> On 2/7/22 5:05 PM, Segher Boessenkool wrote:
>>> On Mon, Feb 07, 2022 at 04:20:24PM -0600, Bill Schmidt wrote:
>>>> I observed recently that a couple of
Hi!
>From some discussion today, I think we want to limit the scope of
this patch to just the power8-fusion flag that's causing trouble for
now, given stage 4. We've talked about making power8-fusion a do-
nothing flag, since it doesn't add much benefit now and probably
shouldn't be a separate fl
misaligned by this built-in function. This patch corrects the
misimplementation.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk? Eventually I would also like to backport it
to GCC 11, after burn-in.
Thanks!
Bill
2022-02-04 Bill Schmidt
gcc
like I neglected
to make that change, so fixing it now.
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk, and for backport to gcc 11 after some burn-in?
Thanks!
Bill
2022-02-09 Bill Schmidt
gcc/
* config/rs6000/rs6000-overload.def (VEC_CLR
modifications to
the test suite are identical (after fixing the issue with -mbig that David
pointed out with the original patch).
Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for releases/gcc-11?
Thanks!
Bill
2022-02-10 Bill Schmidt
gcc/
PR target/95082
Hi!
On 2/10/22 2:06 PM, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Feb 10, 2022 at 12:22:28PM -0600, Bill Schmidt wrote:
>> This is a backport from mainline 3f30f2d1dbb3228b8468b26239fe60c2974ce2ac.
>> These built-ins were misimplemented as always having big-endian semantics
Hi!
On 2/10/22 2:50 PM, Segher Boessenkool wrote:
> On Thu, Feb 10, 2022 at 12:22:28PM -0600, Bill Schmidt wrote:
>> This is a backport from mainline 3f30f2d1dbb3228b8468b26239fe60c2974ce2ac.
>> These built-ins were misimplemented as always having big-endian semantics.
>>
&g
Hi!
On 2/10/22 4:11 PM, Segher Boessenkool wrote:
> On Thu, Feb 10, 2022 at 03:17:05PM -0600, Bill Schmidt wrote:
>>>> /* 1 argument vector functions added in ISA 3.0 (power9). */
>>>> -BU_P9V_AV_1 (VCLZLSBB_V16QI, "vclzlsbb_v16qi",CONST, vclzlsbb_v1
Fine. I withdraw the patch request, and will remove my name from
the bugzilla. Somebody else can deal with it. I have more important
things to worry about.
Bill
On 2/11/22 1:31 AM, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Feb 10, 2022 at 04:28:02PM -0600, Bill Schmidt wrote:
>
On 11/17/21 6:44 AM, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Nov 16, 2021 at 02:26:22PM -0600, Bill Schmidt wrote:
>> Hi! I recently submitted [1] to make adjustments to test cases for the new
>> builtins
>> support, mostly due to error messages changing f
On 11/17/21 10:54 AM, Paul A. Clarke wrote:
> On Tue, Nov 16, 2021 at 11:12:35AM -0600, Bill Schmidt via Gcc-patches wrote:
>> Hi! During a previous patch review, Segher asked that I provide better
>> messages when builtins are unavailable because they require both a minimum
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