Re: [RFC] [PR tree-optimization/92539] Optimize away tests against invalid pointers

2024-03-10 Thread Andrew Pinski
On Sun, Mar 10, 2024 at 2:09 PM Jeff Law wrote: > > > > On 3/10/24 3:05 PM, Andrew Pinski wrote: > > On Sun, Mar 10, 2024 at 2:04 PM Jeff Law wrote: > >> > >> Here's a potential approach to fixing PR92539, a P2 -Warray-bounds false > >> po

[Committed] Reject -fno-multiflags [PR114314]

2024-03-11 Thread Andrew Pinski
(fmultiflags): Add RejectNegative. Signed-off-by: Andrew Pinski --- gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/common.opt b/gcc/common.opt index 51c4a17da83..1ad0169bd6f 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -2295,7 +2295,7 @@ Common Var

Re: C/C++ frontend patches ping

2024-03-14 Thread Andrew Pinski
3933.html Both of these were posted long after the start of stage 3 and close into the beginning of stage 4 and since they are both new features I really doubt they will be reviewed until stage 1 opens up which will be in about a month or so. Thanks, Andrew Pinski

Re: [PATCH v2 00/13] Add aarch64-w64-mingw32 target

2024-03-18 Thread Andrew Pinski
aarch64 mingw ABI support for a long time. Does this > patch series introduce a different ABI? > If yes, do you have a summary? > > Does the patch need any adaptation on the LLVM side, or should a > different target triple be picked? > I have always been wondering what "32&q

Re: [PATCH] cpp: new built-in __EXP_COUNTER__

2024-03-21 Thread Andrew Pinski
On Thu, Mar 21, 2024, 17:20 Kaz Kylheku wrote: > On 2024-03-20 16:34, rep.dot@gmail.com wrote: > > On 19 March 2024 18:27:13 CET, Kaz Kylheku wrote: > >>On 2024-03-18 00:30, Jonathan Wakely wrote: > >>> I don't have an opinion on the implementation, or the proposal itself, > >>> except that

[PATCH] Another ICE after conflicting types of redeclaration [PR109619]

2024-03-21 Thread Andrew Pinski
. (fold_builtin_2): Likewise. (fold_builtin_3): Likewise. gcc/testsuite/ChangeLog: PR c/109619 * gcc.dg/redecl-26.c: New test. Signed-off-by: Andrew Pinski --- gcc/builtins.cc | 12 ++-- gcc/testsuite/gcc.dg/redecl-26.c | 14 ++ 2

[PATCH] Another ICE after conflicting types of redeclaration [PR110682]

2024-03-22 Thread Andrew Pinski
an error operand. gcc/testsuite/ChangeLog: PR c/110682 * gcc.dg/redecl-27.c: New test. Signed-off-by: Andrew Pinski --- gcc/gimplify.cc | 6 +- gcc/testsuite/gcc.dg/redecl-27.c | 14 ++ 2 files changed, 19 insertions(+), 1 deletion(-) create

Re: [PATCH v1] doc: Correction of Tree SSA Passes info.

2024-03-25 Thread Andrew Pinski
On Sun, Mar 24, 2024 at 8:46 PM Chenghui Pan wrote: > > Current document of Tree SSA passes contains many parts that is not > updated for many years. > > This patch removes some info that is outdated and not existed in > current GCC codebase, and fixes some wrong code location descriptions > based

Re: No rule to make target '../libbacktrace/libbacktrace.la', needed by 'libgo.la'. [PR106472]

2024-03-28 Thread Andrew Pinski
e it is both a target library and a host library. Take a cross compiler that is being built on say target A and targeting target B. It will be built as a host library to be included as part of the cc1/cc1plus/etc. and be a target library that will be used for libsanitizer (and libgo). The GCC bui

[COMMITTED] Use fatal_error instead of internal_error for when ZSTD is not enabled

2024-03-28 Thread Andrew Pinski
internal_error when ZSTD is not enabled. Signed-off-by: Andrew Pinski --- gcc/lto-compress.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/lto-compress.cc b/gcc/lto-compress.cc index c167ac967aa..bebf0277ef6 100644 --- a/gcc/lto-compress.cc +++ b/gcc/lto-compress.cc

Re: [PATCH v3] tree-profile: Disable indirect call profiling for IFUNC resolvers

2024-04-03 Thread Andrew Pinski
hat the profiler (-fprofile-generate) is adding TLS usage to the ifunc resolver which then causes issues. And the use of TLS causes a PLT call to be inside the ifun which causes all the fun stuff. This is not about ifunc resolves using TLS directly in code but rather indirectly via -fprofile-generate. Thanks, Andrew Pinski > > Peter > >

Re: [PATCH] Add extra copy of the ifcombine pass after pre [PR102793]

2024-04-05 Thread Andrew Pinski
f it (that does the combining and not the optimizations part) included in isel or pass_optimize_widening_mul (which itself should most likely become part of isel or renamed since it handles more than just widening multiply these days). Thanks, Andrew Pinski > > PR 102793 > > gcc/

Re: [PATCH/RFC] On the use of -funreachable-traps to deal with PR 109627

2024-04-08 Thread Andrew Pinski
u want. Thanks, Andrew Pinski > > These are causing issues for some linkers because such functions result in > FDEs with a 0 code extent. > > The simplest representation of this is (from PR109527) > > void foo () { __builtin_unreachable (); } > > The solution (so far) is

Re: [PATCH] build: Check for cargo when building rust language

2024-04-09 Thread Andrew Pinski
there is a way to cache and use those specific versions using cargo, that should be done but I suspect cargo does not work that way. Also any time someone says this is a temporary measure it is NOT and we should never treat it as such unless you already have a patch to remove it. Thanks, Andrew Pins

Re: [PATCH] libgfortran: Disable gthreads weak symbols for glibc 2.34

2024-04-09 Thread Andrew Pinski
On Tue, Apr 9, 2024, 10:07 H.J. Lu wrote: > Since Glibc 2.34 all pthreads symbols are defined directly in libc not > libpthread, and since Glibc 2.32 we have used __libc_single_threaded to > avoid unnecessary locking in single-threaded programs. This means there > is no reason to avoid linking to

[PATCH] match: Fix `!a?b:c` and `a?~t:t` patterns for signed 1 bit types [PR114666]

2024-04-11 Thread Andrew Pinski
/ChangeLog: * match.pd (`!a?b:c`): Cast `a` to boolean type for cond for gimple. (`a?~t:t`): Cast `a` to boolean type before casting it to the type. gcc/testsuite/ChangeLog: * gcc.c-torture/execute/bitfld-signed1-1.c: New test. Signed-off-by: Andrew Pinski

[COMMITTEDv2] aarch64: -mstrict-align vs __arm_data512_t [PR113657]

2024-01-31 Thread Andrew Pinski
64/aarch64-simd.md (split for movv8di): For strict aligned mode, use DImode instead of TImode. gcc/testsuite/ChangeLog: * gcc.target/aarch64/acle/ls64_strict_align.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64-simd.md

Re: [PATCH]AArch64: update vget_set_lane_1.c test output

2024-02-01 Thread Andrew Pinski
o point out that is not exactly true for all cores. > Regtested on aarch64-none-linux-gnu and no issues. > > Ok for master? This is PR 112375 by the way. Thanks, Andrew Pinski > > Thanks, > Tamar > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/vget_set_

Re: [PATCH]AArch64: update vget_set_lane_1.c test output

2024-02-01 Thread Andrew Pinski
On Thu, Feb 1, 2024 at 8:42 AM Richard Sandiford wrote: > > Tamar Christina writes: > >> -Original Message- > >> From: Richard Sandiford > >> Sent: Thursday, February 1, 2024 2:24 PM > >> To: Andrew Pinski > >> Cc: Tamar Christina ;

[PATCH] aarch64: Fix undefined code in vect_ctz_1.c

2024-02-02 Thread Andrew Pinski
. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c b/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c index c4eaf5b3a91..5fcf1e31ab2 100644 --- a/gcc/testsuite

Re: [PATCH] Fix disabling of year 2038 support on 32-bit hosts by default

2024-02-05 Thread Andrew Pinski
On Mon, Feb 5, 2024 at 10:40 AM Thiago Jung Bauermann wrote: > > > Thiago Jung Bauermann writes: > > > Hello Luis, > > > > Luis Machado writes: > >> > >> Approved-By: Luis Machado > > > > Thanks! Since this is a patch for the repository top-level, is your > > approval sufficient to commit the p

Re: [PATCH] libsanitizer: workaround libtool error when building in Yocto Kirkstone

2024-02-06 Thread Andrew Pinski
-patches/2013-08/msg01465.html (yes 10 years ago but as far as I Know this still applies). Thanks, Andrew Pinski > > Signed-off-by: Alibek Omarov > > --- > libsanitizer/asan/Makefile.in | 2 +- > libsanitizer/hwasan/Makefile.in | 2 +- > libsanitizer/tsan/Makefile.i

Re: [PATCH] RISC-V: Add support for B standard extension

2024-02-06 Thread Andrew Pinski
was recorded as PR 106531. Thanks, Andrew Pinski > > gcc/ChangeLog: > > * common/config/riscv/riscv-common.cc: Add imply rules for B extension > * config/riscv/arch-canonicalize: ditto > > Signed-off-by: Edwin Lu > --- > gcc/common/config/riscv/riscv-c

Re: [PATCH 2/1] c++: Also support lambdas attached to TYPE_DECLs in modules

2024-02-10 Thread Andrew Pinski
. Do you know if this fixes any of the non-module related ones too? Thanks, Andrew Pinski > > One interesting case is 'E::f' in the attached testcase: it appears to > get a merge kind of 'MK_field', rather than 'MK_keyed' as most other > lambdas do. I'm

[PATCH] aarch64: Improve PERM<{0}, a, ...> (64bit) by adding whole vector shift right [PR113872]

2024-02-11 Thread Andrew Pinski
/iterators.md (unspec): Add UNSPEC_VEC_SHL gcc/testsuite/ChangeLog: * gcc.target/aarch64/perm_zero-1.c: New test. * gcc.target/aarch64/perm_zero-2.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64-simd.md | 18 -- gcc/config/aarch64

[PATCH] aarch64: Use vec_perm_indices::new_shrunk_vector in aarch64_evpc_reencode

2024-02-12 Thread Andrew Pinski
/ChangeLog: PR target/113822 * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Use vec_perm_indices::new_shrunk_vector instead of manually going through the indices. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc | 24 +--- 1

[PATCH] vect/testsuite: Fix vect-simd-clone-1[02].c when dg-do default is compile [PR113899]

2024-02-13 Thread Andrew Pinski
-simd-clone-12.c: Likewise. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c | 2 ++ gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c b/gcc/testsuite/gcc.dg/vect/vect

[PATCH] aarch64: Reword error message for mismatch guard size and probing interval [PR90155]

2024-02-13 Thread Andrew Pinski
options, it needs the quoting. OK? Built and tested for aarch64-linux-gnu. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_override_options_internal): Fix error message for mismatch guard size and probing interval. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc

[COMMITTED] aarch64/testsuite: Remove dg-excess-errors from c-c++-common/gomp/pr63328.c and gcc.dg/gomp/pr87895-2.c [PR113861]

2024-02-14 Thread Andrew Pinski
/gomp/pr87895-2.c: Likewise. Signed-off-by: Andrew Pinski --- gcc/testsuite/c-c++-common/gomp/pr63328.c | 2 -- gcc/testsuite/gcc.dg/gomp/pr87895-2.c | 1 - 2 files changed, 3 deletions(-) diff --git a/gcc/testsuite/c-c++-common/gomp/pr63328.c b/gcc/testsuite/c-c++-common/gomp/pr63328.c

[PATCH 0/2] Some minor internal optabs related fixes

2024-02-14 Thread Andrew Pinski
While working on adding some new vector code to the aarch64 backend, I was confused on which mode was supposed to be used for widen_ssum pattern so I decided to improve the documentation so the next person won't be confused. Andrew Pinski (2): doc: Fix some standard named pattern document

[PATCH 2/2] doc: Add documentation of which operand matches the mode of the standard pattern name [PR113508]

2024-02-14 Thread Andrew Pinski
: Andrew Pinski --- gcc/doc/md.texi | 9 + 1 file changed, 9 insertions(+) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 274dd03d419..33b37e79cd4 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -5746,6 +5746,7 @@ Operand 1 and operand 2 are of the same mode. Their product, which is

[PATCH 1/2] doc: Fix some standard named pattern documentation modes

2024-02-14 Thread Andrew Pinski
, smulhrs, umulhrs, sdiv_pow2): Move the 3 outside of the var. Signed-off-by: Andrew Pinski --- gcc/doc/md.texi | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index b0c61925120..274dd03d419 100644 --- a/gcc

[COMMITTED] c++: Add testcase for this PR [PR97990]

2024-02-16 Thread Andrew Pinski
This testcase was fixed by r14-5934-gf26d68d5d128c8 but we should add one to make sure it does not regress again. Committed as obvious after a quick test on the testcase. PR c++/97990 gcc/testsuite/ChangeLog: * g++.dg/torture/vector-struct-1.C: New test. Signed-off-by: Andrew

Re: [PATCH v1] Internal-fn: Add new internal function SAT_ADDU

2024-02-19 Thread Andrew Pinski
On Sun, Feb 18, 2024 at 11:37 PM Richard Biener wrote: > > On Sat, Feb 17, 2024 at 11:30 AM wrote: > > > > From: Pan Li > > > > This patch would like to add the middle-end presentation for the > > unsigned saturation add. Aka set the result of add to the max > > when overflow. It will take the

Re: [PATCH] arm: Fixed C23 call compatibility with arm-none-eabi

2024-02-19 Thread Andrew Pinski
* gcc.dg/torture/c23-stdarg-split-1b.c: Likewise. It is almost always better to add a new testcase for the expanded idea of the test rather than modifying the original. Thanks, Andrew Pinski > * gcc.target/arm/aapcs/align_vaarg3.c: New test. > * gcc.target/arm/aapc

[Committed] analyzer: Fix maybe_undo_optimize_bit_field_compare vs non-scalar types [PR113983]

2024-02-19 Thread Andrew Pinski
-extract-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/analyzer/region-model-manager.cc | 3 +++ .../gcc.dg/analyzer/torture/vector-extract-1.c | 14 ++ 2 files changed, 17 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/vector-extract-1.c

[PATCH] c++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types [PR89224]

2024-02-20 Thread Andrew Pinski
variants for the vector/array types instead of the types directly. gcc/testsuite/ChangeLog: * g++.dg/torture/vector-subaccess-1.C: New test. * gcc.dg/pr83415.c: Change warning to error. Signed-off-by: Andrew Pinski --- gcc/c-family/c-common.cc | 7

Re: [PATCH v1 01/13] Introduce aarch64-w64-mingw32 target

2024-02-21 Thread Andrew Pinski
On Wed, Feb 21, 2024 at 10:17 AM Evgeny Karpov wrote: > > > need_64bit_isa=yes This is not needed in the patch as it is only used for x86_64 targets. Should you make sure nobody specifies the big-endian target: aarch64_be-w64-mingw32 ? Thanks, Andrew Pinski

Re: [PATCH v1 05/13] Reuse MinGW from i386 for AArch64

2024-02-21 Thread Andrew Pinski
On Wed, Feb 21, 2024 at 10:38 AM Evgeny Karpov wrote: > > In config/i386/winnt.cc there are many x86_64 comments and many function names that use i386 in them? When moving it seems like better to rename them and remove references to 86. I don't see any changes that rename the functions or comment

[COMMITTED] warn-access: Fix handling of unnamed types [PR109804]

2024-02-22 Thread Andrew Pinski
ed-new-delete-8.C: New test. Signed-off-by: Andrew Pinski --- gcc/gimple-ssa-warn-access.cc | 1 + .../g++.dg/warn/Wmismatched-new-delete-8.C| 42 +++ 2 files changed, 43 insertions(+) create mode 100644 gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-8.C diff -

Re: [PATCH v1 03/13] aarch64: Mark x18 register as a fixed register for MS ABI

2024-02-22 Thread Andrew Pinski
onditional_register_usage. Dynamically might be needed also if we want to support ms_abi attribute and/or -mabi=ms to support the wine folks. Thanks, Andrew Pinski > > +# define CALL_USED_X18 0 > > Is that really correct? If the register is really reserved, but some code > modifi

[COMMITTED/13] warn-access: Fix handling of unnamed types [PR109804]

2024-02-22 Thread Andrew Pinski
tstrap/test on x86_64-linux-gnu PR tree-optimization/109804 gcc/ChangeLog: * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle DEMANGLE_COMPONENT_UNNAMED_TYPE. gcc/testsuite/ChangeLog: * g++.dg/warn/Wmismatched-new-delete-8.C: New test. Signed-off-by:

Re: [pushed] testsuite: fix Wmismatched-new-delete-8.C with -m32

2024-02-22 Thread Andrew Pinski
On Thu, Feb 22, 2024, 15:56 Marek Polacek wrote: > Tested x86_64-pc-linux-gnu, applying to trunk. I backported/pushed the change to 13 branch already so please apply it there too. Thanks, Andrew > -- >8 -- > This fixes > error: 'operator new' takes type 'size_t' ('unsigned int') as first >

[PATCH] aarch64: Fix costing of manual bfi instructions

2024-02-23 Thread Andrew Pinski
part which we don't currently match. Built and tested on aarch64-linux-gnu with no regressions. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_bfi_rtx_p): New function. (aarch64_rtx_costs): For IOR, try calling aarch64_bfi_rtx_p. Signed-off-by: Andrew Pinski ---

Re: [PATCH v1 02/13] aarch64: The aarch64-w64-mingw32 target implements

2024-02-23 Thread Andrew Pinski
On Fri, Feb 23, 2024 at 9:51 AM Richard Sandiford wrote: > > Evgeny Karpov writes: > > The calling ABI enum definition has been done following a similar > > convention in > > https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/i386/i386-opts.h;h=ef2825803b32001b9632769bdff196d1e43d27ba;hb=ref

[PATCH 1/2] aarch64: Use fmov s/d/hN, FP_CST for some vector CST [PR113856]

2024-02-23 Thread Andrew Pinski
suite/ChangeLog: * gcc.target/aarch64/fmov-zero-cst-1.c: New test. * gcc.target/aarch64/fmov-zero-cst-2.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc | 48 ++--- .../gcc.target/aarch64/fmov-zero-cst-1.c | 52 +++

[PATCH 2/2] aarch64: Support `{1.0f, 1.0f, 0.0, 0.0}` CST forming with fmov with a smaller vector type.

2024-02-23 Thread Andrew Pinski
): Recognize where the first half of the const float vect is the same. (aarch64_output_simd_mov_immediate): Handle the case where insn is FMOV_SDH and modifier is MSL. gcc/testsuite/ChangeLog: * gcc.target/aarch64/fmov-zero-cst-3.c: New test. Signed-off-by: Andrew

Re: [PATCH v1 08/13] aarch64: Add Cygwin and MinGW environments for AArch64

2024-02-27 Thread Andrew Pinski
other route to run the applications? Thanks, Andrew Pinski > > It looks like IL32P64 works. It has been tested on OpenSSL, OpenBLAS, > libjpeg-turbo, and FFmpeg packages. No issues have been detected with it. > > Correct, stack checking cannot be explicitly disabled by the user.

Re: [PATCH 1/3] Change 'v1' float and int code to fall back to v0

2024-02-28 Thread Andrew Pinski
g/git_commit.py @@ -109,6 +109,7 @@ bug_components = { 'libffi', 'libfortran', 'libgcc', +'libcc1', 'libgcj', 'libgomp', 'libitm', ``` Thanks, Andrew Pinski > > jeff

[COMMITTED] Add libcc1 to bug components

2024-02-28 Thread Andrew Pinski
: * gcc-changelog/git_commit.py (bug_components): Add libcc1. Signed-off-by: Andrew Pinski --- contrib/gcc-changelog/git_commit.py | 1 + 1 file changed, 1 insertion(+) diff --git a/contrib/gcc-changelog/git_commit.py b/contrib/gcc-changelog/git_commit.py index 87bec4e00f5..87ecb9e1a17 100755 --- a

Re: [PATCH 1/3] Change 'v1' float and int code to fall back to v0

2024-02-28 Thread Andrew Pinski
On Wed, Feb 28, 2024 at 5:35 PM Tom Tromey wrote: > > >>>>> "Andrew" == Andrew Pinski writes: > > Andrew> I don't know how to update the script server side after it is > Andrew> committed in git. the checker script is located in git though: &

[COMMITTED] aarch64: Fix memtag builtins vs GC [PR108174]

2024-02-28 Thread Andrew Pinski
geLog: * config/aarch64/aarch64-builtins.cc (aarch64_memtag_builtin_data): Make static and mark with GTY. gcc/testsuite/ChangeLog: * gcc.target/aarch64/acle/memtag_4.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64-builtins.cc | 2 +-

Re: [COMMITTED] aarch64: Fix memtag builtins vs GC [PR108174]

2024-02-28 Thread Andrew Pinski
On Wed, Feb 28, 2024 at 11:14 PM Andrew Pinski wrote: > > The memtag builtins were being GC'ed away so we end up > with a crash sometimes (maybe even wrong code). > This fixes that issue by adding GTY on the variable/struct > aarch64_memtag_builtin_data. > > Committe

Re: [RFC] aarch64: Add support for __BitInt

2024-01-10 Thread Andrew Pinski
On Wed, Jan 10, 2024 at 11:06 AM Andre Vieira (lists) wrote: > > Hi, > > This patch is still work in progress, but posting to show failure with > bitint-7 test where handle_stmt called from lower_mergeable_stmt ICE's > because the idx (3) is out of range for the __BitInt(135) with a > limb_prec of

[PATCH] match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301]

2024-01-10 Thread Andrew Pinski
. PR tree-optimization/113301 gcc/ChangeLog: * match.pd (`1/x`): Delay signed case until late. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/divide-8.c: New test. Signed-off-by: Andrew Pinski --- gcc/match.pd | 12 +++- gcc/testsuite/gcc.dg/tree

[PATCH] expr: Limit the store flag optimization for single bit to non-vectors [PR113322]

2024-01-11 Thread Andrew Pinski
/ChangeLog: * expr.cc (do_store_flag): Don't try single bit tests with comparison on vector types. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr113322-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/expr.cc | 2 ++

Re: [PATCH 2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c

2024-01-12 Thread Andrew Pinski
ng ifcvt on the gimple level (I am planning on doing some). Thanks, Andrew Pinski > --- > gcc/testsuite/gcc.target/riscv/pr105314.c |2 ++ > 1 file changed, 2 insertions(+) > > gcc-test-riscv-pr105314-rtl.diff > Ind

[COMMITTED] Add a few testcases for fix missed optimization regressions

2024-01-12 Thread Andrew Pinski
test. * gcc.dg/tree-ssa/vrp-unreachable-1.c: New test. * gcc.dg/tree-ssa/vrp-unreachable-2.c: New test. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-22.c | 23 + gcc/testsuite/gcc.dg/tree-ssa/vrp-loop-1.c| 34 +++ gcc

Re: [PATCH] libsupc++: Fix UB terminating on foreign exception

2024-01-13 Thread Andrew Pinski
guage testcase using GNU objective-C exceptions as an example. If not directly adding a testcase there, at least a simple test that shows the issue outside of the testsuite? Thanks, Andrew Pinski > > Signed-off-by: Julia DeMille > --- > libstdc++-v3/ChangeLog | 9 +

[COMMITTED] Add myself to the DCO section

2024-01-15 Thread Andrew Pinski
It is time to add myself to DCO section for my quicinc email account. ChangeLog: * MAINTAINERS (DCO): Add myself. Signed-off-by: Andrew Pinski --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 882694cc47d..cb5a42501dd 100644 --- a

[PATCH] aarch64: Fix aarch64_ldp_reg_operand predicate not to allow all subreg [PR113221]

2024-01-16 Thread Andrew Pinski
subreg, only allow REG operands isntead of allowing all. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr113221-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/predicates.md | 8 +++- gcc/testsuite/gcc.c-torture/compile/pr113221-1.c | 12

[COMMITTEDv2] aarch64: Fix aarch64_ldp_reg_operand predicate not to allow all subreg [PR113221]

2024-01-17 Thread Andrew Pinski
(aarch64_ldp_reg_operand): For subreg, only allow REG operands instead of allowing all. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/pr113221-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/predicates.md | 6 +- gcc/testsuite/gcc.c-torture/compile

Re: [PATCH] libstdc++: add ARM SVE support to std::experimental::simd

2024-01-17 Thread Andrew Pinski
On Wed, Jan 17, 2024 at 11:28 PM Matthias Kretz wrote: > > On Thursday, 4 January 2024 10:10:12 CET Andrew Pinski wrote: > > I really doubt this would work in the end. Because HW which is 128bits > > only, can't support -msve-vector-bits=2048 . I am thinking > > std::

[PATCH] aarch64: Fix __builtin_apply with -mgeneral-regs-only [PR113486]

2024-01-18 Thread Andrew Pinski
-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc | 4 gcc/testsuite/gcc.target/aarch64/builtin_apply-1.c | 12 2 files changed, 16 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/builtin_apply-1.c diff --git a/gcc/config/aarch64

[COMMITTED] ipa: Add testcase for already fixed case [PR110705]

2024-01-20 Thread Andrew Pinski
/compile/pr110705-1.c: New test. Signed-off-by: Andrew Pinski --- .../gcc.c-torture/compile/pr110705-1.c| 27 +++ 1 file changed, 27 insertions(+) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr110705-1.c diff --git a/gcc/testsuite/gcc.c-torture/compile/pr110705

[PATCH] arm: Fix parsecpu.awk for aliases [PR113030]

2024-01-20 Thread Andrew Pinski
PR target/113030 * config/arm/parsecpu.awk (check_cpu): Use cpu_opt_alias instead of cpu_optaliases. (check_arch): Use arch_opt_alias instead of arch_optaliases. Signed-off-by: Andrew Pinski --- gcc/config/arm/parsecpu.awk | 4 ++-- 1 file changed, 2 insertions(+)

Re: [PATCH] PR rtl-optimization/111267: Improved forward propagation.

2024-01-21 Thread Andrew Pinski
check against register_operand to then reg_or_subregno is called but since register_operand allows `(SUBREG (MEM())` but reg_or_subregno asserts on only having `REG` or `SUBREG(REG)`, things go downhill. What a mess. I really wish `(SUBREG (MEM...))` handling would go away ... Thanks, Andrew

[PATCH] aarch64: Fix movv8di for overlapping register and memory load [PR113550]

2024-01-23 Thread Andrew Pinski
overlapping with the address and then only emit that move last. Build and tested for aarch64-linux-gnu with no regressions gcc/ChangeLog: * config/aarch64/aarch64-simd.md (*aarch64_movv8di): Mark the last alternative's output constraint as an early clobber. Signed-off-by: A

[PATCH] Fix vect_long_mult for aarch64 [PR109705]

2024-01-24 Thread Andrew Pinski
/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_vect_long_mult): Fix aarch64*-*-* checks. Signed-off-by: Andrew Pinski --- gcc/testsuite/lib/target-supports.exp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/lib/target

[COMMITTED] Fix check_effective_target_vect_long_mult

2024-01-24 Thread Andrew Pinski
suite/ChangeLog: * lib/target-supports.exp (check_effective_target_vect_long_mult): Fix small typo for aarch64*-*-*. Signed-off-by: Andrew Pinski --- gcc/testsuite/lib/target-supports.exp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/lib/target-support

Re: [PATCH] Fix vect_long_mult for aarch64 [PR109705]

2024-01-24 Thread Andrew Pinski
On Wed, Jan 24, 2024 at 4:40 PM H.J. Lu wrote: > > On Wed, Jan 24, 2024 at 9:37 AM Andrew Pinski > wrote: > > > > On aarch64, vectorization of `long` multiply can be done if SVE is enabled > > or if long is 32bit (ILP32). It can also be done for constants too bu

[PATCH] Fix a few vect gimple testcases for LLP64 targets (e.g. mingw) [PR113548]

2024-01-24 Thread Andrew Pinski
-arith-2.c: Likewise. * gcc.dg/vect/vect-ifcvt-19.c: Likewise. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.dg/vect/slp-reduc-10a.c | 20 +-- gcc/testsuite/gcc.dg/vect/slp-reduc-10b.c | 20 +-- gcc/testsuite/gcc.dg/vect/slp-reduc-10c.c | 6

[PATCH] aarch64: Fix undefinedness while testing the J constraint [PR100204]

2024-01-25 Thread Andrew Pinski
: PR target/100204 * config/aarch64/constraints.md (J): Cast to `unsigned HOST_WIDE_INT` before taking the negative of it. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/constraints.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64

[PATCH] testsuite/vect: Fix pr25413a.c expectations [PR109705]

2024-01-25 Thread Andrew Pinski
-gnu (with and without SVE). Built and tested on aarch64-linux-gnu (with and without SVE). gcc/testsuite/ChangeLog: PR testsuite/109705 * gcc.dg/vect/pr25413a.c: Expect 1 vectorized loops for !vect_long_mult and 2 for vect_long_mult. Signed-off-by: Andrew Pinski --- gcc

[PATCH] aarch64: Fix/avoid undefinedness in aarch64_classify_index [PR100212]

2024-01-25 Thread Andrew Pinski
64.cc (aarch64_classify_index): Avoid undefined shift after the call to exact_log2. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index d2014c

Re: [PATCH] testsuite: Fix vect_long_mult on Power [PR109705]

2024-01-26 Thread Andrew Pinski
d apply if approved) the attached patch to see if it fixes pr25413a.c for powerpc*-*-* for 32bit? Thanks, Andrew Pinski > > I'm going to push this soon. > > BR, > Kewen > - > PR testsuite/109705 > > gcc/testsuite/ChangeLog: > > * lib/targe

Re: [PATCH] RISC-V: THEAD: Fix improper immediate value for MODIFY_DISP instruction on 32-bit systems.

2024-01-29 Thread Andrew Pinski
addr.reg)], >INTVAL (addr.offset) >> addr.shift, addr.shift); This is wrong, you should instead use HOST_WIDE_INT_PRINT_DEC or HOST_WIDE_INT_PRINT_UNSIGNED. Thanks, Andrew Pinski > return true; > > -- > 2.17.1 >

Re: [PATCH][libsanitizer]: Sync fixes for asan interceptors from upstream [PR112644]

2024-01-29 Thread Andrew Pinski
On Mon, Jan 29, 2024 at 7:04 AM Tamar Christina wrote: > > Hi All, > > This cherry-picks and squashes the differences between commits > > d3e5c20ab846303874a2a25e5877c72271fc798b..76e1e45922e6709392fb82aac44bebe3dbc2ea63 > from LLVM upstream from compiler-rt/lib/hwasan/ to GCC on the changes relev

[PATCH] Fix some of vect-avg-*.c testcases

2024-01-29 Thread Andrew Pinski
-4.c: Likewise. * gcc.dg/vect/vect-avg-5.c: Likewise. * gcc.dg/vect/vect-avg-6.c: Likewise. * gcc.dg/vect/vect-avg-7.c: Likewise. * gcc.dg/vect/vect-avg-8.c: Likewise. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.dg/vect/vect-avg-1.c | 3 ++- gcc/testsuite

[PATCH] aarch64: -mstrict-align vs __arm_data512_t [PR113657]

2024-01-30 Thread Andrew Pinski
64/aarch64-simd.md (split for movv8di): For strict aligned mode, use DImode instead of TImode. gcc/testsuite/ChangeLog: * gcc.target/aarch64/acle/ls64_strict_align.c: New test. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64-simd.md

[PATCH] middle-end: Fix up constant handling in emit_conditional_move [PR111260]

2023-12-13 Thread Andrew Pinski
forcing the constant to a register. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/condmove-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/optabs.cc | 40 +-- .../gcc.c-torture/compile/condmove-1.c| 9 + 2 files

[COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260]

2023-12-14 Thread Andrew Pinski
-linux. PR middle-end/111260 gcc/ChangeLog: * optabs.cc (emit_conditional_move): Change the modes to be equal before forcing the constant to a register. gcc/testsuite/ChangeLog: * gcc.c-torture/compile/condmove-1.c: New test. Signed-off-by: Andrew Pinski

[COMMITTED] SCCP: Fix ODR issues when compiling with LTO [PR 113054}

2023-12-18 Thread Andrew Pinski
namespace and they are now considered locally to that TU. Committed as obvious after a bootstrap/test on x86_64. gcc/ChangeLog: PR tree-optimization/113054 * gimple-ssa-sccopy.cc: Wrap the local types with an anonymous namespace. Signed-off-by: Andrew Pinski --- gcc/gimple

Re: [PATCH] fold-const: Handle AND, IOR, XOR with stepped vectors [PR112971].

2023-12-19 Thread Andrew Pinski
he 2nd operand but there needs to be a comment on why :c is needed for this. > > But if this must happen in const_binop instead, then we could have > a function like: The reasoning of why it should be in const_binop rather than in match is because both operands are constants. Now for commu

[PATCH] Document cond_copysign and cond_len_copysign optabs [PR112951]

2023-12-21 Thread Andrew Pinski
): Likewise. * optabs.def: Reorder cond_copysign to be before cond_fmin. Likewise for cond_len_copysign. Signed-off-by: Andrew Pinski --- gcc/doc/md.texi | 10 +- gcc/optabs.def | 4 ++-- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/gcc/doc/md.texi b/gcc/doc

[PATCH] reassoc vs uninitialized variable {PR112581]

2023-12-23 Thread Andrew Pinski
): Call mark_ssa_maybe_undefs. gcc/testsuite/ChangeLog: PR tree-optimization/112581 * gcc.c-torture/execute/pr112581-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/gimple-if-to-switch.cc| 3 ++ .../gcc.c-torture/execute/pr112581-1.c| 37

Re: [PATCH v3] EXPR: Emit an truncate if 31+ bits polluted for SImode

2023-12-24 Thread Andrew Pinski
On Sun, Dec 24, 2023, 01:18 YunQiang Su wrote: > Roger Sayle 于2023年12月24日周日 16:51写道: > > > > > > > What's exceedingly weird is T_N_T_M_P (DImode, SImode) isn't actually a > > > truncation! The output precision is first, the input precision is > second. The docs > > > explicitly state the outpu

[COMMITTED] match: Improve `(a != b) ? (a + b) : (2 * a)` pattern [PR19832]

2023-12-24 Thread Andrew Pinski
-optimization/19832 gcc/ChangeLog: * match.pd (`(a != b) ? (a + b) : (2 * a)`): Add `:c` on the plus operator. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/phi-opt-same-2.c: New test. Signed-off-by: Andrew Pinski --- gcc/match.pd | 2

[PATCH] Fix gen-vect-26.c testcase after loops with multiple exits [PR113167]

2023-12-28 Thread Andrew Pinski
/ChangeLog: PR testsuite/113167 * gcc.dg/tree-ssa/gen-vect-26.c: Mark the test/check loop as novector. Signed-off-by: Andrew Pinski --- gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect

Re: [PATCH] install: Correct check-g++ to check-gcc-c++

2023-12-30 Thread Andrew Pinski
samp{make check-obj-c++}, @samp{make check-lto} in the @file{gcc} subdirectory of the object directory. ``` Though maybe it should be clear that these make targets are talking about the targets in the gcc subdirectory rather than from the toplevel. Thanks, Andrew Pinski > --- > gcc/do

[PATCH] Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186]

2023-12-31 Thread Andrew Pinski
integral types. * match.pd (maybe_cmp): Allow for bit_xor for 1bit integral types. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/bitops-bool-1.c: New test. Signed-off-by: Andrew Pinski --- gcc/gimple-match-head.cc | 20 --- gcc/match.pd

Re: [PATCH] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]

2024-01-02 Thread Andrew Pinski
On Tue, Dec 12, 2023 at 12:22 AM Andrew Pinski wrote: > > Ccmp is not used if the result of the and/ior is used by both > a GIMPLE_COND and a GIMPLE_ASSIGN. This improves the code generation > here by using ccmp in this case. > Two changes is required, first we need to allow the ou

Re: Re: [PATCH v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.

2024-01-02 Thread Andrew Pinski
. Note I hate it. It would be better if you use something like `%^' (see `~` for an example of how that works) instead of hacking riscv_asm_output_opcode really. In fact that is how other targets implement this kind of things. Thanks, Andrew PInski > _

Re: Re: [PATCH v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.

2024-01-02 Thread Andrew Pinski
ed there). And the next patch adds a few more '%' to support printing different different strings based on XTheadVector or not. This is how almost all other targets handle this kind of things instead of hacking ASM_OUTPUT_OPCODE . Thanks, Andrew Pinski > > __

Re: Re: [PATCH v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.

2024-01-02 Thread Andrew Pinski
Then we should not support theadvector if things are getting this messy. Both ways are hacks really. Either way we need a better way of implementing this. Hacking theadvector support using rewriting is wrong and not maintainable either. I suspect we should wait on supporting theadvector until GCC 15 anywa

Re: [PATCH] libstdc++: add ARM SVE support to std::experimental::simd

2024-01-04 Thread Andrew Pinski
g std::experimental::simd is not the right way of supporting this. Really the route the standard should be heading towards is non constant at compile time sized vectors instead and then you could use the constant sized ones to emulate the Variable length ones. I think we should not depend on __ARM_FEATURE_

Re: Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target?

2024-01-04 Thread Andrew Pinski
dif ``` Which comes directly from config/aarch64/crti.S . HIDDEN should be handled similarly. We really should still have SME support for GCC for windows. Thanks, Andrew Pinski > > > Best regards, > > Radek Bartoň

[PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942]

2024-01-04 Thread Andrew Pinski
ned-off-by: Andrew Pinski --- gcc/ccmp.cc | 12 ++-- gcc/cfgexpand.cc | 75 +++ gcc/testsuite/gcc.target/aarch64/ccmp_3.c | 20 ++ gcc/testsuite/gcc.target/aarch64/ccmp_4.c | 35 +++ gcc/testsuite/gcc.targ

Re: [PATCH] match.pd: Convert {I, X}OR of two values ANDed with alien CSTs to PLUS [PR108477]

2024-01-08 Thread Andrew Pinski
ve leal like instruction. Also I think it is the same issue as I recorded as PR 111763 . I suspect BIT_IOR is more of a Canonical form for GIMPLE while we should handle this in expand to decide if we want to use PLUS or IOR. Thanks, Andrew Pinski > > If we consider the following testca

Re: [PATCH] gcc: Disallow trampolines when -fhardened

2023-12-01 Thread Andrew Pinski
On Fri, Dec 1, 2023, 11:36 Marek Polacek wrote: > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? > > -- >8 -- > It came up that a good hardening strategy is to disable trampolines > which may require executable stack. Therefore the following patch > adds -Werror=trampolines to -fha

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