Re: [PATCH 1/2] c++/modules: Fix treatment of unnamed types

On Thu, May 23, 2024 at 03:36:48PM -0400, Jason Merrill wrote: > On 5/23/24 09:27, Nathaniel Shead wrote: > > On Mon, May 20, 2024 at 06:00:09PM -0400, Jason Merrill wrote: > > > On 5/17/24 02:14, Nathaniel Shead wrote: > > > > On Tue, May 14, 2024 at 06:21:48PM -0400, Jason Merrill wrote: > > > >

Re: [PATCH 1/2] Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for vector mode.

CC for review. On Tue, May 21, 2024 at 1:12 PM liuhongt wrote: > > When mask is (1 << (prec - imm) - 1) which is used to clear upper bits > of A, then it can be simplified to LSHIFTRT. > > i.e Simplify > (and:v8hi > (ashifrt:v8hi A 8) > (const_vector 0xff x8)) > to > (lshifrt:v8hi A 8) > > Bo

[to-be-committed][v2][RISC-V] Use bclri in constant synthesis

Testing with Zbs enabled by default showed a minor logic error. After the loop clearing things with bclri, we can only use the sequence if we were able to clear all the necessary bits. If any bits are still on, then the bclr sequence turned out to not be profitable. -- So this is conceptual

[PATCH V2] RISC-V: Fix missing boolean_expression in zmmul extension

Update v1->v2 Add testcase for this patch. Missing boolean_expression TARGET_ZMMUL in riscv_rtx_costs() cause different instructions when multiplying an integer with a constant. ( https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1482 ) int foo(int *ib) { *ib = *ib * 33938;

Re: [PATCH] RISC-V: Avoid splitting store dataref groups during SLP discovery

On Thu, 23 May 2024, Richard Biener wrote: > The following avoids splitting store dataref groups during SLP > discovery but instead forces (eventually single-lane) consecutive > lane SLP discovery for all lanes of the group, creating VEC_PERM > SLP nodes merging them so the store will always cover

Re: [C PATCH]: allow aliasing of compatible types derived from enumeral types [PR115157]

On Thu, 23 May 2024, Ian Lance Taylor wrote: > On Thu, May 23, 2024 at 2:48 PM Martin Uecker wrote: > > > > Am Donnerstag, dem 23.05.2024 um 14:30 -0700 schrieb Ian Lance Taylor: > > > On Thu, May 23, 2024 at 2:00 PM Joseph Myers wrote: > > > > > > > > On Tue, 21 May 2024, Martin Uecker wrote: >

[PATCH-1v3, rs6000] Implement optab_isinf for SFDF and IEEE128

Hi, This patch implemented optab_isinf for SFDF and IEEE128 by test data class instructions. Compared with previous version, the main change is to narrow down the predict for float operand according to review's advice. https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652128.html Bootstrap

[PATCH-2v3, rs6000] Implement optab_isfinite for SFDF and IEEE128

Hi, This patch implemented optab_isfinite for SFDF and IEEE128 by test data class instructions. Compared with previous version, the main change is to narrow down the predict for float operand according to review's advice. https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652129.html Bootst

[PATCH-3v3, rs6000] Implement optab_isnormal for SFDF and IEEE128

Hi, This patch implemented optab_isnormal for SFDF and IEEE128 by test data class instructions. Compared with previous version, the main change is to narrow down the predict for float operand according to review's advice. https://gcc.gnu.org/pipermail/gcc-patches/2024-May/652130.html Bootst

Re: [PATCH] Use simple_dce_from_worklist in phiprop

On Thu, May 23, 2024 at 10:55 PM Andrew Pinski wrote: > > I noticed that phiprop leaves around phi nodes which > defines a ssa name which is unused. This just adds a > bitmap to mark those ssa names and then calls > simple_dce_from_worklist at the very end to remove > those phi nodes and all of th

Re: [PATCH] [RFC] Target-independent store forwarding avoidance. [PR48696] Target-independent store forwarding avoidance.

On Thu, 23 May 2024, Manolis Tsamis wrote: > This pass detects cases of expensive store forwarding and tries to avoid them > by reordering the stores and using suitable bit insertion sequences. > For example it can transform this: > > strbw2, [x1, 1] > ldr x0, [x1] # Epxens

Re: [PATCH] MATCH: Look through VIEW_CONVERT when folding VEC_PERM_EXPRs.

On Wed, 22 May 2024, Manolis Tsamis wrote: > The match.pd patterns to merge two vector permutes into one fail when a > potentially no-op view convert expressions is between the two permutes. > This change lifts this restriction. > > gcc/ChangeLog: > > * match.pd: Allow no-op view_convert b

RE: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

Thanks Jeff and Richard for suggestion and reviewing. Have another try in phiopt to do the convert from PHI to stmt = cond ? a : b. It can perform the convert from PHI to stmt = cond ? a : b successfully, and then the widen-mul is able to do the recog to .SAT_ADD. For now, to limit the risck, th

Re: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

On Fri, May 24, 2024 at 8:37 AM Li, Pan2 wrote: > > Thanks Jeff and Richard for suggestion and reviewing. > > Have another try in phiopt to do the convert from PHI to stmt = cond ? a : b. > It can perform the convert from PHI to stmt = cond ? a : b successfully, and > then > the widen-mul is able

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