Hi Robin,
On 2023/11/7 15:57, Robin Dapp wrote:
Thanks, what I was slightly concerned about is that we now have
the implicit assumption that the initial value is 0. I mean
that's what the vectorizer does for reductions but theoretically,
wouldn't we also combine other values into 0 now?
Sorry
Previously, in this patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635392.html
I use vect64 && vect128 to represent both RVV and AMDGCN. However, it caused
additional FAIL on ARM SVE.
I don't know why ARM SVE vect64 is set as true since their AdvSIMD is 128bit
vector and they don
Hi,
this patch makes sure we check for
note: Basic block will be vectorized using SLP
instead of
optimized: basic block
which will also match
optimized: basic block part
of which there are many more in an RVV dump.
Tested on x86 and aarch64 as well as RVV.
Regards
Robin
gcc/testsuite/Cha
On Tue, Nov 7, 2023 at 7:08 AM liuhongt wrote:
>
> analyze_and_compute_bitop_with_inv_effect assumes the first operand is
> loop invariant which is not the case when it's INTEGER_CST.
>
> Bootstrapped and regtseted on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
So this addresses a missed optimiza
As I know my lack of C++ FE knowledge, I would appreciate very much if
someone could have a look to reduce the chance that I did something
stupid or missed something obvious...
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633782.html
Tobias
On 20.10.23 18:49, Tobias Burnus wrote:
Thi
On Tue, 7 Nov 2023, Robin Dapp wrote:
> Hi,
>
> this restricts tree-ifcvt to only create COND_OPs when we versioned the
> loop for vectorization. Apart from that it re-creates a VEC_COND_EXPR
> in vect_expand_fold_left if we emitted a COND_OP.
>
> I'm still missing the "bail out" part for vect_
Hi,
similar to before this modifies a check so we do only match a
vectorization attempt if it succeeded. On riscv we potentially try
several modes of which some may fail.
I tested on riscv, aarch64 and x86 but on the cfarm machines
there is no vect_fold_extract_last. Maybe gcn would work?
Rega
On Mon, Nov 6, 2023 at 7:15 PM Andrew MacLeod wrote:
>
> As requested porting this patch from trunk resolves this PR in GCC 13.
>
> Bootstraps on x86_64-pc-linux-gnu with no regressions. OK for the gcc
> 13 branch?
The change caused PR110540 on trunk (still unfixed). I don't think we want to
tr
On Tue, Nov 7, 2023 at 9:22 AM Robin Dapp wrote:
>
> Hi,
>
> similar to before this modifies a check so we do only match a
> vectorization attempt if it succeeded. On riscv we potentially try
> several modes of which some may fail.
OK.
> I tested on riscv, aarch64 and x86 but on the cfarm machi
Hi, Robin.
/* { dg-final { scan-tree-dump-times "optimizing condition reduction with
FOLD_EXTRACT_LAST" 4 "vect" { target { { vect_fold_extract_last } && { !
vect_pack_trunc } } } } } */
This check should be removed. Previously, I added it since we didn't enable
vect_pack_trunc test.
But I thin
On Tue, Nov 7, 2023 at 9:07 AM Robin Dapp wrote:
>
> Hi,
>
> this patch makes sure we check for
> note: Basic block will be vectorized using SLP
> instead of
> optimized: basic block
> which will also match
> optimized: basic block part
> of which there are many more in an RVV dump.
>
> Test
On Tue, Nov 7, 2023 at 9:07 AM Juzhe-Zhong wrote:
>
> Previously, in this patch:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635392.html
> I use vect64 && vect128 to represent both RVV and AMDGCN. However, it caused
> additional FAIL on ARM SVE.
> I don't know why ARM SVE vect64 is
Sorry, didn't reply-all:
> /* { dg-final { scan-tree-dump-times "optimizing condition reduction with
> FOLD_EXTRACT_LAST" 4 "vect" { target { { vect_fold_extract_last } && { !
> vect_pack_trunc } } } } } */
>
> This check should be removed. Previously, I added it since we didn't enable
> vect_
As https://godbolt.org/z/hPsqahEa5 shows.
RVV failed dump check since "vectorizing stmts using SLP" shows 3 times instead
of 2.
The root cause is this code in main:
if (a[0] != 1
|| a[1] != 2
|| a[2] != 3
|| a[3] != 4
|| a[4] != 7
|| a[5] != 0
|| a[6] != 0
From: Eric Botcazou
This occurs when the component is part of a discriminated type and its
offset depends on a discriminant, the problem being that the front-end
generates an incomplete Bit_Position attribute reference.
gcc/ada/
* exp_pakd.adb (Get_Base_And_Bit_Offset): Use the full com
From: Viljar Indus
Restore the original state of Style_Check pragmas before analyzing
each compilation unit to avoid Style_Check pragmas from unit affecting
the style checks of a different unit.
gcc/ada/
* sem_ch10.adb: (Analyze_Compilation_Unit): Restore the orignal
state of st
From: Viljar Indus
gcc/ada/
* sem_prag.adb: (Analyze_Pragma): Reduce the number of nested if
statements.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_prag.adb | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git
From: Piotr Trojanek
Avoid potentially unnecessary call to Etype.
gcc/ada/
* sem_util.adb (Get_Actual_Subtype_If_Available): Only call Etype
when necessary.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_util.adb | 4 +---
1 file changed, 1 insertion(+),
From: Piotr Trojanek
Style cleanup.
gcc/ada/
* exp_pakd.adb (Setup_Inline_Packed_Array_Reference): Remove extra
whitespace from the list of parameters.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_pakd.adb | 20 ++--
1 file changed, 10 i
From: Piotr Trojanek
gcc/ada/
* sem_util.adb
(Get_Actual_Subtype,Get_Actual_Subtype_If_Available): Fix handling
of expanded names.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_util.adb | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
di
From: Bob Duff
The compiler gives a wrong error for a call of the form X.Y(...)
when Y is inherited indirectly via an interface.
gcc/ada/
* sem_ch4.adb (Is_Private_Overriding): Return True in the case
where a primitive operation is publicly inherited but privately
overri
From: Piotr Trojanek
Cleanup; semantics is unaffected.
gcc/ada/
* exp_pakd.adb
(Expand_Bit_Packed_Element_Set): Change local Decl object from
variable to constant.
(Setup_Inline_Packed_Array_Reference): Likewise for Csiz.
Tested on x86_64-pc-linux-gnu, committed
From: Piotr Trojanek
Expansion of assignments to packed array objects with string literals on
the right-hand side, created an unnecessary conversion, i.e.:
... :=
component_type
(declare
temp : component_type := "string_literal";
begin
temp)
Now the expansio
From: Piotr Trojanek
The new handling of aspects stores the aspect expression as the
Expression_Copy of the aspect and not as the Entity of the aspect
identified. This has been changed for most of the aspects, but not for
Type_Invariant and Default_Initial_Condition, which have custom
expansion.
From: Piotr Trojanek
When expanding assignment to a packed array object, e.g. a formal
parameter with mode OUT that might have unconstrained type, we took the
component type and component size from the constrained actual subtype.
It is simpler to take these properties from the nominal type of the
From: Piotr Trojanek
If an expression value is not known at compile time, it can be
represented with No_Uint and doesn't require a dedicated flag.
Code cleanup; behavior is unaffected.
gcc/ada/
* exp_pakd.adb (Expand_Bit_Packed_Element_Set): Remove Rhs_Val_Known;
represent unkn
From: Eric Botcazou
The problem occurs when the function call is the operand of an equality
operator, the type used to do the comparison is declared outside of the
generic construct but visible inside it, and this generic construct also
declares two functions with the same profile except for the
From: Piotr Trojanek
Style cleanup.
gcc/ada/
* exp_pakd.adb, libgnarl/s-osinte__android.ads,
libgnarl/s-osinte__linux.ads, libgnarl/s-osinte__qnx.ads,
libgnarl/s-osinte__rtems.ads, libgnat/s-gearop.adb,
libgnat/s-poosiz.adb, sem_util.adb: Fix style.
Tested on x8
From: Eric Botcazou
The front-end now rewrites it as a renaming when it is initialized with a
function call and the same processing must be applied in the renaming case
as in the regular case for this kind of special objects.
gcc/ada/
* gcc-interface/decl.cc (gnat_to_gnu_entity) : Apply
From: Ronan Desplanques
-gnatwc has been correctly emitting warnings for expressions outside
of tests for a while, but its documentation in the user's guide had
never been updated to reflect that. Also, the documentation used
"conditional expressions" to designate boolean expressions, but
"condit
From: Piotr Trojanek
Expansion of assignments to packed array objects has two cases and
had duplicated code for both these cases.
gcc/ada/
* exp_pakd.adb (Expand_Bit_Packed_Element_Set): Remove code from the
ELSE branch, because it was is identical to code before the IF
From: Piotr Trojanek
gcc/ada/
* exp_ch6.adb, exp_disp.adb, sem_ch13.adb, sem_ch3.adb: Fix newly
detected violations.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_ch6.adb | 2 +-
gcc/ada/exp_disp.adb | 2 +-
gcc/ada/sem_ch13.adb | 2 +-
gcc/ada/sem_ch3.a
From: Bob Duff
This patch fixes a bug: if "for T'Alignment use..." is followed
by "for T use ();" the compiler crashes. A workaround is
to move the alignment clause after the enumeration rep clause.
gcc/ada/
* sem_ch13.ads (Set_Enum_Esize): Do not set alignment.
* sem_ch13.adb (
From: Piotr Trojanek
We had a GNATcheck rule that suggests replacing "not Present (...)" with
"No (...)", but it only detected calls with a parameter of type Node_Id.
Now this rules also detects parameters of type Elist_Id.
gcc/ada/
* sem_ch3.adb, sem_ch4.adb, sem_eval.adb: Fix newly de
Hi David,
Thanks for that interesting RFC ! I'm fully in favor of such
improvements, having uniformed error messages across gcc, gas and
later ld, would greatly help integration of these tools, let alone the
SARIF format output.
However, I'm not sure how you're planning to make the transition. But
PR target/112420
gcc/testsuite/ChangeLog:
* gcc.dg/vect/pr65518.c: Fix check for RVV.
---
gcc/testsuite/gcc.dg/vect/pr65518.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/vect/pr65518.c
b/gcc/testsuite/gcc.dg/vect/pr65518.c
index 3
From: Eric Botcazou
When the array is initialized with the result of a call to a function whose
result type is unconstrained, then the result is allocated with its bounds,
so the array can be rewritten as a renaming of the result in this case too.
gcc/ada/
* exp_ch3.adb (Expand_N_Object
From: Ronan Desplanques
Before this patch, Ada.Directories.Modification_Time called
GetFileAttributesExA under the hood on Windows. That would sometimes
fail to work with files whose names were non-ASCII.
This patch replaces the call to GetFileAttributesExA with a call to
GetFileAttributesEx pre
>
> You also drop (copysign, x, CST) -> abx (x) when x is not negative - I think
> that's
> still worthwhile as it has one less argument?
>
> Keeping that might also need less testsuite adjustments?
Done but still needed the testsuite updates.
Bootstrapped Regtested on aarch64-none-linux-gnu a
From: Eric Botcazou
No functional changes.
gcc/ada/
* gen_il-gen-gen_nodes.adb (N_Op_Boolean): Fix description.
* sem_ch4.adb (Analyze_Comparison_Equality_Op): Tidy up.
* sem_ch12.adb (Copy_Generic_Node): Use N_Op_Compare subtype.
Tested on x86_64-pc-linux-gnu, committe
From: Viljar Indus
In the previous implementation Aspect Specifications were
stored in a separate table and not directly under each node.
This implementation included a lot of extra code that needed
to be maintained manually.
The new implementation stores Aspect_Specfications as a syntactic
fiel
From: Yannick Moy
Function Sem_Aux.Is_Limited_View returns whether the type is
"inherently limited" in a slightly different way from the "immutably
limited" definition in Ada 2012. Rename for clarity.
gcc/ada/
* exp_aggr.adb: Apply the renaming.
* exp_ch3.adb: Same.
* ex
From: Julien Bortolussi
Update the logo and the background color in the top right corner of the
GNAT User’s Guide for Native Platforms
gcc/ada/
* doc/share/conf.py: Changed the background color and the logo.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/doc/share/co
From: Eric Botcazou
It comes from an incomplete optimization performed by LTO that is caused by
an obsolete transformation done in Gigi, which is redundant with the common
uniquization of constant CONSTRUCTORs now performed during gimplification.
gcc/ada/
* gcc-interface/trans.cc (gnat_
On Tue, 7 Nov 2023, Tamar Christina wrote:
> >
> > You also drop (copysign, x, CST) -> abx (x) when x is not negative - I
> > think that's
> > still worthwhile as it has one less argument?
> >
> > Keeping that might also need less testsuite adjustments?
>
> Done but still needed the testsuite
Hi,
"Kewen.Lin" writes:
> Hi,
>
> on 2023/11/6 15:20, Jiufu Guo wrote:
>> Hi,
>>
>> With latest trunk, case pr106550_1.c can run with failure on ppc under -m32.
>> While, the case is testing 64bit constant building. So, "has_arch_ppc64"
>> is required.
>
> Please also mention that it failed w
On Mon, 6 Nov 2023, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Monday, November 6, 2023 2:25 PM
> > To: Tamar Christina
> > Cc: gcc-patches@gcc.gnu.org; nd
> > Subject: Re: [PATCH v6 0/21]middle-end: Support early break/return auto-
> > vectorizatio
From: Christoph Müllner
stdint.h can be replaced with stdint-gcc.h to resolve some missing
system headers in non-multilib installations.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/xtheadmemidx-helpers.h:
Replace stdint.h with stdint-gcc.h.
Signed-off-by: Christoph Müllner
---
On Mon, 6 Nov 2023, Tamar Christina wrote:
> Hi All,
>
> This adds pragma GCC novector to testcases that have showed up
> since last regression run and due to this series detecting more.
>
> Is it ok that when it comes time to commit I can just update any
> new cases before committing? since thi
On Tue, Nov 7, 2023 at 2:19 AM Kito Cheng wrote:
>
> LGTM, and maybe change stdint.h to stdint-gcc.h in
> xtheadmemidx-helpers.h? that could make it more portable on multi-lib
> testing.
Can be found here:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635508.html
Thanks!
>
> On Tue, N
On Mon, 6 Nov 2023, Tamar Christina wrote:
> Hi All,
>
> This adds new test to check for all the early break functionality.
> It includes a number of codegen and runtime tests checking the values at
> different needles in the array.
>
> They also check the values on different array sizes and pee
[adding libstdc++@]
On Nov 5, 2023, Mike Stump wrote:
> Ick.
Indeed ;-)
> I wish there were fewer changed lines and not 1 per test
> case. It feels like we've painted ourselves into a corner.
The libstdc++ testsuite took a different approach, detecting missing
headers (and libraries?) at err
On 06.11.2023 23:29, David Malcolm wrote:
> Here's a patch for gas in binutils that makes it use libdiagnostics
> (with some nasty hardcoded paths to specific places on my hard drive
> to make it easier to develop the API).
>
> For now this hardcodes adding two sinks: a text sink on stderr, and
>
On 07/11/2023 07:44, Juzhe-Zhong wrote:
This test shows vectorizing stmts using SLP 4 times instead of 2 for RVV.
The reason is RVV has 512 bit vector.
Here is comparison between RVV ans ARM SVE:
https://godbolt.org/z/xc5KE5rPs
But I notice AMDGCN also has 512 bit vector, seems this patch will c
So, this patch not only fixes RVV FAIL, but also fixes GCN ?
juzhe.zh...@rivai.ai
From: Andrew Stubbs
Date: 2023-11-07 18:09
To: Juzhe-Zhong; gcc-patches@gcc.gnu.org
CC: jeffreya...@gmail.com; rguent...@suse.de
Subject: Re: [PATCH] test: Fix FAIL of pr97428.c for RVV
On 07/11/2023 07:44, Juzh
LGTM, but title is little bit misleading, it's not really related to rvv,
change to either RISC-V or T-head is fine, anyway, you can commit without
send v2 :)
Christoph Muellner 於 2023年11月7日 週二 17:45 寫道：
> From: Christoph Müllner
>
> stdint.h can be replaced with stdint-gcc.h to resolve some mi
On Tue, 7 Nov 2023 at 10:04, Alexandre Oliva wrote:
>
> [adding libstdc++@]
>
> On Nov 5, 2023, Mike Stump wrote:
>
> > Ick.
>
> Indeed ;-)
>
> > I wish there were fewer changed lines and not 1 per test
> > case. It feels like we've painted ourselves into a corner.
>
> The libstdc++ testsuite to
Hello,
Harald's review of the previous version [1] of these patches spotted a possible
misbehaving case in one patch, and a latent bug in the area of the second
patch.
So here is the second try, bootstraped and regression tested on
x86_64-pc-linux-gnu.
OK for master?
Mikael
[1]:
https://gcc.gnu
Remove the early return present in function templates for transformational
functions doing a (masked) reduction of an array along a dimension.
This early return, which triggered if the extent in the reduction dimension
was zero, was wrong because even if the reduction operation degenerates to
a con
The introduction of further architectural-feature dependent ifuncs
for AArch64 makes hard-coding ifunc `_i' suffixes to functions
cumbersome to work with. It is awkward to remember which ifunc maps
onto which arch feature and makes the code harder to maintain when new
ifuncs are added and their su
On Tue, 7 Nov 2023 at 10:18, Jonathan Wakely wrote:
>
> On Tue, 7 Nov 2023 at 10:04, Alexandre Oliva wrote:
> >
> > [adding libstdc++@]
> >
> > On Nov 5, 2023, Mike Stump wrote:
> >
> > > Ick.
> >
> > Indeed ;-)
> >
> > > I wish there were fewer changed lines and not 1 per test
> > > case. It f
The armv9.4-a architectural revision adds three new atomic operations
associated with the LSE128 feature:
* LDCLRP - Atomic AND NOT (bitclear) of a location with 128-bit
value held in a pair of registers, with original data loaded into
the same 2 registers.
* LDSETP - Atomic OR (bitset) of
Building upon Wilco Dijkstra's work on AArch64 128-bit atomics for
Libatomic, namely the patches from [1] and [2], this patch series
extends the library's capabilities to dynamically select and emit
Armv9.4-a LSE128 implementations of atomic operations via ifuncs at
run-time whenever architectura
Given the introduction of system registers associated with the Guarded
Control Stack extension to Armv9.4-a in Binutils and their reliance on
the `+gcs' modifier, we implement the necessary changes in GCC to
allow for them to be recognized by the compiler.
gcc/ChangeLog:
* config/aarch64/
This patch updates `aarch64-sys-regs.def', bringing it into sync with
the Binutils source.
gcc/ChangeLog:
* config/aarch64/aarch64-sys-regs.def (par_el1): New.
(rcwmask_el1): Likewise.
(rcwsmask_el1): Likewise.
(ttbr0_el1): Likewise.
(ttbr0_el12): Likewise.
Given the introduction of optional 128-bit page table descriptor and
translation hardening extension support with the Arm9.4-a
architecture, this introduces the relevant flags to enable the reading
and writing of 128-bit system registers.
The `+d128' -march modifier enables the use of the followin
Given the introduction of optional 128-bit page table descriptor and
translation hardening extension support with the Arm9.4-a
architecture, this patch series introduces the necessary changes to
the aarch64-specific builtin code to enable the reading and writing of
128-bit system registers. In so
Extend existing unit tests for the ACLE system register manipulation
functions to include 128-bit tests.
gcc/testsuite/ChangeLog:
* gcc/testsuite/gcc.target/aarch64/acle/rwsr.c (get_rsr128): New.
(set_wsr128): Likewise.
---
gcc/testsuite/gcc.target/aarch64/acle/rwsr.c | 30 ++
Implement the ACLE builtins for 128-bit system register manipulation:
* __uint128_t __arm_rsr128(const char *special_register);
* void __arm_wsr128(const char *special_register, __uint128_t value);
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.cc (AARCH64_RSR128): New
`enu
On Tue, 7 Nov 2023 at 10:24, Jonathan Wakely wrote:
>
> On Tue, 7 Nov 2023 at 10:18, Jonathan Wakely wrote:
> >
> > On Tue, 7 Nov 2023 at 10:04, Alexandre Oliva wrote:
> > >
> > > [adding libstdc++@]
> > >
> > > On Nov 5, 2023, Mike Stump wrote:
> > >
> > > > Ick.
> > >
> > > Indeed ;-)
> > >
On Tue, Nov 7, 2023 at 11:16 AM Kito Cheng wrote:
>
> LGTM, but title is little bit misleading, it's not really related to rvv,
> change to either RISC-V or T-head is fine, anyway, you can commit without
> send v2 :)
Fixed and pushed.
Thanks!
>
> Christoph Muellner 於 2023年11月7日 週二 17:45 寫道：
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, November 7, 2023 9:43 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd
> Subject: RE: [PATCH v6 0/21]middle-end: Support early break/return auto-
> vectorization
>
> On Mon, 6 Nov 2023, Tamar Christina wrote:
>
> >
On Mon, 6 Nov 2023, Tamar Christina wrote:
> Hi All,
>
> When performing early break vectorization we need to be sure that the vector
> operations are safe to perform. A simple example is e.g.
>
> for (int i = 0; i < N; i++)
> {
>vect_b[i] = x + i;
>if (vect_a[i]*2 != x)
> break;
On Mon, 6 Nov 2023, Richard Biener wrote:
> On Mon, 6 Nov 2023, Jonathan Wakely wrote:
>
> > On Mon, 6 Nov 2023 at 11:52, Richard Biener wrote:
> > >
> > > The following makes the C++98 locale init path follow the way the
> > > C++11 performs initialization. This way we deal with pthread_once
>
On 07/11/2023 10:10, juzhe.zh...@rivai.ai wrote:
So, this patch not only fixes RVV FAIL, but also fixes GCN ?
Before the patch I have:
PASS: gcc.dg/vect/pr97428.c (test for excess errors)
PASS: gcc.dg/vect/pr97428.c scan-tree-dump vect "Detected interleaving
load of size 8"
PASS: gcc.dg/vect/
Could you try this ?
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {
xfail { { ! vect_hw_misalign } || { vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" {
xfail { ! vect512 } } } } */
juzhe.zh...@rivai.ai
From: A
On Tue, 2023-11-07 at 12:06 +0800, chenxiaolong wrote:
> +__m128i a,b,c;
> +
> +__asm__ ("vadd.d %w0,%w1,%w2\n\t"
> + :"=f" (c)
> + :"f" (a),"f" (b)
> + :"cc");
This example does not work for me, with the definition of __m128i in
another patch:
typedef long long __m128i __attribute__ ((__v
On Tue, 2023-11-07 at 19:10 +0800, Xi Ruoyao wrote:
> On Tue, 2023-11-07 at 12:06 +0800, chenxiaolong wrote:
> > +__m128i a,b,c;
> > +
> > +__asm__ ("vadd.d %w0,%w1,%w2\n\t"
> > + :"=f" (c)
> > + :"f" (a),"f" (b)
> > + :"cc");
>
> This example does not work for me, with the definition of __
On 07/11/2023 11:05, juzhe.zh...@rivai.ai wrote:
Could you try this ?
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2
"vect" { xfail { { ! vect_hw_misalign } || { vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4
"vect" { xfail { ! v
Do you mean this ?
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {
target { { ! vect_hw_misalign } || { vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" {
xfail { ! vect512 } } } } */
Could you try again ? If it works
Oh. Sorry maybe it's better like this:
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {
target { { ! vect_hw_misalign } || { vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" {
target { ! vect512 } } } } */
juzhe.zh..
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, November 7, 2023 10:53 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: Re: [PATCH 3/21]middle-end: Implement code motion and
> dependency analysis for early breaks
>
> On Mon, 6 Nov
On 07/11/2023 11:24, juzhe.zh...@rivai.ai wrote:
Oh. Sorry maybe it's better like this:
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2
"vect" { target { { ! vect_hw_misalign } || { vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4
"
On Mon, 6 Nov 2023 at 12:52, Richard Biener wrote:
>
> On Mon, 6 Nov 2023, Jonathan Wakely wrote:
>
> > On Mon, 6 Nov 2023 at 11:52, Richard Biener wrote:
> > >
> > > The following makes the C++98 locale init path follow the way the
> > > C++11 performs initialization. This way we deal with pthr
Like all other targets, we add RISC-V into vect_cmdline_needed.
This patch fixes following FAILs:
FAIL: gcc.dg/tree-ssa/gen-vect-11b.c scan-tree-dump-times vect "vectorized 0
loops" 1
FAIL: gcc.dg/tree-ssa/gen-vect-11c.c scan-tree-dump-times vect "vectorized 0
loops" 1
FAIL: gcc.dg/tree-ssa/gen
Sorry I made a mistake here.
Does it work for you ?
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {
target { { vect_hw_misalign } && { ! vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" {
target { vect512 } } } } */
Looks OK but I don't really get the test (e.g. gen-vect-26.c). It is
only ran if target vect_cmdline_needed, otherwise compiled? Why does
that have an impact on the scan? Looks weird but well...
Regards
Robin
On 07/11/2023 12:03, juzhe.zh...@rivai.ai wrote:
Sorry I made a mistake here.
Does it work for you ?
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2
"vect" { target { { vect_hw_misalign } && { ! vect512 } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts u
It need command line to enable SIMD auto-vectorization (VLS mode in RVV).
It will enable VLS modes auto-vectorization by default if we didn't add RISCV
into vect_cmdline.
So adding it to disable VLS mode vectorization which will fix the FAILs like
other targets.
juzhe.zh...@rivai.ai
From: Ro
Thanks a lot ! I will send V2 for Richi to review.
juzhe.zh...@rivai.ai
From: Andrew Stubbs
Date: 2023-11-07 20:05
To: juzhe.zh...@rivai.ai; gcc-patches
CC: jeffreyalaw; rguenther
Subject: Re: [PATCH] test: Fix FAIL of pr97428.c for RVV
On 07/11/2023 12:03, juzhe.zh...@rivai.ai wrote:
> Sorry
> It need command line to enable SIMD auto-vectorization (VLS mode in RVV).
> It will enable VLS modes auto-vectorization by default if we didn't add RISCV
> into vect_cmdline.
> So adding it to disable VLS mode vectorization which will fix the FAILs like
> other targets.
Ah so it's about SIMD d
Thanks. Committed.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-11-07 20:10
To: juzhe.zh...@rivai.ai; gcc-patches
CC: rdapp.gcc; kito.cheng; Kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Add RISC-V into vect_cmdline_needed
> It need command line to enable SIMD auto-vectorization (VL
This test shows vectorizing stmts using SLP 4 times instead of 2 for RVV.
The reason is RVV has 512 bit vector.
Here is comparison between RVV ans ARM SVE:
https://godbolt.org/z/xc5KE5rPs
Confirm GCN also matches 4 SLP. This patch is passed on both GCN and RVV.
Ok for trunk ?
gcc/testsuite/Chang
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> PR target/112420
OK
> gcc/testsuite/ChangeLog:
>
> * gcc.dg/vect/pr65518.c: Fix check for RVV.
>
> ---
> gcc/testsuite/gcc.dg/vect/pr65518.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.dg/v
On Tue, Nov 7, 2023 at 4:10 PM Richard Biener
wrote:
>
> On Tue, Nov 7, 2023 at 7:08 AM liuhongt wrote:
> >
> > analyze_and_compute_bitop_with_inv_effect assumes the first operand is
> > loop invariant which is not the case when it's INTEGER_CST.
> >
> > Bootstrapped and regtseted on x86_64-pc-li
Committed, thanks Richard.
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, November 7, 2023 8:51 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] test: Fix FAIL of pr65518.c for RVV[PR112420]
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> This patch fixes:
> FAIL: gcc.dg/vect/bb-slp-cond-1.c -flto -ffat-lto-objects
> scan-tree-dump-times vect "loop vectorized" 1
> FAIL: gcc.dg/vect/bb-slp-cond-1.c scan-tree-dump-times vect "loop vectorized"
> 1
>
> For RVV, "loop vectorized" appears 2 ti
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> RVV didn't explictly enable DIV_POW2 optab but we cen vectorize it.
> We should check pattern recognition instead of explicit pattern check.
But I see
proc check_effective_target_vect_sdiv_pow2_si {} {
return [expr { ([istarget aarch64*-*-*]
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> As https://godbolt.org/z/hPsqahEa5 shows.
> RVV failed dump check since "vectorizing stmts using SLP" shows 3 times
> instead of 2.
>
> The root cause is this code in main:
>
> if (a[0] != 1
> || a[1] != 2
> || a[2] != 3
> || a[3] !=
On Tue, 7 Nov 2023, Juzhe-Zhong wrote:
> This test shows vectorizing stmts using SLP 4 times instead of 2 for RVV.
> The reason is RVV has 512 bit vector.
> Here is comparison between RVV ans ARM SVE:
> https://godbolt.org/z/xc5KE5rPs
>
> Confirm GCN also matches 4 SLP. This patch is passed on bo
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