RE: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

Thank Juzhe for review. Sure, let me hold the v3 for kito's comments. Pan From: juzhe.zh...@rivai.ai Sent: Wednesday, July 12, 2023 2:11 PM To: Li, Pan2 ; gcc-patches Cc: Robin Dapp ; jeffreyalaw ; Li, Pan2 ; Wang, Yanzhang ; kito.cheng Subject: Re: [PATCH v2] RISC-V: Refactor riscv mode aft

Re: [PATCH 1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.

Hi Xianmiao: > Hi Christoph and Kito, > > That's great that this bug has been resolved. If you merge this patch, > it would be best to also merge it to the gcc-13 branch. Yeah, that sounds reasonable, and the convention for backport is waiting 1 week to make sure it's stable, so will backport th

Re: [PATCH 1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.

Looks like I missed the OK on this one. I can pick it up today, unless you Kito already has it in flight? Thanks, Philipp. On Tue, 11 Jul 2023 at 17:51, Kito Cheng wrote: > Hi Christoph: > > Ooops, I thought Philipp will push those patches, does here any other > patches got approved but not com

Re: [PATCH 2/3] testsuite: Require 128-bit vectors for bb-slp-pr95839.c

On Tue, Jul 11, 2023 at 5:01 PM Maciej W. Rozycki wrote: > > On Fri, 7 Jul 2023, Richard Biener wrote: > > > > The bb-slp-pr95839.c test assumes quad-single float vector support, but > > > some targets only support pairs of floats, causing this test to fail > > > with such targets. Limit this tes

Re: [PATCH 3/3] testsuite: Require vectors of doubles for pr97428.c

On Tue, Jul 11, 2023 at 5:01 PM Maciej W. Rozycki wrote: > > On Fri, 7 Jul 2023, Richard Biener wrote: > > > > The pr97428.c test assumes support for vectors of doubles, but some > > > targets only support vectors of floats, causing this test to fail with > > > such targets. Limit this test to ta

Re: [PATCH v2] genopinit: Allow more than 256 modes.

On Tue, 11 Jul 2023, Robin Dapp wrote: > Attached is v2 that does not switch to uint64_t but stays within > 32 bits by shifting the optab by 20 and the mode(s) by 10 bits. LGTM. > Regards > Robin > > Upcoming changes for RISC-V will have us exceed 255 modes or 8 bits. > This patch increases th

Re: [PATCH 1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.

Yeah, I've applied patches on my local tree and running the testsuite. On Wed, Jul 12, 2023 at 3:11 PM Philipp Tomsich wrote: > > Looks like I missed the OK on this one. > I can pick it up today, unless you Kito already has it in flight? > > Thanks, > Philipp. > > On Tue, 11 Jul 2023 at 17:51, Ki

Re: [PATCH 1/1] riscv: thead: Fix ICE when enable XTheadMemPair ISA extension.

Awesome, thanks! On Wed, 12 Jul 2023 at 09:18, Kito Cheng wrote: > Yeah, I've applied patches on my local tree and running the testsuite. > > On Wed, Jul 12, 2023 at 3:11 PM Philipp Tomsich > wrote: > > > > Looks like I missed the OK on this one. > > I can pick it up today, unless you Kito alre

Re: [PATCH V2] Provide -fcf-protection=branch,return.

ping. On Mon, May 22, 2023 at 4:08 PM Hongtao Liu wrote: > > ping. > > On Sat, May 13, 2023 at 5:20 PM liuhongt wrote: > > > > > I think this could be simplified if you use either EnumSet or > > > EnumBitSet instead in common.opt for `-fcf-protection=`. > > > > Use EnumSet instead of EnumBitSet

Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > I understand your concern. I CC Richards to see whether this piece of codes > is unsafe. > > Hi, Richard and Richi: > > Jeff is worrying about this codes in "expand_gather_scatter" of supporting > len_mask_gather_load/len_mask_scatter_store i

RE: [x86 PATCH] Tweak ix86_expand_int_compare to use PTEST for vector equality.

> From: Hongtao Liu > Sent: 12 July 2023 01:45 > > On Wed, Jul 12, 2023 at 4:57 AM Roger Sayle > > > From: Hongtao Liu > > > Sent: 28 June 2023 04:23 > > > > From: Roger Sayle > > > > Sent: 27 June 2023 20:28 > > > > > > > > I've also come up with an alternate/complementary/supplementary > >

Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

Thanks Richard. Is it correct that the better way is to add optabs (len_strided_load/len_strided_store), then expand LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE to len_strided_load/len_strided_store optab (if it is strided load/store) in expand_gather_load_optab_fn expand_scatter_store_optab_fn

Re: [PATCH 0/9] Add btf_decl_tag C attribute

On Tue, Jul 11, 2023 at 11:58 PM David Faust via Gcc-patches wrote: > > Hello, > > This series adds support for a new attribute, "btf_decl_tag" in GCC. > The same attribute is already supported in clang, and is used by various > components of the BPF ecosystem. > > The purpose of the attribute is

Re: [RFC] Store_bit_field_1: Use mode of SUBREG instead of REG

On Wed, Jul 12, 2023 at 5:20 AM YunQiang Su wrote: > > PR #104914 > > When work with > int val; > ((unsigned char*)&val)[0] = *buf; > The RTX mode is obtained from REG instead of SUBREG, > which make D is used instead of . > Thus something wrong happens on sign-extend default architectures, >

Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > Thanks Richard. > > Is it correct that the better way is to add optabs > (len_strided_load/len_strided_store), > then expand LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE to > len_strided_load/len_strided_store optab (if it is strided load/store)

Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

Thanks Richard so much! I am gonna prepare V7 of this patch with dropping the strided load/store support on RISC-V backend. juzhe.zh...@rivai.ai From: Richard Biener Date: 2023-07-12 15:56 To: juzhe.zh...@rivai.ai CC: jeffreyalaw; gcc-patches; Kito.cheng; Robin Dapp; richard.sandiford Subjec

Re: [PATCH] aarch64: Fix warnings during libgcc build

The 07/11/2023 17:20, Florian Weimer wrote: > * Richard Earnshaw: > > > On 11/07/2023 10:37, Florian Weimer via Gcc-patches wrote: > >> libgcc/ > >>* config/aarch64/aarch64-unwind.h > >> (aarch64_cie_signed_with_b_key): > >>Add missing const qualifier. Cast from const unsigned char * > >>

[PATCH] RISC-V: Support integer mult highpart auto-vectorization

From: Ju-Zhe Zhong This patch is adding an obvious missing mult_high auto-vectorization pattern. Consider this following case: #define DEF_LOOP(TYPE) \ void __attribute__ ((noipa))\ mod_##TYPE (TYPE *__restrict dst, TYPE *__restrict src, int count)

Devirtualization of objects in array

Hello, I'm writing to seek for a review for an issue I filed some time ago. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110057 . A proposed patch is attached in the bug tracker as well. The gist of the issue is that in an array, we know the underlying type of the object. An array must hold the t

Re: Devirtualization of objects in array

On Wed, 2023-07-12 at 16:58 +0800, Ng YongXiang via Gcc-patches wrote: > I'm writing to seek for a review for an issue I filed some time ago. > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110057 . A proposed patch is > attached in the bug tracker as well. You should send the patch to gcc-patches@

Re: [PATCH v2] Implement new RTL optimizations pass: fold-mem-offsets.

On Mon, Jul 10, 2023 at 12:37 AM Hans-Peter Nilsson wrote: > > On Thu, 15 Jun 2023, Manolis Tsamis wrote: > > > This is a new RTL pass that tries to optimize memory offset calculations > > by moving them from add immediate instructions to the memory loads/stores. > > For example it can transform t

Re: [PATCH v2] Implement new RTL optimizations pass: fold-mem-offsets.

On Mon, Jul 10, 2023 at 12:58 AM Hans-Peter Nilsson wrote: > > On Sun, 9 Jul 2023, Hans-Peter Nilsson wrote: > > > On Thu, 15 Jun 2023, Manolis Tsamis wrote: > > > > > This is a new RTL pass that tries to optimize memory offset calculations > > > by moving them from add immediate instructions to t

Re: [PATCH] RISC-V: Support integer mult highpart auto-vectorization

LGTM, thanks:) 於 2023年7月12日 週三 16:40 寫道： > From: Ju-Zhe Zhong > > This patch is adding an obvious missing mult_high auto-vectorization > pattern. > > Consider this following case: > #define DEF_LOOP(TYPE) \ > void __attribute__ ((noipa))\ > mod_##TYP

Re: [PATCH] [vect]Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existed.

> int32_t x = (int32_t)0x1.0p32; > int32_t y = (int32_t)(int64_t)0x1.0p32; > > sets x to 2147483647 and y to 0. >>> >>> Hmm, good question. GENERIC has a direct truncation to unsigned char >>> for example, the C standard generally says if the integral part cannot >>> be represented

Re: [PATCH] VECT: Apply COND_LEN_* into vectorizable_operation

juzhe.zh...@rivai.ai writes: > From: Ju-Zhe Zhong > > Hi, Richard and Richi. > As we disscussed before, COND_LEN_* patterns were added for multiple > situations. > This patch apply CON_LEN_* for the following situation: > > Support for the situation that in "vectorizable_operation": > /* If ope

Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

Richard Biener writes: > On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > >> Thanks Richard. >> >> Is it correct that the better way is to add optabs >> (len_strided_load/len_strided_store), >> then expand LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE to >> len_strided_load/len_strided_store op

Re: [x86 PATCH] PR target/110598: Fix rega = 0; rega ^= rega regression.

On Tue, Jul 11, 2023 at 9:07 PM Roger Sayle wrote: > > > This patch fixes the regression PR target/110598 caused by my recent > addition of a peephole2. The intention of that optimization was to > simplify zeroing a register, followed by an IOR, XOR or PLUS operation > on it into a move, or as de

Re: Loop-ch improvements, part 1

On Tue, 11 Jul 2023, Jan Hubicka wrote: > Hi, > this patch improves profile update in loop-ch to handle situation where > duplicated header > has loop invariant test. In this case we konw that all count of the exit > edge belongs to > the duplicated loop header edge and can update probabilities

Re: [x86 PATCH] Fix FAIL of gcc.target/i386/pr91681-1.c

On Tue, Jul 11, 2023 at 10:07 PM Roger Sayle wrote: > > > The recent change in TImode parameter passing on x86_64 results in the > FAIL of pr91681-1.c. The issue is that with the extra flexibility, > the combine pass is now spoilt for choice between using either the > *add3_doubleword_concat or t

Re: [PATCH] Add __builtin_iseqsig()

ping**3 >> Le 6 juin 2023 à 20:15, FX Coudert a écrit : >> >> Hi, >> >> (It took me a while to get back to this.) >> >> This is a new and improved version of the patch at >> https://gcc.gnu.org/pipermail/gcc-patches/2022-October/602932.html >> It addresses the comment from Joseph that FE_INV

Re: Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

Thanks Richard. I have addressed all comments on V7 patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624220.html Drop vlse/vsse codegen optimization in RISC-V backend, instead I will support LEN_MASK_STRIDED_LOAD/LEN_MASK_STRIDE_STORE in the future. Thanks. juzhe.zh...@rivai.ai

Re: [PATCH 1/2] c++, libstdc++: implement __is_pointer built-in trait

On Wed, 12 Jul 2023 at 05:41, François Dumont via Libstdc++ wrote: > > > On 10/07/2023 07:23, Ken Matsui via Libstdc++ wrote: > > This patch implements built-in trait for std::is_pointer. > > > > gcc/cp/ChangeLog: > > > > * cp-trait.def: Define __is_pointer. > > * constraint.cc (diagno

Re: [PATCH 1/2] c++, libstdc++: implement __is_pointer built-in trait

On Mon, 10 Jul 2023 at 06:24, Ken Matsui via Libstdc++ wrote: > > This patch implements built-in trait for std::is_pointer. > > gcc/cp/ChangeLog: > > * cp-trait.def: Define __is_pointer. > * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER. > * semantics.cc (trai

Re: [PATCH v2 2/2] libstdc++: use new built-in trait __is_scalar for std::is_scalar

On Sat, 8 Jul 2023 at 05:47, Ken Matsui via Libstdc++ wrote: > > This patch gets std::is_scalar to dispatch to new built-in trait > __is_scalar. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_scalar): Use __is_scalar built-in > trait. > (is_scalar_v): Likewis

Re: [PATCH v2] libstdc++: use __is_enum built-in trait

On Sat, 8 Jul 2023 at 05:50, Ken Matsui via Libstdc++ wrote: > > This patch replaces is_enum::value with __is_enum built-in trait in > the type_traits header. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (__make_unsigned_selector): Use > __is_enum built-in trait. >

Re: [PATCH v2 1/2] c++, libstdc++: implement __is_pointer built-in trait

On Mon, 10 Jul 2023 at 06:51, Ken Matsui via Libstdc++ wrote: > > Hi, > > Here is the benchmark result for is_pointer: > > https://github.com/ken-matsui/gcc-benches/blob/main/is_pointer.md#sun-jul--9-103948-pm-pdt-2023 > > Time: -62.1344% > Peak Memory Usage: -52.4281% > Total Memory Usage: -53.58

Re: [PATCH 2/2] libstdc++: use new built-in trait __is_signed

On Sun, 9 Jul 2023 at 09:50, Ken Matsui via Libstdc++ wrote: > > This patch lets libstdc++ use new built-in trait __is_signed. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_signed): Use __is_signed built-in trait. > (is_signed_v): Likewise. > > Signed-off-by: Ken Ma

Re: [PATCH v4 2/2] libstdc++: use new built-in trait __is_unsigned

On Sat, 8 Jul 2023 at 12:14, Ken Matsui via Libstdc++ wrote: > > This patch lets libstdc++ use new built-in trait __is_unsigned. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_unsigned): Use __is_unsigned built-in > trait. > (is_unsigned_v): Likewise. > > Sig

Re: [pushed][LRA][PR110372]: Refine reload pseudo class

Vladimir Makarov via Gcc-patches writes: > The following patch solves > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110372 > > The patch was successfully bootstrapped and tested on x86-64. > > commit 1f7e5a7b91862b999aab88ee0319052aaf00f0f1 > Author: Vladimir N. Makarov > Date: Fri Jul 7 09:

Re: [PATCH v8 2/6] libstdc++: use new built-in trait __is_reference for std::is_reference

On Sat, 8 Jul 2023 at 06:13, Ken Matsui via Libstdc++ wrote: > > This patch gets std::is_reference to dispatch to new built-in trait > __is_reference. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_reference): Use __is_reference built-in > trait. > (is_refere

Re: [PATCH v8 4/6] libstdc++: use new built-in trait __is_function for std::is_function

On Sat, 8 Jul 2023 at 06:15, Ken Matsui via Libstdc++ wrote: > > This patch gets std::is_function to dispatch to new built-in trait > __is_function. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_function): Use __is_function built-in > trait. > (is_function_v

RE: [PATCH] RISC-V: Support integer mult highpart auto-vectorization

Committed, thanks Kito. Pan -Original Message- From: Gcc-patches On Behalf Of Kito Cheng via Gcc-patches Sent: Wednesday, July 12, 2023 5:17 PM To: 钟居哲 Cc: GCC Patches ; Kito Cheng ; Jeff Law ; Robin Dapp Subject: Re: [PATCH] RISC-V: Support integer mult highpart auto-vectorization

Re: [PATCH 1/2] c++, libstdc++: implement __is_signed built-in trait

On Sun, 9 Jul 2023 at 09:50, Ken Matsui via Libstdc++ wrote: > > This patch implements built-in trait for std::is_signed. > > gcc/cp/ChangeLog: > > * cp-trait.def: Define __is_signed. > * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SIGNED. > * semantics.cc (trait_ex

Re: [PATCH v2 2/2] libstdc++: use new built-in trait __remove_pointer

On Sat, 8 Jul 2023 at 06:31, Ken Matsui via Libstdc++ wrote: > > This patch lets libstdc++ use new built-in trait __remove_pointer. > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (remove_pointer): Use __remove_pointer > built-in trait. > > Signed-off-by: Ken Matsui OK for tru

Re: [PATCH] simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]

Richard Biener via Gcc-patches writes: > On Mon, Jul 10, 2023 at 1:01 PM Uros Bizjak wrote: >> >> On Mon, Jul 10, 2023 at 11:47 AM Richard Biener >> wrote: >> > >> > On Mon, Jul 10, 2023 at 11:26 AM Uros Bizjak wrote: >> > > >> > > On Mon, Jul 10, 2023 at 11:17 AM Richard Biener >> > > wrote:

[PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

From: Ju-Zhe Zhong Hi, Richard and Richi. As we disscussed before, COND_LEN_* patterns were added for multiple situations. This patch apply CON_LEN_* for the following situation: Support for the situation that in "vectorizable_operation": /* If operating on inactive elements could generate spu

Re: Re: [PATCH] VECT: Apply COND_LEN_* into vectorizable_operation

Thank you so much. I have addressed all comments with V2 patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624237.html Could you take a look at it whether it looks reasonable to you? Thanks. juzhe.zh...@rivai.ai From: Richard Sandiford Date: 2023-07-12 17:29 To: juzhe.zhong CC: gcc-

Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

On Wed, 12 Jul 2023, Richard Sandiford wrote: > Richard Biener writes: > > On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > > > >> Thanks Richard. > >> > >> Is it correct that the better way is to add optabs > >> (len_strided_load/len_strided_store), > >> then expand LEN_MASK_GATHER_LOAD/LEN_

Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

juzhe.zh...@rivai.ai writes: > From: Ju-Zhe Zhong > > Hi, Richard and Richi. > As we disscussed before, COND_LEN_* patterns were added for multiple > situations. > This patch apply CON_LEN_* for the following situation: > > Support for the situation that in "vectorizable_operation": > /* If ope

Re: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

Thank you so much. I am gonna wait for Richi's final approval. Thanks. juzhe.zh...@rivai.ai From: Richard Sandiford Date: 2023-07-12 18:53 To: juzhe.zhong CC: gcc-patches; rguenther Subject: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation juzhe.zh...@rivai.ai writes: > From:

Re: [PATCH] simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]

On Wed, Jul 12, 2023 at 12:23 PM Richard Sandiford wrote: > > Richard Biener via Gcc-patches writes: > > On Mon, Jul 10, 2023 at 1:01 PM Uros Bizjak wrote: > >> > >> On Mon, Jul 10, 2023 at 11:47 AM Richard Biener > >> wrote: > >> > > >> > On Mon, Jul 10, 2023 at 11:26 AM Uros Bizjak wrote: >

Re: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

On Wed, 12 Jul 2023, juzhe.zh...@rivai.ai wrote: > Thank you so much. > I am gonna wait for Richi's final approval. It's good enough when either of us approves unless we explicitely ask to wait for somebody else. LGTM anyway. Richard. > Thanks. > > > juzhe.zh...@rivai.ai > > From: Richard

Re: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

Hi, Richard. I just notice: + The values of the remaining elements are undefined. This is not true for RVV. Actually we want it to be old value that's why we have additional pass through operand. For reduction, for (int i = ...) res += a[i] In this case, the length generated by SELECT_VL,

[PATCH] tree-optimization/110630 - enhance SLP permute support

The following enhances the existing lowpart extraction support for SLP VEC_PERM nodes to cover all vector aligned extractions. This allows the existing bb-slp-pr95839.c testcase to be vectorized with mips -mpaired-single and the new bb-slp-pr95839-3.c testcase with SSE2. Bootstrapped and tested o

Re: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

Oh. Sorry for incorrect psedudo codes that I realized. > + for (int i = 0; i < LEN + BIAS; i++) > + LHS[i] = COND[i] ? A[i] CODE B[i] : ELSE[i]; I think it should be: for (int i = 0; i < NUNITS; i++) { if (cond[i] && i < LEN + BIAS) LHS[i] = A[i] CODE B[i]; else L

Re: [PATCH] simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]

On Wed, Jul 12, 2023 at 12:58 PM Uros Bizjak wrote: > > On Wed, Jul 12, 2023 at 12:23 PM Richard Sandiford > wrote: > > > > Richard Biener via Gcc-patches writes: > > > On Mon, Jul 10, 2023 at 1:01 PM Uros Bizjak wrote: > > >> > > >> On Mon, Jul 10, 2023 at 11:47 AM Richard Biener > > >> wrote

[IRA] Skip empty register classes in setup_reg_class_relations

Hi, I've been spending some (spare) time trying to get LRA working for the avr target. After making a couple of changes to get libgcc going, I'm now hitting an assert at lra-constraints.cc:4423 for a subarch (avrtiny) that has a couple of regclasses with no available registers. The as

Re: [PATCH] simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]

On Wed, Jul 12, 2023 at 1:05 PM Uros Bizjak wrote: > > On Wed, Jul 12, 2023 at 12:58 PM Uros Bizjak wrote: > > > > On Wed, Jul 12, 2023 at 12:23 PM Richard Sandiford > > wrote: > > > > > > Richard Biener via Gcc-patches writes: > > > > On Mon, Jul 10, 2023 at 1:01 PM Uros Bizjak wrote: > > > >

[PATCH V3] VECT: Apply COND_LEN_* into vectorizable_operation

From: Ju-Zhe Zhong Hi, Richard and Richi. As we disscussed before, COND_LEN_* patterns were added for multiple situations. This patch apply CON_LEN_* for the following situation: Support for the situation that in "vectorizable_operation": /* If operating on inactive elements could generate spu

Re: Re: [PATCH V2] VECT: Apply COND_LEN_* into vectorizable_operation

Thanks Richard and Richi so much! I have sent V3 to be merged after I finished bootstrap && regression. With adding clearer comments as follows: +/* Like get_conditional_internal_fn, but return a function that + additionally restricts the operation to the leading elements + of a vector. The

Re: [RFC] Store_bit_field_1: Use mode of SUBREG instead of REG

> 2023年7月12日 15:44，Richard Biener 写道： > > On Wed, Jul 12, 2023 at 5:20 AM YunQiang Su wrote: >> >> PR #104914 >> >> When work with >> int val; >> ((unsigned char*)&val)[0] = *buf; >> The RTX mode is obtained from REG instead of SUBREG, >> which make D is used instead of . >> Thus something

Re: [Patch, Fortran, committed] Allow ref'ing PDT's len() in parameter-initializer [PR102003]

Hi all, hi Harald, thanks for the review. I choose to use gfc_replace_expr() and retested. Everything went fine now. Also thank you clarifying the pdt as a component in a derived type and that that is still a bug and I didn't do it wrong. I have pushed the attached patch seconds ago. Thanks for

Re: [PATCH] simplify-rtx: Fix invalid simplification with paradoxical subregs [PR110206]

Richard Biener writes: > On Wed, Jul 12, 2023 at 1:05 PM Uros Bizjak wrote: >> >> On Wed, Jul 12, 2023 at 12:58 PM Uros Bizjak wrote: >> > >> > On Wed, Jul 12, 2023 at 12:23 PM Richard Sandiford >> > wrote: >> > > >> > > Richard Biener via Gcc-patches writes: >> > > > On Mon, Jul 10, 2023 at 1

Re: [Patch] libgomp: Use libnuma for OpenMP's partition=nearest allocation trait

Now committed as r14-2462-g450b05ce54d3f0. Changes to the patch in previous email: * I fixed some issues found on the way, * The wording in the .texi has been improved/expanded, and * I included two testcases to exercise the two libraries (or the default allocator when it is not available at ru

Re: [PATCH V3] VECT: Apply COND_LEN_* into vectorizable_operation

juzhe.zh...@rivai.ai writes: > From: Ju-Zhe Zhong > > Hi, Richard and Richi. > As we disscussed before, COND_LEN_* patterns were added for multiple > situations. > This patch apply CON_LEN_* for the following situation: > > Support for the situation that in "vectorizable_operation": > /* If ope

Re: [PATCH] ci: Add a linux CI

Hi, On Sun, 9 Jul 2023 at 19:13, Tal Regev via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > Description: adding a ci in a github repo. Everytime a user will do a PR to > master branch or releases branches, it will activate the ci on their repo. > for example: https://github.com/talregev/gcc/p

Re: [PATCH 0/9] Add btf_decl_tag C attribute

[Added Eduard Zingerman in CC, who is implementing this same feature in clang/llvm and also the consumer component in the kernel (pahole).] Hi Richard. > On Tue, Jul 11, 2023 at 11:58 PM David Faust via Gcc-patches > wrote: >> >> Hello, >> >> This series adds support for a new attribute, "btf

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

On Wed, Jul 12, 2023 at 4:05 AM Jeff Law wrote: > > > > On 7/10/23 22:44, Christoph Muellner wrote: > > From: Christoph Müllner > > > > Recently, two identical XTheadCondMov tests have been added, which both > > fail. > > Let's fix that by changing the following: > > * Merge both files into one

[PATCH V4] VECT: Apply COND_LEN_* into vectorizable_operation

From: Ju-Zhe Zhong Hi, Richard and Richi. As we disscussed before, COND_LEN_* patterns were added for multiple situations. This patch apply CON_LEN_* for the following situation: Support for the situation that in "vectorizable_operation": /* If operating on inactive elements could generate spu

Re: Re: [PATCH V3] VECT: Apply COND_LEN_* into vectorizable_operation

I fix comments as you suggested. Thanks a lot! Soon will merge it when I finish the bootstrap && regression. juzhe.zh...@rivai.ai From: Richard Sandiford Date: 2023-07-12 20:14 To: juzhe.zhong CC: gcc-patches; rguenther Subject: Re: [PATCH V3] VECT: Apply COND_LEN_* into vectorizable_operati

Re: [PATCH 0/9] Add btf_decl_tag C attribute

On Wed, Jul 12, 2023 at 2:44 PM Jose E. Marchesi wrote: > > > [Added Eduard Zingerman in CC, who is implementing this same feature in > clang/llvm and also the consumer component in the kernel (pahole).] > > Hi Richard. > > > On Tue, Jul 11, 2023 at 11:58 PM David Faust via Gcc-patches > > wrote

[PATCH] tree-optimization/94864 - vector insert of vector extract simplification

The PRs ask for optimizing of _1 = BIT_FIELD_REF ; result_4 = BIT_INSERT_EXPR ; to a vector permutation. The following implements this as match.pd pattern, improving code generation on x86_64. On the RTL level we face the issue that backend patterns inconsistently use vec_merge and vec_sele

[PATCH] [og13] OpenACC: Vector length warning fixes for implicit mapping/declare create tests

This patch adds expected "vector length" warnings to several tests for NVPTX. Tested with offloading to NVPTX. I will apply (to og13) shortly. 2023-07-11 Julian Brown libgomp/ * testsuite/libgomp.oacc-c-c++-common/implicit-mapping-1.c: Add expected warning. * testsuite

[PATCH] OpenMP: Strided/rectangular 'target update' out-of-bounds array lookup fix

This patch fixes a bug with the calculation of array bounds in the metadata for noncontiguous 'target update' directives. We record the array base address, a bias and the array length to pass to libgomp -- but at present, we use the 'whole array size' for the last, which means that at runtime we m

Re: [PATCH 0/9] Add btf_decl_tag C attribute

> On Wed, Jul 12, 2023 at 2:44 PM Jose E. Marchesi > wrote: >> >> >> [Added Eduard Zingerman in CC, who is implementing this same feature in >> clang/llvm and also the consumer component in the kernel (pahole).] >> >> Hi Richard. >> >> > On Tue, Jul 11, 2023 at 11:58 PM David Faust via Gcc-patc

Re: [PATCH] tree-optimization/94864 - vector insert of vector extract simplification

On 7/12/23 07:36, Richard Biener via Gcc-patches wrote: The PRs ask for optimizing of _1 = BIT_FIELD_REF ; result_4 = BIT_INSERT_EXPR ; to a vector permutation. The following implements this as match.pd pattern, improving code generation on x86_64. On the RTL level we face the issue

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

On 7/12/23 06:48, Christoph Müllner wrote: On Wed, Jul 12, 2023 at 4:05 AM Jeff Law wrote: On 7/10/23 22:44, Christoph Muellner wrote: From: Christoph Müllner Recently, two identical XTheadCondMov tests have been added, which both fail. Let's fix that by changing the following: * Merge

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

On Wed, 12 Jul 2023 at 16:05, Jeff Law wrote: > > > On 7/12/23 06:48, Christoph Müllner wrote: > > On Wed, Jul 12, 2023 at 4:05 AM Jeff Law wrote: > >> > >> > >> > >> On 7/10/23 22:44, Christoph Muellner wrote: > >>> From: Christoph Müllner > >>> > >>> Recently, two identical XTheadCondMov test

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

On 7/12/23 08:07, Philipp Tomsich wrote: On Wed, 12 Jul 2023 at 16:05, Jeff Law > wrote: On 7/12/23 06:48, Christoph Müllner wrote: > On Wed, Jul 12, 2023 at 4:05 AM Jeff Law mailto:jeffreya...@gmail.com>> wrote: >> >> >> >> On 7

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

Ok Philipp Tomsich 於 2023年7月12日 週三，22:08寫道： > On Wed, 12 Jul 2023 at 16:05, Jeff Law wrote: > > > > > > > On 7/12/23 06:48, Christoph Müllner wrote: > > > On Wed, Jul 12, 2023 at 4:05 AM Jeff Law > wrote: > > >> > > >> > > >> > > >> On 7/10/23 22:44, Christoph Muellner wrote: > > >>> From: Chri

[PATCH] - Devirtualization of array destruction (C++) - 110057

Component: c++ Bug ID: 110057 Bugzilla link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110057 Description: Array should not call virtual destructor of object when array is destructed ChangeLog: 2023-07-12 Ng YongXiang PR c++ * Devirtualize auto generated destructor calls of arrayc

Re: [PATCH] RISC-V: Support COND_LEN_* patterns

The middle-end vectorizer patch is approved and soon will be merged. The middle-end dependency is resolved. Ok for trunk? juzhe.zh...@rivai.ai From: Juzhe-Zhong Date: 2023-07-12 12:44 To: gcc-patches CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong Subject: [PATCH] RISC-V: Supp

Re: [PATCH v2] Implement new RTL optimizations pass: fold-mem-offsets.

On 7/12/23 03:12, Manolis Tsamis wrote: On Mon, Jul 10, 2023 at 12:58 AM Hans-Peter Nilsson wrote: On Sun, 9 Jul 2023, Hans-Peter Nilsson wrote: On Thu, 15 Jun 2023, Manolis Tsamis wrote: This is a new RTL pass that tries to optimize memory offset calculations by moving them from add im

Re: [PATCH] tree-optimization/94864 - vector insert of vector extract simplification

Richard Biener writes: > The PRs ask for optimizing of > > _1 = BIT_FIELD_REF ; > result_4 = BIT_INSERT_EXPR ; > > to a vector permutation. The following implements this as > match.pd pattern, improving code generation on x86_64. > > On the RTL level we face the issue that backend patterns in

[committed] libgomp.texi: add cross ref, remove duplicated entry

Committed as r14-2468-g13c3e29d47e359 "Some are only stubs" sounded worse than the actual status and we now a have a rather extensive and complete section about this topic. Tobias - Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 München; Gesellscha

Re: [PATCH] RISC-V: Support COND_LEN_* patterns

Hi Juzhe, > +/* Return true if the operation is the floating-point operation need FRM. */ > +static bool > +need_frm_p (rtx_code code, machine_mode mode) > +{ > + if (!FLOAT_MODE_P (mode)) > +return false; > + return code != SMIN && code != SMAX; > +} Return true if the operation requires

Re: [PATCH V5] RISC-V: Support gather_load/scatter RVV auto-vectorization

On 7/12/23 01:27, Richard Biener wrote: Using SSA_NAME_DEF_STMT during expansion is OK, but I don't think you can rely on REG_EXPR here since you don't know whether any coalescing happened. That said, maybe the implementation currently guarantees you'll only see a REG_EXPR SSA name if there

RE: Re: [PATCH V3] VECT: Apply COND_LEN_* into vectorizable_operation

Committed v4 as passed both the regression and bootstrap tests, thanks both Richard. Pan -Original Message- From: Gcc-patches On Behalf Of ??? Sent: Wednesday, July 12, 2023 9:19 PM To: richard.sandiford Cc: gcc-patches ; rguenther Subject: Re: Re: [PATCH V3] VECT: Apply COND_LEN_* i

Re: Re: [PATCH] RISC-V: Support COND_LEN_* patterns

>> Return true if the operation requires a rounding mode operand. Maybe also >>call it needs_fp_rounding? ok >>What's FMLA? That's SVE I suppose and ours is fmacc? Yes, the comments is misleading will fix it soon. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2023-07-12 22:24 To: Juzhe-Zhong;

[committed] ifcvt: Change return type of predicate functions from int to bool

Also change some internal variables and function arguments from int to bool. gcc/ChangeLog: * ifcvt.cc (cond_exec_changed_p): Change variable to bool. (last_active_insn): Change "skip_use_p" function argument to bool. (noce_operand_ok): Change return type from int to bool. (find_c

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

Li, Pan2 via Gcc-patches 於 2023年7月12日 週三，15:07寫道： > Thank Juzhe for review. Sure, let me hold the v3 for kito's comments. > > Pan > > From: juzhe.zh...@rivai.ai > Sent: Wednesday, July 12, 2023 2:11 PM > To: Li, Pan2 ; gcc-patches > Cc: Robin Dapp ; jeffreyalaw ; > Li, Pan2 ; Wang, Yanzhang ; >

Re: [PATCH] riscv: thead: Fix failing XTheadCondMov tests (indirect-rv[32|64])

Thanks, applied to trunk! Philipp. On Wed, 12 Jul 2023 at 16:08, Jeff Law wrote: > > > On 7/12/23 08:07, Philipp Tomsich wrote: > > > > > > On Wed, 12 Jul 2023 at 16:05, Jeff Law > > wrote: > > > > > > > > On 7/12/23 06:48, Christoph Müllner wrote: > > >

[PATCH v1] RISC-V: Add more tests for RVV floating-point FRM.

From: Pan Li Add more test cases include both the asm check and run for RVV FRM. Signed-off-by: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/float-point-frm-insert-10.c: New test. * gcc.target/riscv/rvv/base/float-point-frm-insert-7.c: New test. * gcc.ta

Re: [PATCH v1] RISC-V: Add more tests for RVV floating-point FRM.

Pan Li via Gcc-patches 於 2023年7月12日 週三，23:07寫道： > From: Pan Li > > Add more test cases include both the asm check and run for RVV FRM. > > Signed-off-by: Pan Li > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/base/float-point-frm-insert-10.c: New test. > * gcc.target/risc

[PATCH V2] RISC-V: Support COND_LEN_* patterns

This middle-end has been merged: https://github.com/gcc-mirror/gcc/commit/0d4dd7e07a879d6c07a33edb2799710faa95651e With this patch, we can handle operations may trap on elements outside the loop. These 2 following cases will be addressed by this patch: 1. integer division: #define TEST_TYP

Re: [PATCH v2] RISC-V: Refactor riscv mode after for VXRM and FRM

On 7/11/23 23:50, pan2...@intel.com wrote: From: Pan Li When investigate the FRM dynmaic rounding mode, we find the global unknown status is quite different between the fixed-point and floating-point. Thus, we separate the unknown function with extracting some inner common functions. We wil

Re: [PATCH V2] RISC-V: Support COND_LEN_* patterns

On 7/12/23 09:24, Juzhe-Zhong wrote: This middle-end has been merged: https://github.com/gcc-mirror/gcc/commit/0d4dd7e07a879d6c07a33edb2799710faa95651e With this patch, we can handle operations may trap on elements outside the loop. These 2 following cases will be addressed by this patch:

[PATCH] c++: constrained surrogate calls [PR110535]

We're not checking constraints of pointer/reference-to-function conversion functions during overload resolution, which causes us to ICE on the first testcase and incorrectly reject the second testcase. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/13? PR c

Re: [PATCH] c++: constrained surrogate calls [PR110535]

On Wed, 12 Jul 2023, Patrick Palka wrote: > We're not checking constraints of pointer/reference-to-function conversion > functions during overload resolution, which causes us to ICE on the first > testcase and incorrectly reject the second testcase. Er, I noticed [over.call.object] doesn't exactl

Re: [PATCH] RISC-V: Throw compilation error for unknown sub-extension or supervisor extension

On 7/11/23 21:30, juzhe.zh...@rivai.ai wrote: LGTM OK for the trunk. jeff

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