On 7/12/23 07:36, Richard Biener via Gcc-patches wrote:
The PRs ask for optimizing of
_1 = BIT_FIELD_REF <b_3(D), 64, 64>;
result_4 = BIT_INSERT_EXPR <a_2(D), _1, 64>;
to a vector permutation. The following implements this as
match.pd pattern, improving code generation on x86_64.
On the RTL level we face the issue that backend patterns inconsistently
use vec_merge and vec_select of vec_concat to represent permutes.
I think using a (supported) permute is almost always better
than an extract plus insert, maybe excluding the case we extract
element zero and that's aliased to a register that can be used
directly for insertion (not sure how to query that).
So for a target with aliases at the register level, I'd bet they're
already aware of the aliasing and are prepared to deal with it in the
target (and are probably already trying to take advantage of that quirk
when possible).
So I'd just punt that problem to the targets. If it turns out to be
common, then we can try to address it, probably at the gimple->rtl border.
jeff
