[PATCH v4] tree-ssa-sink: Improve code sinking pass

Hello All: This patch improves code sinking pass to sink statements before call to reduce register pressure. Review comments are incorporated. For example : void bar(); int j; void foo(int a, int b, int c, int d, int e, int f) { int l; l = a + b + c + d +e + f; if (a != 5) { bar(

Re: [PATCH 1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS

On Tue, May 30, 2023 at 4:21 PM Jan Hubicka wrote: > > > On Mon, May 29, 2023 at 6:20 PM Martin Jambor wrote: > > > > > > Hi, > > > > > > there have been concerns that linear searches through DECL_ARGUMENTS > > > that are often necessary to compute the index of a particular > > > PARM_DECL which

Re: [PATCH V1] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

Could you use something like *[a-x0-9]+ for those operands to prevent us hitting that issue again? Ref: https://github.com/gcc-mirror/gcc/blob/master/gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-136.c#L9 On Wed, May 31, 2023 at 2:18 PM wrote: > > From: yulong > > I find fail of

Re: [PATCH] RISC-V: Add ZVFH extension to the -march= option

LGTM On Wed, May 31, 2023 at 2:58 PM wrote: > > From: Pan Li > > This patch would like to add new sub extension (aka ZVFH) to the -march= > option. > To make it simple, only the sub extension itself is involved in this patch, > and > the underlying FP16 related RVV intrinsic API depends on the

Re: [PATCH] doc: clarify semantics of vector bitwise shifts

On Tue, May 30, 2023 at 4:49 PM Alexander Monakov wrote: > > > On Thu, 25 May 2023, Richard Biener wrote: > > > On Wed, May 24, 2023 at 8:36 PM Alexander Monakov > > wrote: > > > > > > > > > On Wed, 24 May 2023, Richard Biener via Gcc-patches wrote: > > > > > > > I’d have to check the ISAs what

Re: [PATCH] jump: Change return type of predicate functions from int to bool

On Tue, May 30, 2023 at 9:01 PM Jeff Law via Gcc-patches wrote: > > > > On 5/30/23 08:36, Uros Bizjak via Gcc-patches wrote: > > gcc/ChangeLog: > > > > * rtl.h (comparison_dominates_p): Change return type from int to bool. > > (condjump_p): Ditto. > > (any_condjump_p): Ditto. > >

Re: [PATCH] Fix ICE in rewrite_expr_tree_parallel

On Wed, May 31, 2023 at 3:35 AM Cui, Lili wrote: > > Hi, > > This patch is to fix ICE in rewrite_expr_tree_parallel. > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110038 > > Bootstrapped and regtested. Ok for trunk? OK. > Regards > Lili. > > 1. Limit the value of tree-reassoc-width to IntegerRa

RE: [PATCH] RISC-V: Add ZVFH extension to the -march= option

Committed, thanks Kito. Pan -Original Message- From: Kito Cheng Sent: Wednesday, May 31, 2023 3:06 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang Subject: Re: [PATCH] RISC-V: Add ZVFH extension to the -march= option LGTM On Wed, May 31, 2023 at 2:

Re: [PATCH] VECT: Change flow of decrement IV

Richard Biener writes: > On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: > >> Hi?all. I have posted my several investigations: >> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620101.html >> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620105.html >> https://gcc.gnu.org/pipermail/gcc

Re: [PATCH] Fix PR 110042: ifcvt regression due to paradoxical subregs

On Wed, May 31, 2023 at 6:34 AM Andrew Pinski via Gcc-patches wrote: > > After r14-1014-gc5df248509b489364c573e8, GCC started to emit > directly a zero_extract for `(t1&0x8)!=0`. This introduced > a small regression where ifcvt would not do the ifconversion > as there is now a paradoxical subreg i

Re: [PATCH] libatomic: Provide gthr.h default implementation

On Wed, May 31, 2023 at 7:31 AM Sebastian Huber wrote: > > On 30.05.23 13:17, Richard Biener wrote: > > The alternative would be to provide the required subset of atomic > > library functions from libgcov.a and emit calls to that directly? > > The locked data isn't part of any ABI so no compatibil

Re: Re: [PATCH] VECT: Change flow of decrement IV

Hi, Richard. >> I don't object though. It just feels like we're giving up easily. >> And that's a bit frustrating, since this potential problem was flagged >> ahead of time. I can take a look at it. Would you mind giving me some hints? Should I do this in which PASS ? "ivopts" PASS? Is that righ

Re: [PATCH] VECT: Change flow of decrement IV

On Wed, 31 May 2023, Richard Sandiford wrote: > Richard Biener writes: > > On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: > > > >> Hi?all. I have posted my several investigations: > >> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620101.html > >> https://gcc.gnu.org/pipermail/gcc-patches

Re: [PATCH] VECT: Change flow of decrement IV

> Hi, Richi. > >>> Note with SELECT_VL all bets will be off since as I understand the >>> value it gives can vary from iteration to iteration (but we know >>> a lower and maybe an upper bound?) > Yes, in RVV side, the SELECT_VL output can be in range of [ceil(avl/2), > vlmax],  > can be any value

Re: [PATCH] libgcc: Use initarray section type for .init_stack

Hi Andreas, on 2023/5/25 15:25, Andreas Krebbel wrote: > On 3/20/23 07:33, Kewen.Lin wrote: >> Hi, >> >> One of my workmates found there is a warning like: >> >> libgcc/config/rs6000/morestack.S:402: Warning: ignoring >> incorrect section type for .init_array.0 >> >> when compiling libgc

Re: [PATCH] jump: Change return type of predicate functions from int to bool

On Wed, May 31, 2023 at 9:17 AM Richard Biener wrote: > > On Tue, May 30, 2023 at 9:01 PM Jeff Law via Gcc-patches > wrote: > > > > > > > > On 5/30/23 08:36, Uros Bizjak via Gcc-patches wrote: > > > gcc/ChangeLog: > > > > > > * rtl.h (comparison_dominates_p): Change return type from int to

Re: [PATCH] libgcc: Use initarray section type for .init_stack

On Wed, May 31, 2023 at 9:40 AM Kewen.Lin wrote: > > Hi Andreas, > > on 2023/5/25 15:25, Andreas Krebbel wrote: > > On 3/20/23 07:33, Kewen.Lin wrote: > >> Hi, > >> > >> One of my workmates found there is a warning like: > >> > >> libgcc/config/rs6000/morestack.S:402: Warning: ignoring > >>

Re: Re: [PATCH] VECT: Change flow of decrement IV

>> I'm just saying that to go forward the vectorizer change looks >>more promising (also considering the pace RISC-V people are working at >>...) Yeah, RVV needs a lot of middle-end support: SELECT_VL, LEN_MASK_LOAD/LEN_MASK_STORE,.etc LEN_ADD for RVV reduction support like COND_ADD for ARM

Re: Re: [PATCH] VECT: Change flow of decrement IV

Oh, it's correct fix. Thanks for catching this. juzhe.zh...@rivai.ai From: Kewen.Lin Date: 2023-05-31 15:38 To: juzhe.zh...@rivai.ai CC: richard.sandiford; gcc-patches; rguenther Subject: Re: [PATCH] VECT: Change flow of decrement IV > Hi, Richi. > >>> Note with SELECT_VL all bets will be of

[PATCH] alias: Change return type of predicate functions from int to bool

Also remove a bunch of unneeded forward declarations. gcc/ChangeLog: * rtl.h (true_dependence): Change return type from int to bool. (canon_true_dependence): Ditto. (read_dependence): Ditto. (anti_dependence): Ditto. (canon_anti_dependence): Ditto. (output_dependence): Dit

RE: [PATCH] Fix ICE in rewrite_expr_tree_parallel

Committed, thanks Richard. Lili. > -Original Message- > From: Richard Biener > Sent: Wednesday, May 31, 2023 3:22 PM > To: Cui, Lili > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] Fix ICE in rewrite_expr_tree_parallel > > On Wed, May 31, 2023 at 3:35 AM Cui, Lili wrote: > > > >

Re: [C PATCH 3/4] introduce ubsan checking for assigment of VM types 3/4

Am Dienstag, dem 30.05.2023 um 22:59 + schrieb Joseph Myers: > On Mon, 29 May 2023, Martin Uecker via Gcc-patches wrote: > > >     Support instrumentation of function arguments for functions > >     called via a declaration.  We can support only simple size > > What do you mean by "via a decl

[PATCH] MAINTAINERS: Add myself to write after approval

2023-05-30 Jeevitha Palanisamy ChangeLog: * MAINTAINERS (Write After Approval): Add myself. diff --git a/MAINTAINERS b/MAINTAINERS index 2dc51154446..4a7c963914b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -584,6 +584,7 @@ Patrick O'Neill Brad

Re: Re: [PATCH] VECT: Change flow of decrement IV

On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: > Hi, Richard. > > >> I don't object though. It just feels like we're giving up easily. > >> And that's a bit frustrating, since this potential problem was flagged > >> ahead of time. > > I can take a look at it. Would you mind giving me some hin

Re: [PATCH] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*

Hi Segher, on 2023/5/25 19:22, Segher Boessenkool wrote: > Hi! > > On Thu, May 25, 2023 at 07:05:55AM -0300, Alexandre Oliva wrote: >> On May 25, 2023, "Kewen.Lin" wrote: >>> So both lp64 and ilp32 have the same count, could we merge it and >>> remove the selectors? >> >> We could, but... I tho

Re: [PATCH] VECT: Change flow of decrement IV

Richard Biener via Gcc-patches writes: > On Wed, 31 May 2023, Richard Sandiford wrote: > >> Richard Biener writes: >> > On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: >> > >> >> Hi?all. I have posted my several investigations: >> >> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620101.html

Re: [PATCH v2] rs6000: Add buildin for mffscrn instructions

Hi Carl, on 2023/5/25 23:59, Carl Love wrote: > Peter, Kewen: > > On Thu, 2023-05-25 at 13:28 +0800, Kewen.Lin wrote: >> on 2023/5/24 23:20, Carl Love wrote: >>> On Wed, 2023-05-24 at 13:32 +0800, Kewen.Lin wrote: on 2023/5/24 06:30, Peter Bergner wrote: > On 5/23/23 12:24 AM, Kewen.Lin

Re: [PATCH] Optimized "(X - N * M) / N + M" to "X / N" if valid

Hi, Richard Biener writes: > On Wed, 17 May 2023, Jiufu Guo wrote: > >> Hi, >> >> This patch tries to optimize "(X - N * M) / N + M" to "X / N". > > But if that's valid why not make the transform simpler and transform > (X - N * M) / N to X / N - M instead? Great catch! If "N * M" is not co

[PATCH] aarch64: Add pattern for bswap + rotate [PR 110039]

After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a pattern to match the new GIMPLE form. With this patch, gcc.target/aarch64/rev16_2.c passes again. 2023-05-31 Christophe Lyon PR target/110039 gcc/ * config/aarch64/aarch64.md (aarch64_rev162_alt3): Ne

Re: Re: [PATCH] VECT: Change flow of decrement IV

Thanks Richard. Seems that this patch's approach is ok to trunk? Maybe the only thing we should do is to wait Kewen's testing feedback, am I right ? Thanks. juzhe.zh...@rivai.ai From: Richard Sandiford Date: 2023-05-31 17:01 To: Richard Biener via Gcc-patches CC: Richard Biener; juzhe.zhong\@

[PATCH] RISC-V: Support RVV permutation auto-vectorization

From: Juzhe-Zhong This patch supports vector permutation for VLS only by vec_perm pattern. We will support TARGET_VECTORIZE_VEC_PERM_CONST to support VLA permutation in the future. gcc/ChangeLog: * config/riscv/autovec.md (vec_perm): New pattern. * config/riscv/predicates.md (ve

Re: [PATCH v4] MIPS: add speculation_barrier support

YunQiang Su 于2023年5月12日周五 18:30写道： > > speculation_barrier for MIPS needs sync+jr.hb (r2+), > so we implement __speculation_barrier in libgcc, like arm32 does. > > gcc/ChangeLog: > * config/mips/mips-protos.h (mips_emit_speculation_barrier): New > prototype. > * config/mips

Re: [PATCH] aarch64: Add pattern for bswap + rotate [PR 110039]

Christophe Lyon writes: > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a > pattern to match the new GIMPLE form. > > With this patch, gcc.target/aarch64/rev16_2.c passes again. > > 2023-05-31 Christophe Lyon > > PR target/110039 > gcc/ > * config/aarch64/

Re: [PATCH 1/3] xtensa: Improve "*shlrd_reg" insn pattern and its variant

On Tue, May 30, 2023 at 2:27 AM Takayuki 'January June' Suwa wrote: > > The insn "*shlrd_reg" shifts two registers with a funnel shifter by the > third register to get a single word result: > > reg0 = (reg1 SHIFT_OP0 reg3) BIT_JOIN_OP (reg2 SHIFT_OP1 (32 - reg3)) > > where the funnel left shift

[PATCH v2 2/2] MIPS: Don't expand large unaligned block move

For large unaligned block move, lib call may have better performance than expanding. Let's just return, if length is larger than 64 on O32 larger than 128 on N32/N64. Here are some test results: CPU Aligned O32 N32 N64 Cavium 7130 1 72 192 1

[PATCH v2 1/2] MIPS: Use unaligned access to expand block_move on r6

MIPSr6 support unaligned memory access with normal lh/sh/lw/sw/ld/sd instructions, and thus lwl/lwr/ldl/ldr and swl/swr/sdl/sdr is removed. For microarchitecture, these memory access instructions issue 2 operation if the address is not aligned, which is like what lwl family do. For some situation

Re: [PATCH] mips: Fix overaligned function arguments [PR109435]

Jovan Dmitrovic 于2023年5月29日周一 19:00写道： > > This patch changes alignment for typedef types when passed as > arguments, making the alignment equal to the alignment of > original (aliased) types. > > This change makes it impossible for a typedef type to have > alignment that is less than its size. >

Re: [PATCH] aarch64: Add pattern for bswap + rotate [PR 110039]

On Wed, 31 May 2023 at 11:49, Richard Sandiford wrote: > Christophe Lyon writes: > > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a > > pattern to match the new GIMPLE form. > > > > With this patch, gcc.target/aarch64/rev16_2.c passes again. > > > > 2023-05-31 Christophe L

Re: Re: [PATCH 1/1] [V2] [RISC-V] support cm.push cm.pop cm.popret in zcmp

> >[1] > >https://patchwork.sourceware.org/project/gcc/patch/20230406062118.47431-5-jia...@iscas.ac.cn/ > Thanks for your review. > > The md file looks verbose with bunch of *_offset_operand and > stack_push_up_to_*_operand, but it significantly > simplies implementation of recognizing zmcp push

Re: [PATCH] aarch64: Add pattern for bswap + rotate [PR 110039]

Christophe Lyon writes: > On Wed, 31 May 2023 at 11:49, Richard Sandiford > wrote: > >> Christophe Lyon writes: >> > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a >> > pattern to match the new GIMPLE form. >> > >> > With this patch, gcc.target/aarch64/rev16_2.c passes agai

[PATCH][NFC][committed] aarch64: Simplify output template emission code for a few patterns

Hi all, If the output code for a define_insn just does a switch (which_alternative) with no other computation we can almost always replace it with more compact MD syntax for each alternative in a mult-alternative '@' block. This patch cleans up some such patterns in the aarch64 backend, making t

[PATCH] RISC-V: Add testcase for vrsub.vi auto-vectorization

From: Juzhe-Zhong Apparently, we are missing vrsub.vi tests. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vsub-run.c: Add vsub.vi. * gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv.c: Ditto. * gcc.target/riscv/rvv/autovec/binop/vsub-rv64gcv.c: Ditto.

Re: [PATCH v4] MIPS: add speculation_barrier support

On Wed, 31 May 2023, YunQiang Su wrote: > If no objection, I will commit this V4 patch. At first glance it has coding style issues. Maciej

[PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 file chan

[PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt.f.x.v doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 fil

[PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

From: Juzhe-Zhong Apparently, vfncvt.rod rounding mode is encoded, so we don't need FRM. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/r

Re: Re: [PATCH] VECT: Change flow of decrement IV

On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: > Thanks Richard. > Seems that this patch's approach is ok to trunk? > Maybe the only thing we should do is to wait Kewen's testing feedback, am I > right ? Can you repost the patch with Kevens fix and state how you tested it? Thanks, Richard.

[PATCH] emit-rtl: Change return type of predicate functions from int to bool

Also fix some stalled comments. gcc/ChangeLog: * rtl.h (subreg_lowpart_p): Change return type from int to bool. (active_insn_p): Ditto. (in_sequence_p): Ditto. (unshare_all_rtl): Change return type from int to void. * emit-rtl.h (mem_expr_equal_p): Change return type from int

[PATCH] IPA PTA stats enhancement and non-details dump slimming

The following keeps track of the number of edges we avoid to create because they redundandly feed ESCAPED. It also avoids printing a header for -details when not using -details. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. * tree-ssa-structalias.cc (constraint_stats::num_

[PATCH] ipa/109983 - (IPA) PTA speedup

This improves the edge avoidance heuristic by re-ordering the topological sort of the graph to make sure the component with the ESCAPED node is processed first. This improves the number of created edges which directly correlates with the number of bitmap_ior_into calls from 141447426 to 239596 and

[PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

From: Juzhe-Zhong The approach is quite simple and obvious, changing extension pattern into define_insn_and_split will make combine PASS combine into widen operations naturally. gcc/ChangeLog: * config/riscv/autovec.md (2): Change expand into define_insn_and_split. gcc/testsuite/Chan

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

Hi Juzhe, > The approach is quite simple and obvious, changing extension pattern > into define_insn_and_split will make combine PASS combine into widen > operations naturally. looks good to me. Tiny nit: I would add a comment above the patterns to clarify why insn_and_split instead of expand. S

Re: [PATCH 2/2] cprop_hardreg: Enable propagation of the stack pointer if possible.

On Thu, May 25, 2023 at 4:38 PM Jeff Law wrote: > > > > On 5/25/23 06:35, Manolis Tsamis wrote: > > Propagation of the stack pointer in cprop_hardreg is currenty forbidden > > in all cases, due to maybe_mode_change returning NULL. Relax this > > restriction and allow propagation when no mode chang

Re: Re: [PATCH] VECT: Change flow of decrement IV

Sure. I will repost it with kewen's fix. Previously, this patch I tested on X86 and apply to upstream RVV gcc tested on upstream RVV testsuite. Since the upstream RVV GCC is not ready and fragile, we can't use it compile big program. I will apply this patch on my downstream GCC and do my downstre

Re: [PATCH 1/2] Implementation of new RISCV optimizations pass: fold-mem-offsets.

On Tue, May 30, 2023 at 2:30 AM Jeff Law wrote: > > > > On 5/25/23 08:02, Manolis Tsamis wrote: > > On Thu, May 25, 2023 at 4:53 PM Richard Biener via Gcc-patches > > wrote: > >> > >> On Thu, May 25, 2023 at 3:32 PM Jeff Law via Gcc-patches > >> wrote: > >>> > >>> > >>> > >>> On 5/25/23 07:01, R

[committed] libstdc++: Disable embedded tzdata for all 16-bit targets

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * acinclude.m4 (GLIBCXX_ZONEINFO_DIR): Extend logic for avr and msp430 to all 16-bit targets. * configure: Regenerate. --- libstdc++-v3/acinclude.m4 | 15 +-- libstdc++-v3/configure

[committed] libstdc++: Add missing noexcept to std::scoped_allocator_adaptor

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- The standard requires these constructors and accessors to be noexcept. libstdc++-v3/ChangeLog: * include/std/scoped_allocator (scoped_allocator_adaptor): Add noexcept to all constructors except the default constructor.

[committed] libstdc++: Replace obsolete shell syntax in configure.ac

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- The current POSIX standard says that the -a and -o operators to the 'test' utility are obsolete, and the shell operators && and || should be used instead. libstdc++-v3/ChangeLog: * configure.ac: Replace use of -o operator for test.

[committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- As suggested by Jakub in the PR, this just hardcodes the constants with a Q suffix, since the properties of __float128 are not going to change. We can only define it for non-strict modes because the suffix gives an error otherwise, even in syst

[committed] libstdc++: Do not include in

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- We previously needed in for the std::lock_error exception class, but that was moved out of in 2009 when it was removed from the C++0x draft. We can stop including now. Move the include for to where it's actually used, and only include in

[committed] libstdc++: Deprecate std::setfill for std::basic_istream [PR109922]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- Prior to N0966 (July 1996) the std::setfill manipulator was specified to work with both input and output streams. In the final C++98 standard it is only specified to work with output streams. We have always supported it for input streams, despi

[committed] libstdc++: Fix preprocessor conditions for std::from_chars [PR109921]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- We use the from_chars_strtod function with __strtof128 to read a _Float128 value, but from_chars_strtod is not defined unless uselocale is available. This can lead to compilation failures for some targets, because we try to define the _Flaot128

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

On 5/31/23 05:55, Robin Dapp wrote: Hi Juzhe, The approach is quite simple and obvious, changing extension pattern into define_insn_and_split will make combine PASS combine into widen operations naturally. looks good to me. Tiny nit: I would add a comment above the patterns to clarify why

Re: [PATCH] emit-rtl: Change return type of predicate functions from int to bool

On 5/31/23 05:06, Uros Bizjak via Gcc-patches wrote: Also fix some stalled comments. gcc/ChangeLog: * rtl.h (subreg_lowpart_p): Change return type from int to bool. (active_insn_p): Ditto. (in_sequence_p): Ditto. (unshare_all_rtl): Change return type from int to void.

Re: [PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

On 5/31/23 04:43, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt.f.x.v doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove F

Re: [PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

On 5/31/23 04:47, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Apparently, vfncvt.rod rounding mode is encoded, so we don't need FRM. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. OK jeff

Re: [PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

On 5/31/23 04:35, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. O

Re: [PATCH] alias: Change return type of predicate functions from int to bool

On 5/31/23 01:51, Uros Bizjak via Gcc-patches wrote: Also remove a bunch of unneeded forward declarations. gcc/ChangeLog: * rtl.h (true_dependence): Change return type from int to bool. (canon_true_dependence): Ditto. (read_dependence): Ditto. (anti_dependence): Ditto.

Re: [PATCH] RISC-V: Add testcase for vrsub.vi auto-vectorization

On 5/31/23 04:23, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Apparently, we are missing vrsub.vi tests. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vsub-run.c: Add vsub.vi. * gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv.c: Ditto. * gcc.tar

[PATCH v2] aarch64: Add pattern for bswap + rotate [PR 110039]

After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a pattern to match the new GIMPLE form. With this patch, gcc.target/aarch64/rev16_2.c passes again. 2023-05-31 Christophe Lyon PR target/110039 gcc/ * config/aarch64/aarch64.md (aarch64_rev16si2_alt3):

Re: [PATCH] Add COMPLEX_VECTOR_INT modes

Richard Biener via Gcc-patches writes: > On Fri, May 26, 2023 at 4:35 PM Andrew Stubbs wrote: >> >> Hi all, >> >> I want to implement a vector DIVMOD libfunc for amdgcn, but I can't just >> do it because the GCC middle-end models DIVMOD's return value as >> "complex int" type, and there are no ve

Re: [PATCH v2] aarch64: Add pattern for bswap + rotate [PR 110039]

Christophe Lyon writes: > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a > pattern to match the new GIMPLE form. > > With this patch, gcc.target/aarch64/rev16_2.c passes again. > > 2023-05-31 Christophe Lyon > > PR target/110039 > gcc/ > * config/aarch64/

[PATCH V2] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

From: Juzhe-Zhong Base on V1 patch, adding comment: ;; Use define_insn_and_split to define vsext.vf2/vzext.vf2 will help combine PASS ;; to combine instructions as below: ;; vsext.vf2 + vsext.vf2 + vadd.vv ==> vwadd.vv gcc/ChangeLog: * config/riscv/autovec.md (2): Change expand into

Re: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

I have sent V2 withing adding commen: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620243.html Could you take a look at it? juzhe.zh...@rivai.ai From: Jeff Law Date: 2023-05-31 20:58 To: Robin Dapp; juzhe.zhong; gcc-patches CC: kito.cheng; kito.cheng; palmer; palmer Subject: Re: [PATCH

Re: ping^^: [PATCH] rs6000: Enable const_anchor for 'addi'

On Tue, May 30, 2023 at 11:00 PM Jiufu Guo wrote: > > Gentle ping... > > Jiufu Guo via Gcc-patches writes: > > > Gentle ping... > > > > Jiufu Guo via Gcc-patches writes: > > > >> Hi, > >> > >> I'm thinking that we may enable this patch for stage1, so ping it. > >> https://gcc.gnu.org/pipermail/

RE: [PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:02 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

RE: [PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:01 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

On 5/31/23 07:23, 钟居哲 wrote: I have sent V2 withing adding commen: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620243.html Could you take a look at it? I'd probably remove "PASS" from that comment. I don't think you nee

RE: [PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:03 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

RE: [PATCH] RISC-V: Add testcase for vrsub.vi auto-vectorization

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:07 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

Re: [PATCH 1/2] Implementation of new RISCV optimizations pass: fold-mem-offsets.

On 5/31/23 06:19, Manolis Tsamis wrote: On Tue, May 30, 2023 at 2:30 AM Jeff Law wrote: On 5/25/23 08:02, Manolis Tsamis wrote: On Thu, May 25, 2023 at 4:53 PM Richard Biener via Gcc-patches wrote: On Thu, May 25, 2023 at 3:32 PM Jeff Law via Gcc-patches wrote: On 5/25/23 07:01,

Re: [committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

On Wed, 31 May 2023 at 13:23, Jonathan Wakely via Libstdc++ < libstd...@gcc.gnu.org> wrote: > Tested powerpc64le-linux. Pushed to trunk. > > -- >8 -- > > As suggested by Jakub in the PR, this just hardcodes the constants with > a Q suffix, since the properties of __float128 are not going to change

RE: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

Committed with that change, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of ??? Sent: Wednesday, May 31, 2023 9:24 PM To: Jeff Law ; rdapp.gcc ; gcc-patches Cc: kito.cheng ; kito.cheng ; palmer ; palmer Subject: Re: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmuls

Re: [committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

On Wed, May 31, 2023 at 03:04:03PM +0100, Jonathan Wakely via Gcc-patches wrote: > On Wed, 31 May 2023 at 13:23, Jonathan Wakely via Libstdc++ < > libstd...@gcc.gnu.org> wrote: > > > Tested powerpc64le-linux. Pushed to trunk. > > > > -- >8 -- > > > > As suggested by Jakub in the PR, this just hard

[PATCH V2] VECT: Change flow of decrement IV

From: Ju-Zhe Zhong Follow Richi's suggestion, I change current decrement IV flow from: do { remain -= MIN (vf, remain); } while (remain != 0); into: do { old_remain = remain; len = MIN (vf, remain); remain -= vf; } while (old_remain >= vf); to enhance SCEV. Include fixes from kew

[PATCH V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

From: yulong I find fail of the xtheadcondmov-indirect-rv64.c test case and provide a way to solve it. In this patch, I take Kito's advice that I modify the form of the function bodies.It likes *[a-x0-9]. gcc/testsuite/ChangeLog: * gcc.target/riscv/xtheadcondmov-indirect-rv32.c:Modify

[PATCH] reload_cse_move2add: Handle trivial single_set:s

Tested cris-elf, bootstrapped & checked native x86_64-pc-linux-gnu for good measure. Ok to commit? If it wasn't for there already being an auto_inc_dec pass, this looks like a good place to put it, considering the framework data. (BTW, current auto-inc-dec generation is so poor that you can repl

Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I thought I'd better notify the author (I have written authors if there was more than one ;-) of suspect commits in the range r14-1425-g80ee7d02e8db48..e1240bda3e0b for the build-break at r14-1442-ge1240bda3e0bb1 for cris-elf, where I get:

Re: [PATCH V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

On 5/31/23 09:08, shiyul...@iscas.ac.cn wrote: From: yulong I find fail of the xtheadcondmov-indirect-rv64.c test case and provide a way to solve it. In this patch, I take Kito's advice that I modify the form of the function bodies.It likes *[a-x0-9]. gcc/testsuite/ChangeLog: *

Re: Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

On Wed, 31 May 2023 at 16:29, Hans-Peter Nilsson via Libstdc++ < libstd...@gcc.gnu.org> wrote: > Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I > thought I'd better notify the author (I have written authors > if there was more than one ;-) of suspect commits in the > range r14-1425-g

Re: [PATCH v2] rs6000: Add buildin for mffscrn instructions

Kewen: On Wed, 2023-05-31 at 17:11 +0800, Kewen.Lin wrote: > > So, there is no need for the builtin to have to determine if the > > user > > is storing the result of the __builtin_set_fpscr_rn. The RN bits > > will > > always be updated by the __builtin_set_fpscr_rn builtin and the > > existing f

Re: [PATCH 1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS

Hello, On Wed, May 31 2023, Richard Biener wrote: > On Tue, May 30, 2023 at 4:21 PM Jan Hubicka wrote: >> >> > On Mon, May 29, 2023 at 6:20 PM Martin Jambor wrote: >> > > >> > > Hi, >> > > >> > > there have been concerns that linear searches through DECL_ARGUMENTS >> > > that are often necessary

[PATCH 0/3] Unbork testsuite for multlib setups

Hi, This fixes the current broken multilib testing on trunk. 1/3 is th actual fix 2/3 is preventive and 3/3 is debug aid in case this bites someone else in future. Thx, -Vineet Kito Cheng (1): RISC-V: Add missing torture-init and torture-finish for rvv.exp Vineet Gupta (2): testsuite: Unbor

[PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

Multilib testing on trunk is currently busted (and surprisingly this affects any/all targets but it seems nobody cares). We currently get the following splat: | ERROR: tcl error code NONE | ERROR: torture-init: torture_without_loops is not empty as expected And this takes down pretty much all of

[PATCH 2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp

From: Kito Cheng This is in line with recent test harness expectations and is a preventive change as it doesn't actually fix any errors. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Add torture-init and torture-finish. Signed-off-by: Vineet Gupta --- gcc/testsuite

[PATCH 3/3] testsuite: print any leaking torture options for debugging

This was helpful when debugging the recent multilib testsuite failure. gcc/testsuite: * lib/torture-options.exp: print the value of non-empty options: torture_without_loops, torture_with_loops, LTO_TORTURE_OPTIONS. Signed-off-by: Vineet Gupta --- gcc/testsuite/lib/torture-option

Re: [PATCH] RISC-V: Add missing torture-init and torture-finish for rvv.exp

On 5/30/23 11:43, Vineet Gupta wrote: On 5/26/23 16:38, Vineet Gupta wrote: On 5/25/23 13:26, Thomas Schwinge wrote: I'm pasting a snippet of gcc.log. Issue is indeed triggered by rvv.exp which needs some love. I'd intentionally asked to "see a complete 'gcc.log' file where the ERRORs are

[PATCH][committed] aarch64: PR target/99195 Annotate saturating mult patterns for vec-concat-zero

Hi all, This patch goes through the various alphabet soup saturating multiplication patterns, including those in TARGET_RDMA and annotates them with . Many other patterns are widening and always write the full 128-bit vectors so this annotation doesn't apply to them. Nothing out of the ordinary

[PATCH][committed] aarch64: PR target/99195 Annotate dot-product patterns for vec-concat-zero

Hi all, This straightforward patch annotates the dotproduct instructions, including the i8mm ones. Tests included. Nothing unexpected here. Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf. Pushing to trunk. Thanks, Kyrill gcc/ChangeLog: PR target/99195

Re: [PATCH] libgcc: Use initarray section type for .init_stack

On Wed, May 31, 2023 at 12:41 AM Kewen.Lin via Gcc-patches wrote: > > >> libgcc/ChangeLog: > >> > >> * config/i386/morestack.S: Use @init_array rather than > >> @progbits for section type of section .init_array. > >> * config/rs6000/morestack.S: Likewise. > >> * config/s390/mor

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