Re: [PATCH] reassoc: Reassociate integral multiplies [PR95867[

On Sun, 10 Jan 2021, Jakub Jelinek wrote: Hi! For floating point multiply, we have nice code in reassoc to reassociate multiplications to almost optimal sequence of as few multiplications as possible (or library call), but for integral types we just give up because there is no __builtin_powi* f

Re: [PATCH] widening_mul: Pattern recognize unsigned multiplication with overflow check [PR95852]

On Sat, 9 Jan 2021, Jakub Jelinek wrote: Hi! The following patch pattern recognizes some forms of multiplication followed by overflow check through division by one of the operands compared to the other one, with optional removal of guarding non-zero check for that operand if possible. The patt

Re: Add missing vxworks filters to lib/target-supports.exp functions

> On 29 Dec 2020, at 11:26, Richard Sandiford via Gcc-patches > wrote: > > Alexandre Oliva writes: >> Explicitly disable some vxworks-missing features in the testsuite, that >> the current feature tests detect as present. >> >> Regstrapped on x86_64-linux-gnu, and tested with -x-arm-wrs-vxw

Re: [PATCH] widening_mul: Pattern recognize also signed multiplication with overflow check [PR95852]

On Sat, 9 Jan 2021, Jakub Jelinek wrote: Hi! On top of the previous widening_mul patch, this one recognizes also (non-perfect) signed multiplication with overflow, like: int f5 (int x, int y, int *res) { *res = (unsigned) x * y; return x && (*res / x) != y; } The problem with such checks is t

Re: make FOR_EACH_IMM_USE_STMT safe for early exits

On Sat, Jan 9, 2021 at 9:33 PM Alexandre Oliva wrote: > > On Jan 7, 2021, Richard Biener wrote: > > > On Wed, Jan 6, 2021 at 12:34 PM Alexandre Oliva wrote: > >> > >> On Jan 4, 2021, Richard Biener wrote: > >> > >> > Thus, please remove uses of BREAK_FROM_IMM_USE_STMT > >> > together with thi

[PATCH] aarch64: Reimplement vmovl*/vmovn* intrinsics using __builtin_convertvector

Hi all, __builtin_convertvector seems well-suited to implementing the vmovl and vmovn intrinsics that widen and narrow the integer elements in a vector. This removes some more inline assembly from the intrinsics. Bootstrapped and tested on aarch64-none-linux-gnu. Pushing to trunk. Thanks, Kyril

[PATCH] libstdc++: implement locale support for AIX

Hi everyone,  This patch adds a partial locale support in libstdc++ for AIX.  The message_members part isn't yet implemented.  The tests have been launched in AIX7.2 and AIX7.1.  There are a few new tests failing (~20), but most of them weren't launched before and they don't seem too much relate

[PATCH] tree-optimization/98221 - fix wrong unpack operation used for big-endian

The vec-abi-varargs-1.c testcase on IBM Z currently fails. While adding an SI mode vector to a DI mode vector the first is unpacked using: _28 = BIT_INSERT_EXPR <{ 0, 0, 0, 0 }, _2, 0>; _34 = [vec_unpack_lo_expr] _28; However, on big endian targets lo refers to the right hand side of the vec

translation

Hi, I hope you are doing well! This is Suzy, an account manager from an ISO 9001:2008 Translation Company. I happened to browse your website today, so I thought that maybe you’d like to work with native Asian linguists for your projects, and that's exactly why I'm reaching out to you. We’re

Re: [PATCH, OpenMP 5.0] Target mapping C++ members inside member functions

On Wed, Dec 23, 2020 at 07:02:09PM +0800, Chung-Lin Tang wrote: > Hi Jakub, > this patch is to fix some of the problems with target mapping when inside > C++ member functions: > > 1. Allow deref '->' in map clauses. > 2. Allow this[X] in map clauses. I must say I'd prefer not to go this way by ad

RE: [PATCH 6/8 v9]middle-end slp: support complex FMA and complex FMA conjugate

Hi Richi, > -Original Message- > From: Richard Biener > Sent: Friday, January 8, 2021 9:45 AM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > Subject: Re: [PATCH 6/8 v9]middle-end slp: support complex FMA and > complex FMA conjugate > > On Mon, 28 Dec 2020, Tamar

[PATCH] Fix UBSAN bootstrap

Hi. Problem here was that GCC-related options are not applied in stage2 (and later stages). It's caused by fact that CXX is xg++ in stage2 (and later stages). Fixed with the following patch. Ready to be installed? Thanks, Martin libcody/ChangeLog: PR bootstrap/98414 * Makefile

Re: [PATCH, OpenMP 5.0] Basic support of release/delete clauses on target/target-data directives

On Wed, Dec 16, 2020 at 11:06:10PM +0800, Chung-Lin Tang wrote: > we have some other sollve_vv tests for OpenMP 5.0, which tests the occurrence > of > 'delete' map kind on the target directive. That is strange. In OpenMP 5.0, I certainly see the target data: [163:16] A map-type in a map clause mu

[PATCH] [x86]Delete dead code in ix86_expand_sse_comi.[PR98612]

Hi: d->flag is always 0 for builtins located in BDESC_FIRST (comi,COMI,...) ... BDESC_END (COMI, PCMPESTR) So the condition can be deleted, so did BUILTIN_DESC_SWAP_OPERANDS. Regtested and bootstrapped on x86_64-linux-gnu{-m32,}. gcc/ChangeLog: PR target/98612 * config/i386/

Re: [PATCH] Fix UBSAN bootstrap

On Mon, Jan 11, 2021 at 11:26:42AM +0100, Martin Liška wrote: > Problem here was that GCC-related options are not applied in stage2 (and > later stages). > It's caused by fact that CXX is xg++ in stage2 (and later stages). > Fixed with the following patch. > > Ready to be installed? > Thanks, > M

RE: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution

Hi Richi, Attached is the updated patch. Note that testcases for all of these will be committed with the patch but I'm Finishing up the 32-bit Arm changes to mirror the changes the AArch64 maintainer wanted and then have to do bootstrap which will take the majority of the day so wanted to get the

RE: [PATCH 5/8 v9]middle-end slp: support complex multiply and complex multiply conjugate

Hi Richi, This adds support for complex multiply and complex multiply and accumulate to the vect pattern detector. Bootstrapped Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu and no issues. Ok for master? (I replied to a comment at the very end of the mail from the previous patch) Ex

[PATCH v4 03/29] Refactor 'ctz' functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/lib1funcs.S: Move __ctzsi2() to * config/arm/bits/ctz2.S: New file. --- libgcc/config/arm/bits/ctz2.S | 65 +++ libgcc/config/arm/lib1funcs.S | 65 +

[PATCH v4 08/29] Import new 'clrsb' functions from the CM0 library.

From: Daniel Engel The new functions provide an efficient tail call to __clzsi2(), making them rather smaller and faster than the C versions. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bits/clz2.S: Add __clrsbsi2() and __clrsbdi2(). * config/arm/t-elf: Add _clrs

[PATCH v4 01/29] Add and organize macros.

From: Daniel Engel These definitions facilitate subsequent patches in this series. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/t-elf: Organize functions into logical groups. * config/arm/lib1funcs.S: Add FUNC_START macro variations for weak functions and

[PATCH v4 00/29] libgcc: Thumb-1 Floating-Point Library for Cortex M0

From: Daniel Engel This patch revision is based on comments received against: As one point of comparison, a test program [1] links 916 bytes from libgcc with the patched toolchain vs 10276 bytes with gcc-arm-none-eabi-9-2

[PATCH v4 09/29] Import new 'ffs' functions from the CM0 library.

From: Daniel Engel The new functions provide an efficient tail call to __ctzsi2(), making them rather smaller and faster than the C versions. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bits/ctz2.S: Add __ffssi2() and __ffsdi2(). * config/arm/t-elf: Add _ffssi2 a

[PATCH v4 06/29] Import replacement 'ctz' functions from CM0 library

From: Daniel Engel This version combines __ctzdi2() with __ctzsi2() into a single object with an efficient tail call. The former implementation of __ctzdi2() was in C. On architectures without a clz instruction, this version merges the formerly separate Thumb and ARM code sequences into a unifi

[PATCH v4 14/29] Add branchless conditional sequences to the 64-bit comparison funtions.

From: Daniel Engel This effectively merges support for ARM architecture variants into a common function path with appropriate build conditions. ARM performance is 1-2 instructions faster/smaller; Thumb-2 is about 50%. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi.S:

[PATCH v4 02/29] Refactor 'clz' functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/lib1funcs.S: Move __clzsi2() and __clzdi2() to * config/arm/bits/clz2.S: New file. --- libgcc/config/arm/bits/clz2.S | 124 ++ libgcc/config/arm/lib1funcs.S | 123 +

[PATCH v4 10/29] Import new 'parity' functions from the CM0 library.

From: Daniel Engel The functional overlap between the single- and double-word variants functions makes these versions about half the size of the C versions if both functions are linked together in an application. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bits/parity.S:

[PATCH v4 11/29] Import new 'popcnt' functions from the CM0 library.

From: Daniel Engel The functional overlap between the single- and double-word versions functions makes this implementation about 30% smaller than C when both functions are linked together in an appliation. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bits/popcnt.S: New fi

[PATCH v4 16/29] Refactor Thumb-1 64-bit division functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi-v6m.S: Moved _ldivmod() and __uldivmod() to * config/arm/eabi/ldiv.S: New file. * config/arm/lib1funcs.S: #include eabi/ldiv.S (v6m only). --- libgcc/config/arm/bpabi-v6m.S | 81

[PATCH v4 12/29] Refactor Thumb-1 long int comparison functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi-v6m.S: Moved __aeabi_lcmp/ulcmp() to * config/arm/eabi/lcmp.S: New file. * config/arm/lib1funcs.S: #include eabi/lcmp.S. --- libgcc/config/arm/bpabi-v6m.S | 46 --

[PATCH v4 13/29] Import replacement 64-bit comparison functions from CM0 library.

From: Daniel Engel These are 2-5 instructions smaller and just as fast. Branches are minimized, which will make them easier to adapt to Thumb-2/ARM mode. gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/eabi/lcmp.S: Replace with faster versions; add macro configurati

[PATCH v4 15/29] Import new integer division functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/eabi/idiv.S: New file for __udivsi3() and __divsi3(). * config/arm/lib1funcs.S: #include eabi/idiv.S (v6m only). --- libgcc/config/arm/eabi/idiv.S | 299 ++ libgcc/conf

[PATCH v4 29/29] Remove single-precision functions from the v6m soft-float library.

From: Daniel Engel With the complete CM0 library integrated, regression testing showed new failures with the message "compilation failed to produce executable": gcc.dg/fixed-point/convert-float-1.c gcc.dg/fixed-point/convert-float-3.c gcc.dg/fixed-point/convert-sat.c Investigating,

[PATCH v4 05/29] Import replacement 'clz' functions from CM0 library

From: Daniel Engel On architectures with no clz instruction, this version combines __clzdi2() with __clzsi2() into a single object with an efficient tail call. Also, this version merges the formerly separate for Thumb and ARM code implementations into a unified instruction sequence. This change

[PATCH v4 07/29] Import replacement 64-bit shift functions from CM0 library.

From: Daniel Engel In Thumb mode, the new functions are each 1-2 instructions smaller and faster, and branchless when the IT instruction is available. The ARM versions were converted to the "xxl/xxh" big-endian register convention, but are otherwise unchanged. gcc/libgcc/ChangeLog: 2021-01-07 Da

[PATCH v4 19/29] Refactor Thumb-1 single precision comparison functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi-v6m.S: Moved __aeabi_fcmp*() functions to * config/arm/eabi/fcmp.S: New file. * config/arm/lib1funcs.S: #include eabi/fcmp.S (v6m only). --- libgcc/config/arm/bpabi-v6m.S | 63 --

[PATCH v4 20/29] Import single precision comparison functions from the CM0 library.

From: Daniel Engel These functions are significantly smaller and faster than the wrapper functions and soft-float implementation they replace. Using the first comparison operator (e.g. '<=') costs about 70 bytes initially, but every additional operator incrementally adds just 4 bytes. NOTE: It

[PATCH v4 21/29] Refactor Thumb-1 floating point subtraction into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi-v6m.S: Moved __aeabi_frsub() to * config/arm/eabi/fadd.S: New file. * config/arm/lib1funcs.S: #include eabi/fadd.S (v6m only). --- libgcc/config/arm/bpabi-v6m.S | 16 li

[PATCH v4 18/29] Import new integer multiplication functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/eabi/lmul.S: New file for __muldi3(), __mulsidi3(), and __umulsidi3(). * config/arm/lib1funcs.S: #eabi/lmul.S (v6m only). * config/arm/t-elf: Add the new objects to LIB1ASMFUNCS. ---

[PATCH v4 28/29] Import float<->__fp16 conversion functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-09 Daniel Engel * config/arm/eabi/fcast.S: Add __aeabi_f2h*() and __aeabi_h2f*(). * config/arm/fp16: Disable duplicate C routines (v6m only). * config/arm/t-bpabi: Add _arm_f2h* and _arm_h2f* objects to LIB1ASMFUNCS. ---

[PATCH v4 27/29] Import float<->double conversion functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-08 Daniel Engel * config/arm/eabi/fcast.S: New file for __aeabi_f2d/__extendsfdf2() __aeabi_d2f(), __truncdfsf2(). * config/arm/lib1funcs.S: #include eabi/fcast.S (v6m only). * config/arm/t-elf: Add _arm_d2f and _a

[PATCH v4 25/29] Import integer-to-float conversion functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-08 Daniel Engel * config/arm/bpabi-lib.h: Remove obsolete RENAME_LIBRARY directives. * config/arm/eabi/ffloat.S: New file for __float[un]sisf/disf(). * config/arm/lib1funcs.S: #include eabi/ffloat.S (v6m only). * c

[PATCH v4 22/29] Import single precision addition and subtraction from the CM0 library.

From: Daniel Engel Since this is the first phase of the floating point functions, some common parsing and formatting routines and also included. These common routines will be referenced by other functions in subsequent commits. However, even if the size penalty is accounted entirely to __addsf3(

[PATCH v4 23/29] Import single precision multiplication from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-08 Daniel Engel * config/arm/eabi/fmul.S: New file for __mulsf3(). * config/arm/lib1funcs.S: #include eabi/fmul.S (v6m only). * config/arm/t-elf: Move _mulsf3 to global scope in LIB1ASMFUNCS (this object was former

[PATCH v4 26/29] Import float-to-integer conversion functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-08 Daniel Engel * config/arm/bpabi-lib.h: Remove obsolete RENAME_LIBRARY directives. * config/arm/eabi/ffixed.S: New file for __float[un]sisf/disf(). * config/arm/lib1funcs.S: #include eabi/ffixed.S (v6m only). * c

[PATCH v4 24/29] Import single precision division from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-08 Daniel Engel * config/arm/eabi/fdiv.S: New file for __divsf3(). * config/arm/lib1funcs.S: #include eabi/fdiv.S (v6m only). * config/arm/t-elf: Add _divsf3 and _fp_divloopf3 to LIB1ASMFUNCS. --- libgcc/config/arm/eabi/f

[PATCH v4 17/29] Import replacement 64-bit division functions from the CM0 library.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/bpabi.c: Deleted unused file. * config/arm/eabi/ldiv.S: Replaced the __aeabi_ldivmod() and __aeabi_uldivmod() wrapper functions with a full implementation. * config/arm/t-bpabi: Removed

[PATCH v4 04/29] Refactor 64-bit shift functions into a new file.

From: Daniel Engel gcc/libgcc/ChangeLog: 2021-01-07 Daniel Engel * config/arm/lib1funcs.S: Move __ashldi3(), __ashrdi3(), __lshldi3() to * config/arm/bits/shift.S: New file. --- libgcc/config/arm/bits/shift.S | 102 libgcc/config/arm/lib1funcs.S

Re: [PATCH v2] testsuite: Fix test failures from outputs.exp [PR98225]

On 1/8/21 8:27 PM, David Edelsohn wrote: > Hi, Bernd > > Thanks for investigating this and creating a revised version of the > patch. With the second patch, the gcc.misc-test/outputs.exp results > are clean on AIX. > Many thanks for confirming that the patch works. Is it OK to push? Thanks Be

[committed] d: Remove visibility and lookup deprecation

Hi, This patch merges the D front-end implementation with upstream dmd 2d3d13748, removing the visibility and lookup deprecation. The deprecation phase for access checks is finished. The `-ftransition=import` and `-ftransition=checkimports` switches no longer have an effect and are now removed.

Re: [committed] d: Support deprecated, @disable, and user-defined attributes on enum members

Excerpts from Andreas Schwab's message of January 10, 2021 9:08 am: > ../../gcc/d/dmd/parse.c: In member function 'Dsymbols* > Parser::parseDeclDefs(int, Dsymbol**, PrefixAttributes*)': > ../../gcc/d/dmd/parse.c:647:29: error: unused variable 'e' > [-Werror=unused-variable] > 647 |

[PATCH] tree-optimization/98526 - fix vectorizer reduction cost

This fixes a double-counting in the reduction cost when vectorizing the reduction through the regular vectorizable_* functions. Bootstrapped / tested on x86_64-unknown-linux-gnu, pushed. 2021-01-11 Richard Biener PR tree-optimization/98526 * tree-vect-loop.c (vect_model_reduct

Re: [PATCH] [x86]Delete dead code in ix86_expand_sse_comi.[PR98612]

On Mon, Jan 11, 2021 at 11:28 AM Hongtao Liu wrote: > > Hi: > d->flag is always 0 for builtins located in > BDESC_FIRST (comi,COMI,...) > ... > BDESC_END (COMI, PCMPESTR) > So the condition can be deleted, so did BUILTIN_DESC_SWAP_OPERANDS. > > Regtested and bootstrapped on x86_64-linux-gnu{

RE: [PATCH 5/8 v9]middle-end slp: support complex multiply and complex multiply conjugate

On Mon, 11 Jan 2021, Tamar Christina wrote: > Hi Richi, > > This adds support for complex multiply and complex multiply and accumulate to > the vect pattern detector. > > Bootstrapped Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu > and no issues. > > Ok for master? (I replied to a co

Re: [PATCH] testsuite: Fix test failures from outputs.exp [PR98225]

Hi Alexandre, > On Jan 7, 2021, Bernd Edlinger wrote: > >> I don't know why that is there in the first place, as there >> are no C++ test cases, these files should not be created at all. > > collect2, on platforms that use it, create .cdtor files even for C. > David Edelsohn told me so back then

Re: [PATCH v2] testsuite: Fix test failures from outputs.exp [PR98225]

Hi Bernd, > On 1/8/21 8:27 PM, David Edelsohn wrote: >> Hi, Bernd >> >> Thanks for investigating this and creating a revised version of the >> patch. With the second patch, the gcc.misc-test/outputs.exp results >> are clean on AIX. >> > > Many thanks for confirming that the patch works. > > Is

Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX

"Qian, Jianhua" writes: > Hi Richard > >> -Original Message- >> From: Richard Sandiford >> Sent: Friday, January 8, 2021 7:04 PM >> To: Qian, Jianhua/钱 建华 >> Cc: gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH v2] aarch64: Add cpu cost tables for A64FX >> >> Qian Jianhua writes: >> > Th

[PATCH] tree-optimization/91403 - avoid excessive code-generation

The vectorizer, for large permuted grouped loads, generates inefficient intermediate code (cleaned up only later) that runs into complexity issues in SCEV analysis and elsewhere. For the non-single-element interleaving case we already put a hard limit in place, this applies the same limit to the m

Re: [PATCH] Fix UBSAN bootstrap

On 1/11/21 5:38 AM, Jakub Jelinek wrote: On Mon, Jan 11, 2021 at 11:26:42AM +0100, Martin Liška wrote: Problem here was that GCC-related options are not applied in stage2 (and later stages). It's caused by fact that CXX is xg++ in stage2 (and later stages). Fixed with the following patch. Read

Re: [PATCH] Optimize macro: make it more predictable

I'm suggesting postponing this to GCC 12 as I'm planning a bigger target/optimize attribute (pragma) overhaul. Martin On 12/7/20 12:03 PM, Martin Liška wrote: PING^2 On 11/26/20 2:56 PM, Martin Liška wrote: PING^1 On 11/9/20 11:35 AM, Martin Liška wrote: On 11/3/20 2:34 PM, Jakub Jelinek wr

RE: [PATCH 1/8 v9]middle-end slp: Support optimizing load distribution

On Mon, 11 Jan 2021, Tamar Christina wrote: > Hi Richi, > > Attached is the updated patch. > > Note that testcases for all of these will be committed with the patch but I'm > Finishing up the 32-bit Arm changes to mirror the changes the AArch64 > maintainer > wanted and then have to do bootstra

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On 09/01/2021 18:04, Daniel Engel wrote: > On Sat, Jan 9, 2021, at 5:09 AM, Christophe Lyon wrote: >> On Sat, 9 Jan 2021 at 13:27, Daniel Engel wrote: >>> >>> On Thu, Jan 7, 2021, at 4:56 AM, Richard Earnshaw wrote: On 07/01/2021 00:59, Daniel Engel wrote: > --snip-- > > On Wed, J

Re: --enable-link-serialization=1 doesn't work

On 1/9/21 7:52 PM, Matthias Klose wrote: > The attached patch makes the link targets a little bit more verbose. Ok to > commit? approved by Jakub on IRC, checked in. > It shows that --enable-link-serialization=1 doesn't work: > > $ grep ^Linking ../log > Linking gnat1 |==-- | 9

Re: [PATCH 1/3] GCC: Pass --plugin to AR and RANLIB

This seems to have broken the builds on AArch64-Linux Ubuntu 18.04. make[2]: Entering directory 'binutils-gdb-master-bionic/libiberty' rm -f ./libiberty.a pic/./libiberty.a noasan/./libiberty.a ar --plugin /usr/lib/gcc/aarch64-linux-gnu/7/liblto_plugin.so rc ./libiberty.a \ ./regex.o ./cplus-d

Re: [PATCH] [WIP] openmp: Add OpenMP 5.0 task detach clause support

Hello Thanks for the review. Due to the Christmas holidays I have not finished addressing all these issues yet, but I expect to be done by the end of this week. Can this patch still make it for GCC 10, as I believe stage 4 is starting soon? Thanks Kwok On 10/12/2020 2:38 pm, Jakub Jelinek

Re: [PATCH] libstdc++: implement locale support for AIX

Hi, Clement The patch is local to libstdc++ AIX support, so I believe that I can approve it. libstdc++ loads the gcc testsuite target-supports.exp extensions. The patch needs to update the libstdc++ testcases to require wchar32 or utf-8 as appropriate to avoid the failures. Thanks, David On Mon

Re: [PATCH v4 01/29] Add and organize macros.

Some initial comments. On 11/01/2021 11:10, g...@danielengel.com wrote: > From: Daniel Engel > > These definitions facilitate subsequent patches in this series. > > gcc/libgcc/ChangeLog: > 2021-01-07 Daniel Engel > > * config/arm/t-elf: Organize functions into logical groups. > *

Re: [PATCH] libstdc++: implement locale support for AIX

Hi David, Alright, I'll see what I can do. Would "Skip if target = aix" be ok, especially for the few that I have absolutely no idea why they are failing ? Clément From: David Edelsohn Sent: Monday, January 11, 2021 4:03 PM To: CHIGOT, CLEMENT Cc: gcc-patches@gc

Re: [PATCH v4 02/29] Refactor 'clz' functions into a new file.

On 11/01/2021 11:10, g...@danielengel.com wrote: > From: Daniel Engel > > gcc/libgcc/ChangeLog: > 2021-01-07 Daniel Engel > > * config/arm/lib1funcs.S: Move __clzsi2() and __clzdi2() to > * config/arm/bits/clz2.S: New file. No, please don't push these down into a subdirectory. The

Re: [PATCH v4 03/29] Refactor 'ctz' functions into a new file.

On 11/01/2021 11:10, g...@danielengel.com wrote: > From: Daniel Engel > > gcc/libgcc/ChangeLog: > 2021-01-07 Daniel Engel > > * config/arm/lib1funcs.S: Move __ctzsi2() to > * config/arm/bits/ctz2.S: New file. Similar to the previous patch, just use ctz.S without the bits subdir. >

Re: [PATCH v4 04/29] Refactor 64-bit shift functions into a new file.

On 11/01/2021 11:10, g...@danielengel.com wrote: > From: Daniel Engel > > gcc/libgcc/ChangeLog: > 2021-01-07 Daniel Engel > > * config/arm/lib1funcs.S: Move __ashldi3(), __ashrdi3(), __lshldi3() to > * config/arm/bits/shift.S: New file. Again, drop the bits/ R. > --- > libgcc/con

Re: [PATCH] libstdc++: implement locale support for AIX

Hi David, Clement, > The patch is local to libstdc++ AIX support, so I believe that I can approve > it. have you considered merging the dragonfly and aix trees? I'm asking because it seems prudent to try and avoid creating more and more almost-but-not-quite-similar configurations (Solaris might

Re: [PATCH] libstdc++: implement locale support for AIX

Hi Clement, > Would "Skip if target = aix" be ok, especially for the few that I have > absolutely no idea why they are failing ? you should try to avoid such skips if at all possible. Should the tests start to PASS in the future, either due to AIX changes or changes in libstdc++, this would go u

Re: [PATCH v4 02/29] Refactor 'clz' functions into a new file.

On 11/01/2021 15:26, Richard Earnshaw wrote: > On 11/01/2021 11:10, g...@danielengel.com wrote: >> From: Daniel Engel >> >> gcc/libgcc/ChangeLog: >> 2021-01-07 Daniel Engel >> >> * config/arm/lib1funcs.S: Move __clzsi2() and __clzdi2() to >> * config/arm/bits/clz2.S: New file. > > No,

Re: [PATCH] libstdc++: implement locale support for AIX

On 11/01/21 16:35 +0100, Rainer Orth wrote: Hi David, Clement, The patch is local to libstdc++ AIX support, so I believe that I can approve it. have you considered merging the dragonfly and aix trees? I'm asking because it seems prudent to try and avoid creating more and more almost-but-not-

Re: [PATCH] libstdc++: implement locale support for AIX

>> Hi David, Clement, >> >>> The patch is local to libstdc++ AIX support, so I believe that I can >>> approve it. >> >>have you considered merging the dragonfly and aix trees? I'm asking >>because it seems prudent to try and avoid creating more and more >>almost-but-not-quite-similar configuratio

Re: [PATCH v4 02/29] Refactor 'clz' functions into a new file.

On Mon, Jan 11, 2021, at 7:39 AM, Richard Earnshaw wrote: > On 11/01/2021 15:26, Richard Earnshaw wrote: > > On 11/01/2021 11:10, g...@danielengel.com wrote: > >> From: Daniel Engel > >> > >> gcc/libgcc/ChangeLog: > >> 2021-01-07 Daniel Engel > >> > >>* config/arm/lib1funcs.S: Move __clzsi2

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On Sat, 9 Jan 2021 at 14:09, Christophe Lyon wrote: > > On Sat, 9 Jan 2021 at 13:27, Daniel Engel wrote: > > > > On Thu, Jan 7, 2021, at 4:56 AM, Richard Earnshaw wrote: > > > On 07/01/2021 00:59, Daniel Engel wrote: > > > > --snip-- > > > > > > > > On Wed, Jan 6, 2021, at 9:05 AM, Richard Earnsh

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On Mon, Jan 11, 2021, at 8:07 AM, Christophe Lyon wrote: > On Sat, 9 Jan 2021 at 14:09, Christophe Lyon > wrote: > > > > On Sat, 9 Jan 2021 at 13:27, Daniel Engel wrote: > > > > > > On Thu, Jan 7, 2021, at 4:56 AM, Richard Earnshaw wrote: > > > > On 07/01/2021 00:59, Daniel Engel wrote: > > > >

Re: [patch] fix -Wformat-diag warnings in rs6000-call.c

On 1/10/21 10:18 PM, Martin Sebor wrote: > On 1/10/21 3:29 AM, Matthias Klose wrote: >> is the newline intended? It's followed by a debug_rtx call. > > To avoid the warning there shouldn't be any trailing punctuation > or whitespace in the message.  The GCC quoting directives should > be preferred

Re: [PATCH v4 05/29] Import replacement 'clz' functions from CM0 library

A general comment before we start: CLZ was added to the Arm ISA in Armv5. So all subsequent Arm versions (and all versions implementing thumb2) will have this instruction. So the only cases where you'll need a fallback are armv6m (and derivatives) and pre-armv5 (Arm or thumb1). So there's no ne

Re: [PATCH v4 06/29] Import replacement 'ctz' functions from CM0 library

On 11/01/2021 11:10, g...@danielengel.com wrote: > From: Daniel Engel > > This version combines __ctzdi2() with __ctzsi2() into a single object with > an efficient tail call. The former implementation of __ctzdi2() was in C. > > On architectures without a clz instruction, this version merges th

Re: [PATCH v3] libgcc: Thumb-1 Floating-Point Library for Cortex M0

On Mon, 11 Jan 2021 at 17:18, Daniel Engel wrote: > > On Mon, Jan 11, 2021, at 8:07 AM, Christophe Lyon wrote: > > On Sat, 9 Jan 2021 at 14:09, Christophe Lyon > > wrote: > > > > > > On Sat, 9 Jan 2021 at 13:27, Daniel Engel wrote: > > > > > > > > On Thu, Jan 7, 2021, at 4:56 AM, Richard Earnsh

Re: [PATCH] libphobos: Allow building libphobos using Solaris/x86 assembler

Excerpts from Iain Buclaw's message of January 7, 2021 6:48 pm: > Excerpts from Rainer Orth's message of January 7, 2021 5:17 pm: >> Hi Iain, >> The Solaris assemblers don't support UTF-8 identifiers. Unless gdc can encode them in some way for toolchains like this (no idea if this is >>

Re: [PATCH 1/3] GCC: Pass --plugin to AR and RANLIB

> From: Luis Machado via Gcc-patches > Date: Mon, 11 Jan 2021 15:58:43 +0100 > This seems to have broken the builds on AArch64-Linux Ubuntu 18.04. > > make[2]: Entering directory 'binutils-gdb-master-bionic/libiberty' > rm -f ./libiberty.a pic/./libiberty.a noasan/./libiberty.a > ar --plugin /us

[PATCH] Properly release symtab::m_clones.

The patch is about not using delete for a memory that is allocated by GGC. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Ready to be installed? Thanks, Martin gcc/ChangeLog: PR jit/98615 * symtab-clones.h (clone_info::release): Release symtab::m

Re: [PATCH] Properly release symtab::m_clones.

> The patch is about not using delete for a memory that > is allocated by GGC. > > Patch can bootstrap on x86_64-linux-gnu and survives regression tests. > > Ready to be installed? > Thanks, > Martin > > gcc/ChangeLog: > > PR jit/98615 > * symtab-clones.h (clone_info::release): Rele

[PATCH 1/2] GCC: Check if AR works with --plugin and rc

AR from older binutils doesn't work with --plugin and rc: [hjl@gnu-cfl-2 bin]$ touch foo.c [hjl@gnu-cfl-2 bin]$ ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc libfoo.a foo.c [hjl@gnu-cfl-2 bin]$ ./ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc li

[PATCH 2/2] Binutils: Check if AR works with --plugin and rc

Check if AR works with --plugin and rc before passing --plugin to AR and RANLIB. bfd/ PR ld/27173 binutils/ PR ld/27173 * configure: Regenerated. gas/ PR ld/27173 * configure: Regenerated. gprof/ PR ld/27173 * configure: Regenerated.

[PATCH 0/2] Check if AR works with --plugin and rc

AR from older binutils doesn't work with --plugin and rc: [hjl@gnu-cfl-2 bin]$ touch foo.c [hjl@gnu-cfl-2 bin]$ ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc libfoo.a foo.c [hjl@gnu-cfl-2 bin]$ ./ar --plugin /usr/libexec/gcc/x86_64-redhat-linux/10/liblto_plugin.so rc li

[gcc-10 backport] libiberty: Support the new ("v0") mangling scheme in rust-demangle

Could this commit be backported to the gcc-10 branch? We would like to switch the default name mangling scheme in Rust but are currently blocked on upstream tool support. commit 84096498a7bd788599d4a7ca63543fc7c297645e libiberty: Support the new ("v0") mangling scheme in rust-demangle

Re: [patch] fix -Wformat-diag warnings in rs6000-call.c

On 1/11/21 9:30 AM, Matthias Klose wrote: On 1/10/21 10:18 PM, Martin Sebor wrote: On 1/10/21 3:29 AM, Matthias Klose wrote: is the newline intended? It's followed by a debug_rtx call. To avoid the warning there shouldn't be any trailing punctuation or whitespace in the message.  The GCC quot

Re: [PATCH] Properly release symtab::m_clones.

On 1/11/21 5:55 PM, Jan Hubicka wrote: The patch is about not using delete for a memory that is allocated by GGC. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Ready to be installed? Thanks, Martin gcc/ChangeLog: PR jit/98615 * symtab-clones.h (clone_i

[pushed] aarch64: Add support for unpacked SVE shifts

This patch adds support for unpacked SVE LSL, ASR and LSR. For right shifts, the type suffix needs to be taken from the element size rather than the container size. Tested on aarch64-linux-gnu and aarch64_be-elf. Pushed to trunk. Richard gcc/ * config/aarch64/aarch64-sve.md (3)

[pushed] aarch64: Add support for unpacked SVE mult, max and min

This patch makes the SVE_INT_BINARY_IMM patterns support unpacked arithmetic, covering MUL, SMAX, SMIN, UMAX and UMIN. For min and max, the type suffix must be taken from the element size rather than the container size. The XFAILs are due to PR98602. Tested on aarch64-linux-gnu and aarch64_be-elf

[pushed] aarch64: Add general unpacked SVE conditional binary arithmetic

This patch adds support for conditional binary ADD, SUB, MUL, SMAX, UMAX, SMIN, UMIN, LSL, LSR, ASR, AND, ORR and EOR. It's not really possible to split it up further given how the patterns are written. Min, max and right-shift need the element size rather than the container size. The others wou

[pushed] aarch64: Add support for unpacked SVE ADR

This patch extends the ADR patterns to handle unpacked vectors. They would work with both elements and containers, but since the instructions only support .s and .d, we get more coverage by using containers. Tested on aarch64-linux-gnu and aarch64_be-elf. Pushed to trunk. Richard gcc/

[pushed] aarch64: Add support for unpacked SVE ABD

This patch adds support for unpacked SVE SABD and UABD. It also rewrites the patterns so that they match as combine patterns without the need for REG_EQUAL notes. Finally, there was no pattern for merging with the second input, which can be handled by reversing the operands. The type suffix needs

[pushed] aarch64: Add support for unpacked SVE MULH

This patch extends the SMULH and UMULH support to unpacked vectors. The type suffix must be taken from the element size rather than the container size. The main use of these patterns is to support division and modulus by a constant. The conditional forms would be hard to trigger from non-ACLE cod

[pushed] aarch64: Add support for unpacked SVE conditional BIC

This patch adds support for unpacked conditional BIC. The type suffix could be taken from the element size or the container size, so the patch continues to use the element size. This is consistent with the existing support for unconditional BIC. Tested on aarch64-linux-gnu and aarch64_be-elf. P

[pushed] aarch64: Add support for unpacked SVE ASRD

This patch adds support for both conditional and unconditional unpacked ASRD. This meant adding a new define_insn for the unconditional form, instead of reusing the conditional instructions. It also meant extending the current conditional patterns to support merging with any independent value, no

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