On 11/17/20 2:13 PM, Jan Hubicka wrote:
> Hi,
> I am testing the following fix. I manually applied a rejected hunk and
> for some reaosn managed to reverse the conditonal :(
>
> Honza
>
> * ipa-icf.c (sem_function::hash_stmt): Fix conditional on
> variably_modified_type_p.
> diff --
On Thu, Nov 12, 2020 at 11:27 PM Kito Cheng wrote:
> Current GCC implementation is RISC-V ISA 2.2, this patch set implement
> v20190608 and v20191213, and also add option
> -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version.
>
> There is one major incompatible
>
> That opti
On 11/17/20 10:53 AM, Pop, Sebastian via Gcc-patches wrote:
> Hi,
>
> the attached patch fixes a configure error on Arm64 when passing
> --with-tune=... to configure:
> ```
> This target does not support --with-tune.
> Valid --with options are: abi cpu arch
> ```
> The missing flag sets target
On 11/17/20 2:27 PM, Pop, Sebastian via Gcc-patches wrote:
> Hi,
>
> here is a follow-up patch to add missing Arm64 configure flags as aliases to
> the existing flags.
>
> gcc/
> * config.gcc: add configure flags --with-{cpu,arch,tune}-{32,64}
> as alias flags for --with-{cpu,ar
On 10/30/20 5:34 AM, Thomas Schwinge wrote:
> Hi!
>
> On 2017-05-22T18:55:29+0200, Tom de Vries wrote:
>> On 05/16/2017 03:12 PM, Rainer Orth wrote:
>>> [...], but the new proc ['dg-line'] needs documenting in sourcebuild.texi.
>> Attached patch adds the missing documentation.
> OK to expand th
PR 91029 observes when
a % b > 0 && b >= 0,
then a has an implied range of a >=0. likewise
a % b < 0 implies a range of a <= 0.
This patch is a good example of how range-ops can be leveraged to solve
problems. It simply implements operator_trunc_mod::op1_range() to solve
for 'A' when the
Minor questions for Jan and Richi embedded below...
On 10/9/20 4:12 AM, guojiufu via Gcc-patches wrote:
> When investigating the issue from
> https://gcc.gnu.org/pipermail/gcc-patches/2020-July/549786.html
> I find the BB COUNTs of loop seems are not accurate in some case.
> For example:
>
> In
On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote:
> On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote:
>>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), returning
>>> the
>>> + result and setting it in TARGET. Otherwise return NULL_RTX on failur
On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote:
> On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote:
>>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), returning
>>> the
>>> + result and setting it in TARGET. Otherwise return NULL_RTX on failur
Hi!
On Tue, Nov 17, 2020 at 11:48:04AM -0600, acsaw...@linux.ibm.com wrote:
> This patch changes powerpc MMA builtins to use the new opaque
> mode class and use modes OO (32 bytes) and XO (64 bytes)
> instead of POI/PXI. Using the opaque modes prevents
> optimization from trying to do anything wit
On Tue, Nov 17, 2020 at 12:41:58PM -0600, Peter Bergner wrote:
> > +;; Return 1 if this operand is valid for an MMA disassemble insn.
> > +(define_predicate "mma_disassemble_output_operand"
> > + (match_code "reg,subreg,mem")
> > +{
> > + if (REG_P (op) && !vsx_register_operand (op, mode))
> > +
On Tue, Nov 17, 2020 at 12:03:05PM -0600, acsaw...@linux.ibm.com wrote:
> From: Aaron Sawdey
>
> After the MMA opaque mode patch goes in, we can re-enable
> use of vector pair in the inline expansion of memcpy/memmove.
>
> After bootstrap/regtest, OK for trunk?
Yes, okay for trunk after the rs6
On 11/17/20 5:01 PM, Segher Boessenkool wrote:
> On Tue, Nov 17, 2020 at 12:41:58PM -0600, Peter Bergner wrote:
>>> +;; Return 1 if this operand is valid for an MMA disassemble insn.
>>> +(define_predicate "mma_disassemble_output_operand"
>>> + (match_code "reg,subreg,mem")
>>> +{
>>> + if (REG_P
On 17/11/20 21:51 +0100, François Dumont via Libstdc++ wrote:
This is a change that has been done to _Hashtable and that I forgot to
propose for _Rb_tree.
The _GLIBCXX_XREF macro can be easily removed of course.
   libstdc++: _Rb_tree code cleanup, remove lambdas.
   Use an additiona
On 14/11/20 14:23 +, Jonathan Wakely via Libstdc++ wrote:
On Sat, 14 Nov 2020, 13:30 Mike Crowe via Libstdc++,
wrote:
On Saturday 14 November 2020 at 00:17:59 +, Jonathan Wakely via
Libstdc++ wrote:
> On 32-bit targets where userspace has switched to 64-bit time_t, we
> cannot pass str
Hi, Thomas
The patch resolves the "no such variable" error message, but I see
"during GIMPLE pass: omplower"
excess error message.
I installed Tcl 8.6 with Expect 5.45. This removes the "no such
variable" error messages for C and C++ test cases, but they still
occur for Fortran.
I guess that
On 11/16/20 4:54 PM, Jeff Law wrote:
On 11/16/20 2:04 AM, Richard Biener via Gcc-patches wrote:
On Sun, Nov 15, 2020 at 1:46 AM Martin Sebor via Gcc-patches
wrote:
GCC considers PTRDIFF_MAX - 1 to be the size of the largest object
so that the difference between a pointer to the byte just past
This libgo patch updates the gofrontend mangling checks, in
preparation for changing the mangling scheme again.
This is a port of two patches in the master repository.
https://golang.org/cl/259298
cmd/cgo: split gofrontend mangling checks into cmd/internal/pkgpath
This is a step toward
On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote:
> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> index 4d528a39a37..85bb42d6dce 100644
> --- a/gcc/config/rs6000/rs6000.c
> +++ b/gcc/config/rs6000/rs6000.c
> @@ -1080,6 +1080,26 @@ struct processor_costs p
On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote:
> Add Power10 scheduling description.
>
> This patch adds the Power10 scheduling description. Since power10.md
> was pretty much a complete rewrite (existing version of power10.md is
> mostly just a copy of power9.md), I diffed p
On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches wrote:
> PowerPC: Restrict long double test to use IBM long double.
>
> I posted this patch previously as a set of 3 testsuite patches. I have
> separated them into separate patches. This patch marks the convert-bfp-11.c
> patch
On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches wrote:
> Include math.h in nextafter-2.c test.
>
> I previously posted this with two other patches. I've separated this into its
> own patch. What happens is because the nextafter-2.c test uses -fno-builtin,
> and it does not in
On Sun, 2020-11-15 at 12:17 -0500, Michael Meissner via Gcc-patches wrote:
> From 698d9fd8a5701fa4ed9690ddf71d57765921778c Mon Sep 17 00:00:00 2001
> From: Michael Meissner
> Date: Sun, 15 Nov 2020 00:48:23 -0500
> Subject: [PATCH] PowerPC Fix ibm128 defaults for pr70117.c test.
>
> This patch wa
>> Current GCC implementation is RISC-V ISA 2.2, this patch set implement
>> v20190608 and v20191213, and also add option
>> -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version.
>>
>> There is one major incompatible
>>
>> That option will effect the default version of each s
On Wed, Nov 18, 2020 at 5:29 AM Jim Wilson wrote:
>
> On Thu, Nov 12, 2020 at 11:28 PM Kito Cheng wrote:
>>
>> +#ifndef HAVE_AS_MARCH_ZIFENCE
>> + /* Skip since older binutils don't recognize zifencei,
>> + we mad a mistake that is binutils 2.35 support zicsr but not support
>> + zifence
>> - CSR related instructions and fence instructions has to be splitted from
>>baseline ISA, zicsr and zifencei are corresponding sub-extension.
>
>
> It is actually only fence.i that is split off. fence is still part of the
> base ISA. This is why it is called zifencei.
Oh...I didn't noti
On Tue, Nov 17, 2020 at 11:33:23PM -0600, will schmidt wrote:
> On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches wrote:
> > Include math.h in nextafter-2.c test.
> >
> > I previously posted this with two other patches. I've separated this into
> > its
> > own patch. What happ
On Tue, Nov 17, 2020 at 11:33:29PM -0600, will schmidt wrote:
> On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches wrote:
> > PowerPC: Restrict long double test to use IBM long double.
> >
> > I posted this patch previously as a set of 3 testsuite patches. I have
> > separated th
Patch set committed :)
On Wed, Nov 18, 2020 at 1:43 PM Kito Cheng wrote:
> >> Current GCC implementation is RISC-V ISA 2.2, this patch set implement
> v20190608 and v20191213, and also add option
> -misa-spec=[2.2|20190608|20191213] to change the default ISA spec version.
> >>
> >> There is one
On Tue, 17 Nov 2020, Jeff Law wrote:
>
> Minor questions for Jan and Richi embedded below...
>
> On 10/9/20 4:12 AM, guojiufu via Gcc-patches wrote:
> > When investigating the issue from
> > https://gcc.gnu.org/pipermail/gcc-patches/2020-July/549786.html
> > I find the BB COUNTs of loop seems a
Hi,
main purpose of obj_type_ref is to hold the type that was used in
virutal call. We do not hash this info in hash_operand that causes a
lot of miscompares at ICF time. With LTO this is quite important for
icf performance and in that case we do have manged type names (for
non-anonymous types)
On Tue, 17 Nov 2020, Jeff Law wrote:
>
>
> On 11/4/20 8:10 AM, Raoni Fassina Firmino via Gcc-patches wrote:
> > On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote:
> >>> +/* Expand call EXP to the fegetround builtin (from C99 fenv.h),
> >>> returning the
> >>> + result and setting
On Wed, 18 Nov 2020, Jan Hubicka wrote:
> Hi,
> main purpose of obj_type_ref is to hold the type that was used in
> virutal call. We do not hash this info in hash_operand that causes a
> lot of miscompares at ICF time. With LTO this is quite important for
> icf performance and in that case we do
On Tue, Nov 17, 2020 at 2:02 PM Richard Sandiford
wrote:
>
> Richard Biener via Gcc-patches writes:
> > On Tue, Nov 17, 2020 at 12:24 PM Richard Sandiford via Gcc-patches
> > wrote:
> >>
> >> We're now able to vectorise the set-up loop:
> >>
> >> int p = power2 (fns[i].po2);
> >> for
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