Re: [PATCH] libgomp: Add OMPD Address Space Information functions.

On Wed, Jul 08, 2020 at 07:53:23PM -0400, y2s1982 . wrote: > I do remember, though I obviously understood wrongly. Sorry about that. > I had assumed it might have something to do with ICV but didn't realize it > would also > apply to other variables. In all honesty, I was looking for _OPENMP macro;

Initial Sapphire Rapids and Alder Lake support from ISA r40

Hi: This patch is about to add Sapphire Rapids and Alder Lake to GCC. Sapphire Rapids is based on Cooper Lake and plus ISA MOVDIRI/MOVDIR64B/AVX512VP2INTERSECT/ENQCMD/CLDEMOTE/PTWRITE/WAITPKG/SERIALIZE/TSXLDTRK. Alder Lake is based on Skylake and plus ISA CLDEMOTE/PTWRITE/WAITPK/SERIALIZE. For de

Re: [patch] Make memory copy functions scalar storage order barriers

> OK with me. Thanks. > I still believe we could handle reverse storage order more "optimistically" > (without all the current usage restrictions). We seem to have no problems > with address-spaces in this area for example (their problematic cases are > of course slightly different). The fundam

[PATCH] S/390: Emit vector alignment hints for z13 if AS accepts them [BACKPORT GCC10]

gcc/ChangeLog: * config.in: Regenerate. * config/s390/s390.c (print_operand): Emit vector alignment hints for target z13, if AS accepts them. For other targets the logic stays the same. * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define

[PATCH] S/390: Emit vector alignment hints for z13 if AS accepts them [BACKPORT GCC9]

Bootstrapped and regtested on s390x with and without a patched gas. Ok for master? gcc/ChangeLog: * config.in: Regenerate. * config/s390/s390.c (print_operand): Emit vector alignment hints for target z13, if AS accepts them. For other targets the logic stays the s

Re: [patch] Make memory copy functions scalar storage order barriers

On Thu, Jul 9, 2020 at 9:29 AM Eric Botcazou wrote: > > > OK with me. > > Thanks. > > > I still believe we could handle reverse storage order more "optimistically" > > (without all the current usage restrictions). We seem to have no problems > > with address-spaces in this area for example (their

Re: [PATCH] S/390: Emit vector alignment hints for z13 if AS accepts them [BACKPORT GCC10]

Bootstrapped and regtested on s390x with and without patched gas. Ok for releases/gcc-10 branch? On Thu, Jul 09, 2020 at 09:29:21AM +0200, Stefan Schulze Frielinghaus via Gcc-patches wrote: > gcc/ChangeLog: > > * config.in: Regenerate. > * config/s390/s390.c (print_operand): Emit vec

Re: [PATCH] S/390: Emit vector alignment hints for z13 if AS accepts them [BACKPORT GCC9]

On Thu, Jul 09, 2020 at 09:35:42AM +0200, Stefan Schulze Frielinghaus via Gcc-patches wrote: > Bootstrapped and regtested on s390x with and without a patched gas. Ok > for master? Ok for releases/gcc-9 branch? (not for master of course, sorry for the confusion). > gcc/ChangeLog: > > * con

[PATCH] Fortran : accepts pointer initialization of DT dummy args, PR45337

Please find attached a fix for this PR. I think the discussion of intent muddied the waters for this PR. As I understand it initialisation of variables implies the save attribute.  The save attribute is incompatible with the dummy attribute so an error should be output when initialisation is a

[PATCH] Fortran : Implicitly type parameter causes an invalid error, PR96038

Please find attached patch for fix PR.  The original patch was provided by Steve Kargl in the initial problem report. OK to commit to master and backport? Fortran  : Implicitly type parameter causes an invalid errorPR96038 If a paramter to declared and initialised before its type is declared a

Re: [PATCH] rs6000: Refine RTL unroll adjust hook

Segher Boessenkool writes: Hi, > On Wed, Jul 08, 2020 at 11:39:56AM +0800, Jiufu Guo wrote: >> Segher Boessenkool writes: >> > I am not happy about what is considered "a complex loop" here. >> For early exit, which may cause and *next* unrolled iterations may be >> not executed, then unroll may

Re: [PATCH] middle-end: Improve RTL expansion in expand_mul_overflow,

"Roger Sayle" writes: > This patch improves the RTL that the middle-end generates for testing > signed overflow following a widening multiplication. During this > expansion the middle-end generates a truncation which can get used > multiple times. Placing this intermediate value in a pseudo regi

Re: [wwwdocs PATCH] remove tree-browser page and links

Hu Jiangping writes: > Hi, > > I'm trying Tree Browser during debugging, but failed. > I found that tree-browser.c and tree-browser.def have been > removed at 2015-07-25. So, to avoid misunderstanding, > can we remove this tree-browser page too? Thanks for the patch. Seems like a good idea to me

Re: [committed] amdgcn: Add fold_left_plus vector reductions

Andrew Stubbs writes: > On 07/07/2020 12:03, Richard Sandiford wrote: >> Andrew Stubbs writes: >>> This patch implements a floating-point fold_left_plus vector pattern, >>> which gives a significant speed-up in the BabelStream "dot" benchmark. >>> >>> The GCN architecture can't actually do an in-

Re: [PATCH] middle-end: Improve RTL expansion in expand_mul_overflow,

On Thu, Jul 09, 2020 at 09:17:46AM +0100, Richard Sandiford wrote: > > --- a/gcc/internal-fn.c > > +++ b/gcc/internal-fn.c > > @@ -1627,6 +1627,9 @@ expand_mul_overflow (location_t loc, tree lhs, tree > > arg0, tree arg1, > > profile_probability::very_likely ()); >

[PATCH] [AVX512] [PR87767] Optimize memory broadcast for constant vector under AVX512

Hi: For a constant vector having one duplicated value, there's no need to put the whole vector in the constant pool, using embedded broadcast instead. Bootstrap test is Ok, regression test for i386/x86-64 backend is ok. gcc/ChangeLog: PR target/87767 * config/i386/i386-featur

Re: [PATCH] middle-end: Improve RTL expansion in expand_mul_overflow,

Jakub Jelinek writes: > On Thu, Jul 09, 2020 at 09:17:46AM +0100, Richard Sandiford wrote: >> > --- a/gcc/internal-fn.c >> > +++ b/gcc/internal-fn.c >> > @@ -1627,6 +1627,9 @@ expand_mul_overflow (location_t loc, tree lhs, tree >> > arg0, tree arg1, >> > profile_pr

Re: [wwwdocs PATCH] remove tree-browser page and links

On Thu, 9 Jul 2020, Richard Sandiford wrote: >> I'm trying Tree Browser during debugging, but failed. >> I found that tree-browser.c and tree-browser.def have been >> removed at 2015-07-25. So, to avoid misunderstanding, >> can we remove this tree-browser page too? > Thanks for the patch. Seems li

Re: [PATCH] Fix unnecessary register spill that depends on function ordering

Sorry for the slow reply. Omar Tahir writes: >> Omar Tahir writes: >> > Hi Richard, >> > >> > From: Richard Sandiford >> >> > @@ -3719,6 +3722,7 @@ static unsigned int rest_of_handle_sched (void) >> >> > { #ifdef INSN_SCHEDULING >> >> > + first_moveable_pseudo = last_moveable_pseudo; >> >> >

[committed] openmp: Change omp_atv_default value and rename omp_atv_sequential to omp_atv_serialized

Hi! While this is an OpenMP 5.1 change, it is undesirable to let people use different values and then deal with ABI backwards compatibility in a year or two. Have been waiting with this for a month until the final wording for omp_atv_default makes it through. Bootstrapped/regtested on x86_64-li

[PATCH] openmp: Optimize triangular loop logical iterator to actual iterators computation using search for quadratic equation root(s)

Hi! This patch implements the optimized logical to actual iterators computation for triangular loops. I have a rough implementation using integers, but this one uses floating point. There is a small problem that -fopenmp programs aren't linked with -lm, so it does it only if the hw has sqrt opta

[PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection.

Hi All, This patch fixes a couple of issues in AArch64's -mcpu=native processing: The buffer used to read the lines from /proc/cpuinfo is 128 bytes long. While this was enough in the past with the increase in architecture extensions it is no longer enough. It results in two bugs: 1) No option

[PATCH 2/6] AArch64: Add GCC_CPUINFO override

Hi All, This adds an in intentionally undocumented environment variable GCC_CPUINFO which can be used to test -mcpu=native. Tests using this are added later on. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master, GCC 10, 9 and 8? Thanks, Tamar gcc/ChangeLog:

[PATCH 3/6] Arm: Add GCC_CPUINFO override

Hi All, This adds an in intentionally undocumented environment variable GCC_CPUINFO which can be used to test -mcpu=native. Tests using these are added later on. Bootstrapped Regtested on arm-none-linux-gnueabihf and no issues. Ok for master, GCC 10, 9 and 8? Thanks, Tamar gcc/ChangeLog:

[PATCH 4/6] Testsuite: Make it easier to debug environment setting functions

Hi All, This adds verbose output to dg-set-compiler-env-var and dg-set-target-env-var so you can actually see what they're setting when you add -v -v. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master? Thanks, Tamar gcc/testsuite/ChangeLog: * lib/gcc-dg.exp

Re: Initial Sapphire Rapids and Alder Lake support from ISA r40

On Thu, Jul 9, 2020 at 9:20 AM Cui, Lili wrote: > > Hi: > This patch is about to add Sapphire Rapids and Alder Lake to GCC. > Sapphire Rapids is based on Cooper Lake and plus ISA > MOVDIRI/MOVDIR64B/AVX512VP2INTERSECT/ENQCMD/CLDEMOTE/PTWRITE/WAITPKG/SERIALIZE/TSXLDTRK. > Alder Lake is based on Sk

[PATCH 5/6] Docs: Document environment setting directives for testsuite

Hi All, This document some of the existing DejaGnu directives to modify environment variables before test or compiler invocations. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master? Thanks, Tamar gcc/ChangeLog: * doc/sourcebuild.texi (dg-set-compiler-env-va

[PATCH 6/6] AArch64: Add test for -mcpu=native

Hi All, This adds some tests to the GCC testsuite for testing the -mcpu=native code. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master, GCC 10, 9 and 8? Thanks, Tamar gcc/testsuite/ChangeLog: * gcc.target/aarch64/cpunative/aarch64-cpunative.exp: New test.

Re: [Patch][gcn, nvptx, offloading] mkoffload – handle -fpic/-fPIC

Hi Kwok! On 2020-07-08T18:35:43+0100, Kwok Cheung Yeung wrote: > > I tried out the patch with one test-case and -pie -fPIC/-fpic already > > seems to works, so perhaps we could have at least one test-case > > exercising this in libgomp? That sounds easier to do than the > > shared-lib test-c

Re: [PATCH] remove premature vect_verify_datarefs_alignment

On Thu, 9 Jul 2020, Kewen.Lin wrote: > on 2020/7/9 上午10:48, Kewen.Lin via Gcc-patches wrote: > > Hi Richi, > > > > on 2020/7/8 下午10:45, Richard Biener wrote: > >> This followup removes vect_verify_datarefs_alignment and its > >> premature cancellation of vectorization leaving the actual > >> deci

[PATCH] Add -fdump-profile-report.

When using -fprofile-report, -fdump-profile-report can be used to print the report to a foo.c.000i.profile-report file instead of stderr. I see it handy for comparison purpose. Patch can bootstrap on x86_64-linux-gnu and survives regression tests. Ready to be installed? Thanks, Martin --- gcc/

Re: [PATCH V2] PING^2 correct COUNT and PROB for unrolled loop

On 7/2/20 4:35 AM, Jiufu Guo via Gcc-patches wrote: I would like to reping this patch. Since this is correcting COUNT and PROB for hot blocks, it helps some cases. https://gcc.gnu.org/legacy-ml/gcc-patches/2020-02/msg00927.html Hey. I've just briefly looked at the patch and I don't feel the r

Re: [PATCH] x86: Enable FMA in rsqrt2 expander

On 07 июл 09:06, H.J. Lu wrote: > On Tue, Jul 7, 2020 at 8:56 AM Kirill Yukhin wrote: > > > > Hello HJ, > > > > On 28 июн 07:19, H.J. Lu via Gcc-patches wrote: > > > Enable FMA in rsqrt2 expander and fold rsqrtv16sf2 expander into > > > rsqrt2 expander which expands to UNSPEC_RSQRT28 for TARGET_AV

RE: [PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection.

Hi Tamar, > -Original Message- > From: Tamar Christina > Sent: 09 July 2020 10:54 > To: gcc-patches@gcc.gnu.org > Cc: nd ; Richard Earnshaw ; > Marcus Shawcroft ; Kyrylo Tkachov > ; Richard Sandiford > > Subject: [PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection. > > Hi All, > >

Re: [PATCH v4 1/2] asan: specify alignment for LASANPC labels

On Wed, 2020-07-01 at 21:48 +0200, Ilya Leoshkevich wrote: > On Wed, 2020-07-01 at 11:57 -0600, Jeff Law wrote: > > On Wed, 2020-07-01 at 14:29 +0200, Ilya Leoshkevich via Gcc-patches > > wrote: > > > gcc/ChangeLog: > > > > > > 2020-06-30 Ilya Leoshkevich > > > > > > * asan.c (asan_emit_stac

RE: [PATCH 2/6] AArch64: Add GCC_CPUINFO override

> -Original Message- > From: Tamar Christina > Sent: 09 July 2020 10:55 > To: gcc-patches@gcc.gnu.org > Cc: nd ; Richard Earnshaw ; > Marcus Shawcroft ; Kyrylo Tkachov > ; Richard Sandiford > > Subject: [PATCH 2/6] AArch64: Add GCC_CPUINFO override > > Hi All, > > This adds an in inte

RE: [PATCH 3/6] Arm: Add GCC_CPUINFO override

> -Original Message- > From: Tamar Christina > Sent: 09 July 2020 10:55 > To: gcc-patches@gcc.gnu.org > Cc: nd ; Ramana Radhakrishnan > ; Richard Earnshaw > ; ni...@redhat.com; Kyrylo Tkachov > > Subject: [PATCH 3/6] Arm: Add GCC_CPUINFO override > > Hi All, > > This adds an in intent

RE: [PATCH 6/6] AArch64: Add test for -mcpu=native

> -Original Message- > From: Tamar Christina > Sent: 09 July 2020 10:58 > To: gcc-patches@gcc.gnu.org > Cc: nd ; Richard Earnshaw ; > Marcus Shawcroft ; Kyrylo Tkachov > ; Richard Sandiford > > Subject: [PATCH 6/6] AArch64: Add test for -mcpu=native > > Hi All, > > This adds some test

Re: [PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection.

Tamar Christina writes: > Hi All, > > This patch fixes a couple of issues in AArch64's -mcpu=native processing: > > The buffer used to read the lines from /proc/cpuinfo is 128 bytes long. While > this was enough in the past with the increase in architecture extensions it is > no longer enough.

Re: [PATCH] rs6000: Allow MMA built-in initialization regardless of compiler options

On 7/8/20 11:02 PM, Peter Bergner wrote: > Is this ok for trunk assuming the bootstrap and regression testing > show no regressions? > > This also affects GCC10, so I'd like to backport this before the release. > Ok there too after it sits on trunk a day or two? > > Peter > > > gcc/ > PR

Re: [PATCH] [RISC-V] Add support for TLS stack protector canary access

Hi Cooper, Great Job! Tested-by: Guo Ren Here is kernel related patch with tested result: https://lore.kernel.org/linux-riscv/1594279697-72511-2-git-send-email-guo...@kernel.org/T/#u Best Regards  Guo Ren On 2020/7/8 上午10:51, cooper wrote: The linux kernel guys are discussing about supp

Re: [PATCH] x86: Enable FMA in rsqrt2 expander

On Thu, Jul 9, 2020 at 5:04 AM Kirill Yukhin wrote: > > On 07 июл 09:06, H.J. Lu wrote: > > On Tue, Jul 7, 2020 at 8:56 AM Kirill Yukhin > > wrote: > > > > > > Hello HJ, > > > > > > On 28 июн 07:19, H.J. Lu via Gcc-patches wrote: > > > > Enable FMA in rsqrt2 expander and fold rsqrtv16sf2 expande

RE: [PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection.

Hi Richard, Thanks for the review, > -Original Message- > From: Richard Sandiford > Sent: Thursday, July 9, 2020 1:35 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw > ; Marcus Shawcroft > ; Kyrylo Tkachov > Subject: Re: [PATCH 1/6] AArch64: Fix bugs in -m

PING^2 [PATCH 0/2] x86: Add cmpmemsi for -minline-all-stringops

On Tue, Jun 9, 2020 at 9:32 AM H.J. Lu wrote: > > On Sun, May 31, 2020 at 4:10 PM H.J. Lu wrote: > > > > We used to expand memcmp to "repz cmpsb" via cmpstrnsi. It was changed > > by > > > > commit 9b0f6f5e511ca512e4faeabc81d2fd3abad9b02f > > Author: Nick Clifton > > Date: Fri Aug 12 16:26:11

Re: [PATCH] aarch64: Change costs for TX2 to expose more vectorization opportunities

Richard, Can you approve the backporting of the patch to GCC10? Also, since I don't have the commit permission can you push it if approved? -- Thanks, Anton On 06.7.2020 21:04 , Richard Sandiford wrote: Joel Jones writes: I approve of this patch. I'm responsible for GCC for TX2 at Marvel

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:58 -0700, Carl Love wrote: > [PATCH 1/6] rs6000, Update support for vec_extract Email subject needs to be updated too. This is at least correct in- line. Here and subsequent messages in thread. > > - > V4 changes > rebased onto mainline

Ping Re: c: Add C2X BOOL_MAX and BOOL_WIDTH to limits.h

Ping for this limits.h patch . -- Joseph S. Myers jos...@codesourcery.com

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:59 -0700, Carl Love wrote: > [PATCH 2/6] rs6000 Add vector insert builtin support > > > V4 changes > Rebased on mainline. Changed FUTURE to P10 as needed. > > > V3 changes > > Replace spaces w

Re: [PATCH] handle MEM_REF with void* arguments (PR c++/95768)

On 6/29/20 1:19 AM, Richard Biener wrote: On Mon, Jun 29, 2020 at 1:08 AM Martin Sebor wrote: On 6/23/20 1:12 AM, Richard Biener wrote: On Tue, Jun 23, 2020 at 12:22 AM Martin Sebor via Gcc-patches wrote: On 6/22/20 12:55 PM, Jason Merrill wrote: On 6/22/20 1:25 PM, Martin Sebor wrote: T

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:59 -0700, Carl Love wrote: > [PATCH 3/6] rs6000, Add vector replace builtin support > > -- > V4 Fixes: > >Rebased on mainline. Changed FUTURE to P10 in code and ChangeLog. >Set DEBUG to 0 in vec-replace-word-runnable.c test program

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:59 -0700, Carl Love wrote: > [PATCH 4/6] rs6000, Add vector shift double builtin support > Nothing popped out at me for this patch. lgtm thanks -Will > -- > V4 Fixes: > >Rebased on mainline. Changed FUTURE to P10. >Changed SLDB

Re: [PATCH 5/6] Docs: Document environment setting directives for testsuite

On 7/9/20 3:57 AM, Tamar Christina wrote: Hi All, This document some of the existing DejaGnu directives to modify environment variables before test or compiler invocations. Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. Ok for master? Thanks, Tamar gcc/ChangeLog: *

Re: [PATCH] rs6000: Refine RTL unroll adjust hook

Hi Jiufu, On Thu, Jul 09, 2020 at 04:01:38PM +0800, Jiufu Guo wrote: > Segher Boessenkool writes: > >> But for each single condition, loop unrolling may still be helpful. > >> While, if these conditions are all occur in a loop, it would be more > >> possible to get negative impacts after unrolled

Re: [PATCH] rs6000: Allow MMA built-in initialization regardless of compiler options

Hi! On Wed, Jul 08, 2020 at 11:02:45PM -0500, Peter Bergner wrote: > PR96125 shows a bug when we try to use an MMA built-in within a function > that uses #pragma target/attribute target to enable power10 code generation > and the -mcpu= command line option is pre-power10. > > The problem is that

Re: [PATCH 4/6] Testsuite: Make it easier to debug environment setting functions

On Jul 9, 2020, at 2:56 AM, Tamar Christina wrote: > This adds verbose output to dg-set-compiler-env-var and dg-set-target-env-var > so you can actually see what they're setting when you add -v -v. > > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. > > Ok for master? Ok.

Re: [PATCH 1/6] AArch64: Fix bugs in -mcpu=native detection.

Tamar Christina writes: > Hi Richard, > > Thanks for the review, > >> -Original Message- >> From: Richard Sandiford >> Sent: Thursday, July 9, 2020 1:35 PM >> To: Tamar Christina >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw >> ; Marcus Shawcroft >> ; Kyrylo Tkachov >> Subject:

Re: [PATCH 4/6] Testsuite: Make it easier to debug environment setting functions

Tamar Christina writes: > diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp > index > 27cc7c19625d8bff12268de16ec0c20d558394b7..ccf6b7cc70b1d4268c0b0c65f960fb42deab0d88 > 100644 > --- a/gcc/testsuite/lib/gcc-dg.exp > +++ b/gcc/testsuite/lib/gcc-dg.exp > @@ -477,7 +477,10 @

Re: [PATCH 5/6] Docs: Document environment setting directives for testsuite

Tamar Christina writes: > Hi All, > > This document some of the existing DejaGnu directives to modify > environment variables before test or compiler invocations. > > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. > > Ok for master? > > Thanks, > Tamar > > gcc/ChangeLog: > >

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:59 -0700, Carl Love wrote: > [PATCH 5/6] rs6000, Add vector splat builtin support > > -- > V4 Fixes: > >Rebased on mainline. Changed FUTURE to P10. >define_predicate "s32bit_cint_operand" removed unnecessary cast in > definiti

Re: [PATCH ver 4] RS6000, add VSX mask manipulation support

Hi Carl, On Wed, Jul 08, 2020 at 01:22:33PM -0700, Carl Love wrote: > The following patch adds support for builtins vec_genbm(), vec_genhm(), > vec_genwm(), vec_gendm(), vec_genqm(), vec_cntm(), vec_expandm(), > vec_extractm(). Support for instructions mtvsrbm, mtvsrhm, mtvsrwm, > mtvsrdm, mtvsr

[PATCH] fixup BIT_FIELD_REF detection in SLP discovery

This fixes a thinko where we end up combining a BIT_FIELD_REF and a memory access, fixed by checking all stmts are a load or none. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. 2020-07-09 Richard Biener PR tree-optimization/96133 * tree-vect-slp.c (vect_build_s

[committed] c++: Partially revert fix for PR c++/95497 [PR96132]

I was mistaken to assume that a dependent type is necessarily incomplete, and indeed there are multiple places in the frontend where we check a type for both dependency and completeness. So this patch partially reverts the fix for PR95497, restoring the dependent_type_p check that guarded the call

Re: [PATCH] ppc64 check for incompatible setting of minimal-toc

Hi! On Mon, May 18, 2020 at 04:02:34PM -0700, Douglas B Rupp wrote: > The attached patch is proposed for rs6000/linux64.h. (Please use inline patches if at all possible. For example, your replies left out the patch already). > The problem it addresses is that the current checking only tests for

Re: [PATCH 0/6 ver 4] ] Permute Class Operations

On Wed, 2020-07-08 at 12:59 -0700, Carl Love wrote: > [PATCH 6/6] rs6000 Add vector blend, permute builtin support > > -- > V4 Fixes: > >Rebased on mainline. Changed FUTURE to P10. > - > > v3 fixes: >Replace spaces with tabs in ChangeLog descripti

[PATCH] middle-end: Call get_constant_section with DECL not EXP.

output_constant_def_contents() can call get_constant_section() with an EXP that is a CONSTRUCTOR, which is not a declaration. This can hit asserts in GCC machinery to choose a named section for the initialization data that expects the parameters to be DECLs. get_constant_section() is a wrapper ar

Re: [PATCH] rs6000: Split movsf_from_si from high word before reload[PR89310]

Hi! On Thu, Jul 09, 2020 at 11:09:42AM +0800, luoxhu wrote: > > Maybe change it back to just SI? It won't match often at all for QI or > > HI anyway, it seems. Sorry for that detour. Should be good with the > > above nits fixed :-) > > OK, if I see correctly, subreg of DImode should be SImode

[PATCH] libgccjit: Fix several memory leaks in the driver

Hello, This patch fixes several memory leaks in the driver, all of which relate to the handling of static specs. We introduce functions set_static_spec_{shared,owned}() which are used to enforce proper memory management when updating the strings in the static_specs table. This is achieved by maki

Re: [PATCH 6/9] [OpenACC] Set bias to zero for explicit attach/detach clauses in C and C++

Hi Julian! On 2020-06-25T13:36:15+0200, I wrote: > On 2020-06-16T15:39:42-0700, Julian Brown wrote: >> This is a fix for the pointer (or array) size inadvertently being used >> for the bias of attach and detach clauses (PR95270) > > Thanks for looking into that one, which had caused my some gray

Re: [PATCH] rs6000: Allow MMA built-in initialization regardless of compiler options

On 7/9/20 12:11 PM, Segher Boessenkool wrote: >> gcc/testsuite/ >> PR target/96125 >> * gcc.target/powerpc/pr96125.c: New test. > > Okay for trunk and 10 (but see test nit below). Thanks! [snip] > So maybe we should just do all builtins always? I think that is the correct thing to do,

Re: [PATCH] rs6000: Allow MMA built-in initialization regardless of compiler options

On 7/9/20 4:10 PM, Peter Bergner wrote: On 7/9/20 12:11 PM, Segher Boessenkool wrote: gcc/testsuite/ PR target/96125 * gcc.target/powerpc/pr96125.c: New test. Okay for trunk and 10 (but see test nit below). Thanks! [snip] So maybe we should just do all builtins always? I t

Re: [PATCH 6/9] [OpenACC] Set bias to zero for explicit attach/detach clauses in C and C++

On Thu, 9 Jul 2020 23:06:29 +0200 Thomas Schwinge wrote: > Hi Julian! > > On 2020-06-25T13:36:15+0200, I wrote: > > On 2020-06-16T15:39:42-0700, Julian Brown > > wrote: > >> This is a fix for the pointer (or array) size inadvertently being > >> used for the bias of attach and detach clauses (

[PATCH] x86: Check TARGET_AVX512VL when enabling FMA

On Thu, Jul 9, 2020 at 6:35 AM H.J. Lu wrote: > > On Thu, Jul 9, 2020 at 5:04 AM Kirill Yukhin wrote: > > > > On 07 июл 09:06, H.J. Lu wrote: > > > On Tue, Jul 7, 2020 at 8:56 AM Kirill Yukhin > > > wrote: > > > > > > > > Hello HJ, > > > > > > > > On 28 июн 07:19, H.J. Lu via Gcc-patches wrote:

Re: [PATCH] rs6000: Allow MMA built-in initialization regardless of compiler options

On Thu, Jul 09, 2020 at 04:10:41PM -0500, Peter Bergner wrote: > On 7/9/20 12:11 PM, Segher Boessenkool wrote: > [snip] > > So maybe we should just do all builtins always? > > I think that is the correct thing to do, but I think maybe that > should wait for Bill's rewrite of the built-in generatio

[PATCH] libgomp: Add OMPD Address Space Information functions.

This patch adds Address Space Information function implementations as defined in section 5.5.4 of OpenMP API Specification 5.0. It also defines a struct that stores various information used by OMPD. 2020-07-09 Tony Sim libgomp/ChangeLog: * Makefile.am (libgompd_la_OBJECTS): Add ompd-a

[PATCH 2/2] openacc: Adjust dynamic reference count semantics

This patch adjusts how dynamic reference counts work so that they match the semantics of the source program more closely, instead of representing "excess" reference counts beyond those that represent pointers in the internal libgomp splay-tree data structure. This allows some corner cases to be han

[PATCH 1/2] openacc: Helper functions for enter/exit data using single mapping

This patch factors out the parts of goacc_enter_datum and goacc_exit_datum that can be shared with goacc_enter_data_internal and goacc_exit_data_internal respectively (in the next patch), without overloading function return values or complicating code paths unnecessarily. OK? Thanks, Julian 202

[PATCH 0/2] openacc: Refactor enter/exit data code paths, adjust dynamic refcount semantics

These two patches follow on from: https://gcc.gnu.org/pipermail/gcc-patches/2020-June/548908.html and: https://gcc.gnu.org/pipermail/gcc-patches/2020-June/549178.html The first patch has been rethought somewhat -- we can factor out the common parts of goacc_enter_datum/goacc_enter_data_internal

Re: [PATCH] rs6000: Define movsf_from_si2 to extract high part SF element from DImode[PR89310]

Hi, On 2020/7/10 03:25, Segher Boessenkool wrote: > Hi! > > On Thu, Jul 09, 2020 at 11:09:42AM +0800, luoxhu wrote: >>> Maybe change it back to just SI? It won't match often at all for QI or >>> HI anyway, it seems. Sorry for that detour. Should be good with the >>> above nits fixed :-) >> >>

Re: [PATCH V2] PING^2 correct COUNT and PROB for unrolled loop

Hi Martin, Thanks so much for your time and kindly help!!! Wish Richi, Bin or Honza have time to review this patch. ;-) --Here is a summmary--- PR68212 mentioned that the COUNT of unrolled loop was not correct, and comments of this PR also mentioned that loop become 'cold'. The following pat

[PATCH 1/2] rs6000: Init V4SF vector without converting SP to DP

Move V4SF to V4SI, init vector like V4SI and move to V4SF back. Better instruction sequence could be generated on Power9: lfs + xxpermdi + xvcvdpsp + vmrgew => lwz + (sldi + or) + mtvsrdd With the patch followed, it could be continue optimized to: lwz + rldimi + mtvsrdd The point is to use lwz

[PATCH 2/2] rs6000: Define define_insn_and_split to split unspec sldi+or to rldimi

Combine pass could recognize the pattern defined and split it in split1, this patch could optimize: 21: r130:DI=r133:DI<<0x20 11: {r129:DI=zero_extend(unspec[[r145:DI]] 87);clobber scratch;} 22: r134:DI=r130:DI|r129:DI to 21: {r149:DI=zero_extend(unspec[[r145:DI]] 87);clobber scratch;} 22: r134:

Re: [PATCH 1/2] rs6000: Init V4SF vector without converting SP to DP

Update patch to keep the logic for non TARGET_P8_VECTOR targets. Please ignore the previous [PATCH 1/2], Sorry! Move V4SF to V4SI, init vector like V4SI and move to V4SF back. Better instruction sequence could be generated on Power9: lfs + xxpermdi + xvcvdpsp + vmrgew => lwz + (sldi + or) + mtvs

[committed] wwwdocs: Complete note on -fallow-invalid-boz.

...and move from passive voice to active voice on the way. Pushed. Gerald --- htdocs/gcc-10/changes.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html index 4e5f6139..2b773f1d 100644 --- a/htdocs/gcc-10/changes.html +

Re: [PATCH] middle-end: Call get_constant_section with DECL not EXP.

On Thu, Jul 9, 2020 at 8:29 PM David Edelsohn wrote: > > output_constant_def_contents() can call get_constant_section() with an > EXP that is a CONSTRUCTOR, which is not a declaration. This can hit > asserts in GCC machinery to choose a named section for the initialization > data that expects the