Re: [PATCH] Don't build 32-bit libatomic with -march=i486 on x86-64

On Tue, Apr 19, 2016 at 8:36 PM, H.J. Lu wrote: > On Tue, Apr 19, 2016 at 11:30 AM, Uros Bizjak wrote: >> On Tue, Apr 19, 2016 at 8:24 PM, H.J. Lu wrote: >>> On Tue, Apr 19, 2016 at 11:18 AM, Uros Bizjak wrote: On Tue, Apr 19, 2016 at 8:08 PM, H.J. Lu wrote: > On Tue, Apr 19, 2016 at

Resolve idempotency issue with libgomp's config.h/libgomp.h

Hi! Some time ago, by chance, I had found that libgomp's config.h/libgomp.h produce different results depending in which combination/order they're being included. As I remember, this caused different results in/with the following libgomp.h section: #if !defined (HAVE_ATTRIBUTE_VISIBILITY) \

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Tue, Apr 19, 2016 at 6:32 PM, Wilco Dijkstra wrote: > Richard Biener wrote: >> >> This folding should be added to gimple-fold.c:gimple_fold_builtin instead, >> the builtins.c foldings are purerly for folding to constants nowadays. > > So is this better? It's a lot more verbose for something so

Re: Remove unused openacc call

Hi! On Mon, 9 Nov 2015 16:58:48 -0500, Nathan Sidwell wrote: > I've committed this to trunk. It nuke the now unused GOACC_GET_NUM_THREADS > and > GOACC_GET_THREAD_NUM calls. > * omp-low.c: [...] > (lower_reduction_clauses): Remove BUILT_IN_GOACC_GET_THREAD_NUM call. > * om

Re: [PATCH GCC]Support BIT_AND_EXPR in scalar evolution

On Tue, Apr 19, 2016 at 7:00 PM, Bin Cheng wrote: > Hi, > Type conversion from integer to smaller unsigned type could be transformed > into BIT_AND_EXPR in compilation. For example, > int i; > for (i = 0; i < n; i++) > { > unsigned char uc = (unsigned char) i; // transformed into

[Ada] Undefined symbol with invariant and private type extension

This patch modifies the generation of type invariant procedures to insert the generated spec at the end of the visible declarations and the generated body to the end of the private (higher precedence) or visible declarations. -- Source -- -- p1.ads package P1 is typ

Re: [PATCH] Improve detection of constant conditions during jump threading

On Tue, Apr 19, 2016 at 7:50 PM, Patrick Palka wrote: > This patch makes the jump threader look through the BIT_AND_EXPRs and > BIT_IOR_EXPRs within a condition so that we could find dominating > ASSERT_EXPRs that could help make the overall condition evaluate to a > constant. For example, we cur

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Tue, Apr 19, 2016 at 8:35 PM, Marek Polacek wrote: > While predicate_mem_writes has a check to skip conditions that were evaluated > to true, it's lacking the same check for false, so we hit an assert later on. > So I'm adding is_false_predicate. Maybe it should be added to other spots as > we

[Ada] Legality of aspect Default_Storage_Pool

This patch verifies that when Default_Storage_Pools is specified by means of an aspect, the entity to which it applies is a package or a subprogram. Compiling pck2.ads must yield: pck2.ads:4:11: aspect must apply to package or subprogram --- with GNAT.Debug_Pools; package Pck2 is Pool : GN

[Ada] Spurious error in if_expression with universal then_expression

If the first branch of an if-expression is a literal, remaining expressions can resolve to any integer type (or any real type depending on the literal). Tested in ACATS 4.0J test B457007 Tested on x86_64-pc-linux-gnu, committed on trunk 2016-04-20 Ed Schonberg * sem_res.adb (Resolve_

Re: [PATCH, rs6000] Expand vec_ld and vec_st during parsing to improve performance

On Tue, Apr 19, 2016 at 10:27 PM, Bill Schmidt wrote: > On Tue, 2016-04-19 at 10:09 +0200, Richard Biener wrote: >> On Tue, Apr 19, 2016 at 12:05 AM, Bill Schmidt >> wrote: >> > Hi, >> > >> > Expanding built-ins in the usual way (leaving them as calls until >> > expanding into RTL) restricts the

[Ada] Do not use secondary stack in some cases

The compiler is no longer using the secondary stack in the case of "for ... of" loops over arrays. No small test case is available. Tested on x86_64-pc-linux-gnu, committed on trunk 2016-04-20 Bob Duff * sem_ch5.adb (Analyze_Iterator_Specification): Do not use secondary stack

Re: [PATCH 11/18] add some utility methods to vec

On Wed, Apr 20, 2016 at 8:22 AM, wrote: > From: Trevor Saunders > > Later patches use these functions, and I believe Mikhail has mentioned before > he'd like to have begin / end () on vec before. begin() / end () is fine. But contains ()? That makes using a O(n) algorithm too easy I think (we

[Ada] Wrong resolution of intrinsic in postcondition

This patch ensures that intrinsic operators that act as generic actuals are properly resolved and rewritten in the instance when the context is a fully analyzed and expanded pre/postcondition. Prior to this change the rewriting guard was too restrictive and led to erroneous resolution. ---

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: > On Tue, Apr 19, 2016 at 8:35 PM, Marek Polacek wrote: > > While predicate_mem_writes has a check to skip conditions that were > > evaluated > > to true, it's lacking the same check for false, so we hit an assert later > > on. > >

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Wed, Apr 20, 2016 at 10:45 AM, Richard Biener wrote: > On Tue, Apr 19, 2016 at 6:32 PM, Wilco Dijkstra > wrote: >> Richard Biener wrote: >>> >>> This folding should be added to gimple-fold.c:gimple_fold_builtin instead, >>> the builtins.c foldings are purerly for folding to constants nowadays

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 11:42 AM, Marek Polacek wrote: > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: >> On Tue, Apr 19, 2016 at 8:35 PM, Marek Polacek wrote: >> > While predicate_mem_writes has a check to skip conditions that were >> > evaluated >> > to true, it's lacking the

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 11:47:07AM +0200, Richard Biener wrote: > On Wed, Apr 20, 2016 at 11:42 AM, Marek Polacek wrote: > > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: > >> On Tue, Apr 19, 2016 at 8:35 PM, Marek Polacek wrote: > >> > While predicate_mem_writes has a check to

Re: [PATCH] [AArch64] support -mfentry feature for arm64

On 20/04/16 01:36, AKASHI Takahiro wrote: > On Tue, Apr 19, 2016 at 09:44:37AM +0300, Alexander Monakov wrote: >> On Tue, 19 Apr 2016, AKASHI Takahiro wrote: looking at [2] i don't see why func: mov x9, x30 bl _tracefunc >>> >>> Actually, >>> mov x9, x30 >>>

[Ada] Crash on configuration pragma Check_Policy.

There are two different syntaxes for this pragma, and the analysis of the pragma in the new syntax results in the construction of one or more pragmas in the older form. If the original pragma appears in a configuration file the generated ones must be inserted in the same file because Insert_Actions

[Ada] Better error message for illegal aspect

This patch improves on the error message for an aspect whose expression freezes the entity to which it applies. Compiling BD11002.adb must yield: bd11002.adb:3:02: aspect specification causes premature freezing of "Size" --- procedure BD11002 is Sizer : constant Natural := Integer'Size wit

Re: C++ PATCH to fix a part of c++/70513 (ICE-on-invalid with enums)

Ping. On Fri, Apr 08, 2016 at 01:51:02PM +0200, Marek Polacek wrote: > This is my attempt to fix at least a part of this PR. I haven't been able to > come up with a fix that fixes the other part involving templates. > > We were ICEing on code such as > > struct S > { > enum E : int; > enum

[Ada] Constraint_Error on spurious ambiguity in instance

This match modifies the processing of generics to aid overload resolution of binary and unary operators in instances. This is achieved by installing type conversions in the form of qualified expressions for each operand that yields a universal type. -- Source -- -- px.a

Re: [PATCH GCC]Support BIT_AND_EXPR in scalar evolution

On Wed, Apr 20, 2016 at 9:55 AM, Richard Biener wrote: > On Tue, Apr 19, 2016 at 7:00 PM, Bin Cheng wrote: >> Hi, >> Type conversion from integer to smaller unsigned type could be transformed >> into BIT_AND_EXPR in compilation. For example, >> int i; >> for (i = 0; i < n; i++) >> { >>

Re: Resolve idempotency issue with libgomp's config.h/libgomp.h

On Wed, Apr 20, 2016 at 09:55:35AM +0200, Thomas Schwinge wrote: > diff --git libgomp/config.h.in libgomp/config.h.in > index 226ac53..1ef51ca 100644 > --- libgomp/config.h.in > +++ libgomp/config.h.in > @@ -1,5 +1,11 @@ > /* config.h.in. Generated from configure.ac by autoheader. */ > > + > +

[Ada] Spurious discriminant error on aggregate for derived type

This patch extends the mechanism used to provide discriminants values for an aggregate of a derived type that constrains some parent discriminants and renames others, when the type of the target is unconstrained. No simple test available. Tested on x86_64-pc-linux-gnu, committed on trunk 2016-04

Re: Remove unused openacc call

On Wed, Apr 20, 2016 at 10:46:38AM +0200, Thomas Schwinge wrote: > On Mon, 9 Nov 2015 16:58:48 -0500, Nathan Sidwell wrote: > > I've committed this to trunk. It nuke the now unused > > GOACC_GET_NUM_THREADS and > > GOACC_GET_THREAD_NUM calls. > > > * omp-low.c: [...] > > (lower_reduc

[Ada] Constraint_Error on spurious ambiguity in instance

This patch updates the instantiation machinery to properly preserve a reference to a global type in a qualified expression used to convert a universal literal to a specific type, and propagate it to the instantiated template. -- Source -- -- types.ads package Types is

[Ada] Missing style warning on overlong line is task subunit

This patch restores a warning message on an overlong line in a subunit that is a task body, when compiling the parent unit. Compiling: gcc -c -gnatyM50 par.adb must yield: par-separated_task.adb:6:51: (style) this line is too long --- opackage Par is task type Separated_Task is en

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Wed, Apr 20, 2016 at 11:44:08AM +0200, Richard Biener wrote: > (simplify > (BUILT_IN_STRCHR @0 integer_zerop) > (pointer_plus @0 (BUILT_IN_STRLEN:size_type_node @0))) I still don't like this transformation and would very much prefer to see using rawmemchr instead on targets that provide it, a

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: > > --- gcc/tree-if-conv.c > > +++ gcc/tree-if-conv.c > > @@ -262,6 +262,16 @@ ifc_temp_var (tree type, tree expr, > > gimple_stmt_iterator *gsi) > >return new_name; > > } > > > > +/* Return true when COND is a false predicate.

[Ada] Spurious error on binary operator in instance

This patch updates the mechanism which qualifies universal literals that act as operands of binary or unary operators to avoid the partial qualification of the subtype_mark when the immediate scope of the corresponding actual parameter is a generic unit. No simple reproducer possible. Tested on x8

[Ada] Leak with function returning String in exception handler

This patch modifies the transient scope mechanism to ignore blocks generated for exception handlers with a choice parameter when propagating secondary stack information up the scope stack. Such blocks are not physically present in the tree and can never release the secondary stack on exit. ---

Re: [PATCH GCC]Support BIT_AND_EXPR in scalar evolution

On Wed, Apr 20, 2016 at 12:22 PM, Bin.Cheng wrote: > On Wed, Apr 20, 2016 at 9:55 AM, Richard Biener > wrote: >> On Tue, Apr 19, 2016 at 7:00 PM, Bin Cheng wrote: >>> Hi, >>> Type conversion from integer to smaller unsigned type could be transformed >>> into BIT_AND_EXPR in compilation. For ex

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Wed, Apr 20, 2016 at 12:33 PM, Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 11:44:08AM +0200, Richard Biener wrote: >> (simplify >> (BUILT_IN_STRCHR @0 integer_zerop) >> (pointer_plus @0 (BUILT_IN_STRLEN:size_type_node @0))) > > I still don't like this transformation and would very much pre

[Ada] Illegal use of current instance in attribute reference

The current instance of a type in an aspect specification is an object of the type. If the type is scalar, it cannot be the prefix of an attribute reference such as 'First, whose prefix must an array object (even though it can be a scalar type in other contexts). Compiling foo.adb must yield: foo

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 12:37 PM, Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: >> > --- gcc/tree-if-conv.c >> > +++ gcc/tree-if-conv.c >> > @@ -262,6 +262,16 @@ ifc_temp_var (tree type, tree expr, >> > gimple_stmt_iterator *gsi) >> >return new_name; >

[Ada] Spurious discriminant check on type with unknown discriminants

This patch removes a spurious discriminant check on an generated assignment statement in an iterator loop, when the cursor type is a type with unknown discriminants, when the full view has discriminants with defaults. Executing: gnatmake -f -q -g date_iteration_test.adb date_iteration_test

Re: [PATCH, i386] Relax target requirement for vec_unpacks_lo_hi

Hi Ilya, On 19 Apr 19:09, Ilya Enkovich wrote: > Hi, > > vec_unpacks_lo_[si,hi,di] patterns for scalar masks don't need to extend > mask elements. It means a simple register copy is good enough. > > Currently vec_unpacks_lo_hi pattern uses kmovb instruction which requires > AVX512DQ target. But

Re: [PATCH] Simplify ix86_expand_vector_move_misalign

On Tue, Apr 19, 2016 at 4:48 PM, H.J. Lu wrote: > Since mov_internal patterns handle both aligned/unaligned load > and store, we can simplify ix86_avx256_split_vector_move_misalign and > ix86_expand_vector_move_misalign. > > Tested on x86-64. OK for trunk? > > H.J. > --- > * config/i386/i

Re: [PATCH] Optimize strchr (s, 0) to strlen

Jakub Jelinek wrote: > I still don't like this transformation and would very much prefer to see > using rawmemchr instead on targets that provide it, and also this is > something that IMHO should be done in the tree-ssa-strlen.c pass together > with the other optimizations in there. Similarly to s

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 12:54:12PM +0200, Richard Biener wrote: > On Wed, Apr 20, 2016 at 12:37 PM, Jakub Jelinek wrote: > > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: > >> > --- gcc/tree-if-conv.c > >> > +++ gcc/tree-if-conv.c > >> > @@ -262,6 +262,16 @@ ifc_temp_var (tree ty

Re: [PATCH] Simplify ix86_expand_vector_move_misalign

On Wed, Apr 20, 2016 at 1:09 PM, Uros Bizjak wrote: > On Tue, Apr 19, 2016 at 4:48 PM, H.J. Lu wrote: >> Since mov_internal patterns handle both aligned/unaligned load >> and store, we can simplify ix86_avx256_split_vector_move_misalign and >> ix86_expand_vector_move_misalign. >> >> Tested on x86

Re: [PATCH 02/18] make avail_stores a vec

On Wed, Apr 20, 2016 at 02:22:06AM -0400, tbsaunde+...@tbsaunde.org wrote: > +void > +print_rtx_insn_vec (FILE *file, const vec &vec) > +{ > + fputc('{', file); > + > + unsigned int len = vec.length (); > + for (unsigned int i = 0; i < len; i++) > +{ > + print_rtl (file, vec[i]); > +

libgomp: Make GCC 5 OpenACC offloading executables work (was: Openacc launch API)

Hi! On Mon, 28 Sep 2015 15:38:57 -0400, Nathan Sidwell wrote: > On 09/24/15 04:40, Jakub Jelinek wrote: > > Iff GCC 5 compiled offloaded OpenACC/PTX code will always do host fallback > > anyway because of the incompatible PTX version I do agree that it's reasonable to require users to re-compile

Re: [PATCH 03/18] make antic_stores a vec

On Wed, Apr 20, 2016 at 02:22:07AM -0400, tbsaunde+...@tbsaunde.org wrote: > @@ -163,7 +162,7 @@ st_expr_entry (rtx x) > static void > free_st_expr_entry (struct st_expr * ptr) > { > - free_INSN_LIST_list (& ptr->antic_stores); > + ptr->antic_stores.release (); > ptr->avail_stores.release

Re: [PATCH 05/18] make stores rtx_insn_list a vec

On Wed, Apr 20, 2016 at 02:22:09AM -0400, tbsaunde+...@tbsaunde.org wrote: > 2016-04-19 Trevor Saunders > > * gcse.c (struct ls_expr): make stores field a vector. Capital M. > @@ -3604,7 +3604,7 @@ ldst_entry (rtx x) >ptr->expr = NULL; >ptr->pattern = x; >ptr->p

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 1:19 PM, Marek Polacek wrote: > On Wed, Apr 20, 2016 at 12:54:12PM +0200, Richard Biener wrote: >> On Wed, Apr 20, 2016 at 12:37 PM, Jakub Jelinek wrote: >> > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: >> >> > --- gcc/tree-if-conv.c >> >> > +++ gcc/tre

Re: [PATCH] Optimize strchr (s, 0) to strlen

Richard Biener wrote: > Better - comments below. Jakub objections to the usefulness of the transform > remain - we do have the strlen pass that uses some global knowledge to decide > on profitability. One could argue that for -Os doing the reverse transform is > profitable? In what way would it

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Wed, Apr 20, 2016 at 1:56 PM, Wilco Dijkstra wrote: > Richard Biener wrote: >> Better - comments below. Jakub objections to the usefulness of the transform >> remain - we do have the strlen pass that uses some global knowledge to decide >> on profitability. One could argue that for -Os doing

Re: [PATCH][AArch64] Work around PR target/64971

On 15/04/16 17:27, James Greenhalgh wrote: On Fri, Apr 15, 2016 at 03:12:58PM +0100, Kyrill Tkachov wrote: On 15/04/16 15:10, Kyrill Tkachov wrote: Hi all, This is a repost of Andrew's fix for PR target/64971 that was originally posted at: https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00502.

[PATCH] [ARC] Add new ARCv2 instructions.

This patch adds new instruction variants as introduced by the ARCv2 architecture. OK to apply? Claudiu gcc/ 2016-04-20 Claudiu Zissulescu * config/arc/arc-protos.h (compact_memory_operand_p): Declare. * config/arc/arc.c (arc_output_commutative_cond_exec): Consider bmas

Re: [PATCH 10/18] merge adjust_cost and adjust_cost_2 target hooks

On Wed, Apr 20, 2016 at 02:22:14AM -0400, tbsaunde+...@tbsaunde.org wrote: > * config/microblaze/microblaze.c (microblaze_adjust_cost): > * Likewise. Stray * (here and elsewhere). > --- a/gcc/config/alpha/alpha.c > +++ b/gcc/config/alpha/alpha.c > @@ -4758,14 +4758,15 @@ alpha_split_a

Re: [PATCH 11/18] add some utility methods to vec

On Wed, Apr 20, 2016 at 02:22:15AM -0400, tbsaunde+...@tbsaunde.org wrote: > +template > +inline bool > +vec_safe_contains (vec *v, const T &search) > +{ > + return v? v->contains (search) : false; > +} Missing space. Segher

Re: [PATCH v2] [libatomic] Add RTEMS support

Hello, I know that I am pretty late, but is there a chance to get this into the GCC 6.1 release? On 19/04/16 14:56, Sebastian Huber wrote: v2: Do not use architecture configuration due to broken ARM libatomic support. gcc/ * config/rtems.h (LIB_SPEC): Add -latomic. libatomic/

Re: [PATCH 15/18] make nonlocal_goto_handler_labels a vec

On Wed, Apr 20, 2016 at 02:22:19AM -0400, tbsaunde+...@tbsaunde.org wrote: > --- a/gcc/cfgrtl.c > +++ b/gcc/cfgrtl.c > @@ -157,7 +157,14 @@ delete_insn (rtx uncast_insn) > } > } > > - remove_node_from_insn_list (insn, &nonlocal_goto_handler_labels); > + > + unsigned int

Re: [PING][PATCH] libgcc: Fix typos in comments for ARM FP emulation routines

On Wed, Apr 20, 2016 at 1:44 AM, Sandra Loosemore wrote: > Or, do you need someone to check this in for you because you don't have > write access to the repository? Hi! Yeah, I don't have write access. If you could commit this for me it would be great. Thanks!

Re: [PATCH 16/18] make forced labels a vec

On Wed, Apr 20, 2016 at 02:22:20AM -0400, tbsaunde+...@tbsaunde.org wrote: > * function.h (struct expr_status): make x_forced_labels a vector. Capital M. > --- a/gcc/cfgrtl.c > +++ b/gcc/cfgrtl.c > @@ -115,7 +115,8 @@ can_delete_label_p (const rtx_code_label *label) >return (!LABEL_PRES

[PATCH] Fix GENERICizing of BIT_FIELD_REF

This fixes a latent issue in maybe_build_generic_op. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-04-20 Richard Biener * gimple-match.h (maybe_build_generic_op): Adjust prototype. * gimple-match-head.c (maybe_build_generic_op): Pass all ops

Re: [PATCH 17/18] make pending_{read,write}_insns vec

On Wed, Apr 20, 2016 at 02:22:21AM -0400, tbsaunde+...@tbsaunde.org wrote: > (add_insn_mem_dependence): Likewise. Likewise. Likewise! > @@ -1614,22 +1644,22 @@ remove_from_dependence_list (rtx_insn *insn, > rtx_insn_list **listp) > /* Same as above, but process two lists at once. */ > s

Re: [PATCH 18/18] make last_pending_memory_flush a vec

On Wed, Apr 20, 2016 at 02:22:22AM -0400, tbsaunde+...@tbsaunde.org wrote: > --- a/gcc/sched-rgn.c > +++ b/gcc/sched-rgn.c > @@ -2620,12 +2620,8 @@ deps_join (struct deps_desc *succ_deps, struct > deps_desc *pred_deps) >concat_mem_list (pred_deps->pending_write_mems, > &succ_d

[committed, PATCH] Replace -skip-rax-setup with -mskip-rax-setup

This fixed a typo. Checked into trunk. H.J. --- Index: gcc/ChangeLog === --- gcc/ChangeLog (revision 235274) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,7 @@ +2016-04-20 H.J. Lu + + * doc/invoke.texi: Replace -sk

Re: [PATCH] Optimize strchr (s, 0) to strlen

On Wed, Apr 20, 2016 at 11:17:06AM +, Wilco Dijkstra wrote: > Can you quantify "don't like"? I benchmarked rawmemchr on a few targets > and it's slower than strlen, so it's hard to guess what you don't like about > it. This is the same stuff as has been discussed for mempcpy, rawmemchr is the

Re: [PATCH 00/18] towards removing rtx_insn_list and rtx_expr_list

tbsaunde+...@tbsaunde.org writes: > I have some more patches that almost completely eliminate these, but I haven't > tested the rest yet, and this is already a long series so it would be nice to > get some of it out of my tree and reviewed. > > patches individually bootstrapped and regtested on x8

Re: [PATCH][AArch64] Work around PR target/64971

On Wed, 20 Apr 2016, Kyrill Tkachov wrote: > > On 15/04/16 17:27, James Greenhalgh wrote: > > On Fri, Apr 15, 2016 at 03:12:58PM +0100, Kyrill Tkachov wrote: > > > On 15/04/16 15:10, Kyrill Tkachov wrote: > > > > Hi all, > > > > > > > > This is a repost of Andrew's fix for PR target/64971 that w

Re: [PATCH] Simplify ix86_expand_vector_move_misalign

On Wed, Apr 20, 2016 at 4:19 AM, Uros Bizjak wrote: > On Wed, Apr 20, 2016 at 1:09 PM, Uros Bizjak wrote: >> On Tue, Apr 19, 2016 at 4:48 PM, H.J. Lu wrote: >>> Since mov_internal patterns handle both aligned/unaligned load >>> and store, we can simplify ix86_avx256_split_vector_move_misalign an

[PATCH] x86 interrupt attribute patch [2/2]

Hi, Here is the new version of interrupt attribute patch. Bootstraped/regtested for Linux/x86_64. Ok for trunk? The interrupt and exception handlers are called by x86 processors. X86 hardware pushes information onto stack and calls the handler. The requirements are 1. Both interrupt and ex

RE: [PATCH] x86 interrupt attribute patch [1/2]

Sorry, here is the right patch. -Original Message- From: Koval, Julia Sent: Wednesday, April 20, 2016 4:42 PM To: 'gcc-patches@gcc.gnu.org' Cc: Lu, Hongjiu ; 'vaalfr...@gmail.com' ; 'ubiz...@gmail.com' ; 'l...@redhat.com' ; Zamyatin, Igor Subject: [PATCH] x86 interrupt attribute patch

Re: [PATCH, rs6000] Expand vec_ld and vec_st during parsing to improve performance

On Tue, 2016-04-19 at 08:10 -0500, Bill Schmidt wrote: > On Tue, 2016-04-19 at 10:09 +0200, Richard Biener wrote: > > > > x86 nowadays has intrinsics implemented as inlines - they come from > > header files. It seems for ppc the intrinsics are somehow magically > > there, w/o a header file? > >

Re: [PATCH] Fix missed DSE opportunity with operator delete.

On Tue, Apr 19, 2016 at 10:48 PM, Mikhail Maltsev wrote: > On 04/18/2016 12:14 PM, Richard Biener wrote: >> >> Enlarging tree_function_decl is bad. > Probably using 3 bits for malloc_flag, operator_new_flag and free_flag is > redundant. I packed the state into 2 bits. >> >> Passes should get at th

Re: [PATCH] Optimize strchr (s, 0) to strlen

Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 11:17:06AM +, Wilco Dijkstra wrote: >> Can you quantify "don't like"? I benchmarked rawmemchr on a few targets >> and it's slower than strlen, so it's hard to guess what you don't like about >> it. > > This is the same stuff as has been discussed

[PATCH, i386]: Use explicit mode iterators in LEA splitters

Substantial cleanups without functional changes. 2016-04-20 Uros Bizjak * config/i386/i386.md (*lea_general_1): Rename from *lea_general_1. Use explicit SWI12 mode interator. (*lea_general_2): Rename from *lea_general_2. Use explicit SWI12 mode interator. (*lea_general_3):

Re: [PATCH] Don't build 32-bit libgomp with -march=i486 on x86-64

On Tue, Apr 19, 2016 at 8:08 AM, H.J. Lu wrote: > Gcc uses the same -march= for both -m32 and -m64 on x86-64 unless > --with-arch-32= is used. There is no need for -march=i486 to compile > 32-bit libgomp on x86-64. > > Tested on x86-64. OK for trunk? > > H.J. > --- > PR target/70454 >

Re: [PATCH] Don't build 32-bit libitm with -march=i486 on x86-64

On Tue, Apr 19, 2016 at 8:08 AM, H.J. Lu wrote: > Gcc uses the same -march= for both -m32 and -m64 on x86-64 unless > --with-arch-32= is used. There is no need for -march=i486 to compile > 32-bit libitm on x86-64. > > Tested on x86-64. OK for trunk? > > > H.J. > --- > PR target/70454 >

Re: [PATCH] Don't build 32-bit libatomic with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 12:02 AM, Uros Bizjak wrote: >> >> That is why I submitted my patches. Since -m32 passes -march=x86-64 >> to cc1 on x86-64, we shouldn't pass -march=i486 to cc1. It is undesirable >> especially when --with-arch= is used. I noticed the issue when 32-bit >> libatomic/libg

Re: [PATCH] Don't build 32-bit libgomp with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 07:43:27AM -0700, H.J. Lu wrote: > From 12c6ddcf67593ed7137764ca74043f1a9c2d8fda Mon Sep 17 00:00:00 2001 > From: "H.J. Lu" > Date: Wed, 30 Mar 2016 05:56:08 -0700 > Subject: [PATCH 2/3] Don't build 32-bit libgomp with -march=i486 on x86-64 > > Gcc uses the same -march= fo

Re: [PATCH] Don't build 32-bit libatomic with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 7:54 AM, Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 07:45:44AM -0700, H.J. Lu wrote: >> On Wed, Apr 20, 2016 at 12:02 AM, Uros Bizjak wrote: >> >> >> >> That is why I submitted my patches. Since -m32 passes -march=x86-64 >> >> to cc1 on x86-64, we shouldn't pass -mar

Re: [PATCH] Don't build 32-bit libgomp with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 7:53 AM, Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 07:43:27AM -0700, H.J. Lu wrote: >> From 12c6ddcf67593ed7137764ca74043f1a9c2d8fda Mon Sep 17 00:00:00 2001 >> From: "H.J. Lu" >> Date: Wed, 30 Mar 2016 05:56:08 -0700 >> Subject: [PATCH 2/3] Don't build 32-bit libgomp

Re: [PATCH] Don't build 32-bit libatomic with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 07:45:44AM -0700, H.J. Lu wrote: > On Wed, Apr 20, 2016 at 12:02 AM, Uros Bizjak wrote: > >> > >> That is why I submitted my patches. Since -m32 passes -march=x86-64 > >> to cc1 on x86-64, we shouldn't pass -march=i486 to cc1. It is undesirable > >> especially when --wit

[PATCH PR70715]Expand simple operations in IV.base and check if it's the control_IV

Hi, As reported in PR70715, GCC failed to prove no-overflows of IV(&p[n]) for simple example like: int foo (char *p, unsigned n) { while(n--) { p[n]='A'; } return 0; } Actually, code has already been added to handle this form loops when fixing PR68529. Problem with this case is

Re: [PATCH] Don't build 32-bit libgomp with -march=i486 on x86-64

On Wed, Apr 20, 2016 at 7:53 AM, Jakub Jelinek wrote: > On Wed, Apr 20, 2016 at 07:43:27AM -0700, H.J. Lu wrote: >> From 12c6ddcf67593ed7137764ca74043f1a9c2d8fda Mon Sep 17 00:00:00 2001 >> From: "H.J. Lu" >> Date: Wed, 30 Mar 2016 05:56:08 -0700 >> Subject: [PATCH 2/3] Don't build 32-bit libgomp

Re: C++ PATCH to fix a part of c++/70513 (ICE-on-invalid with enums)

On 04/08/2016 07:51 AM, Marek Polacek wrote: This is my attempt to fix at least a part of this PR. I haven't been able to come up with a fix that fixes the other part involving templates. We were ICEing on code such as struct S { enum E : int; enum S::E : int { foo } e; }; Clang rejects

[PATCHES] Update avx256-unaligned-load-1.c and avx256-unaligned-store-2.c

On Wed, Apr 20, 2016 at 4:19 AM, Uros Bizjak wrote: > BTW: There are a couple of regressions in the testsuite [1] when > configured --with-arch=corei7. Can you please look at the testcases, > if scan patterns need to be adjusted? They are caused by -mtune=slm. > FAIL: gcc.target/i386/avx256-una

Re: [PING][PATCH] libgcc: Fix typos in comments for ARM FP emulation routines

On 04/20/2016 06:38 AM, Martin Galvan wrote: On Wed, Apr 20, 2016 at 1:44 AM, Sandra Loosemore wrote: Or, do you need someone to check this in for you because you don't have write access to the repository? Hi! Yeah, I don't have write access. If you could commit this for me it would be great.

Re: [PATCH][CilkPlus] Fix PR69363

On Wed, Feb 17, 2016 at 15:46:00 +0100, Jakub Jelinek wrote: > On Wed, Feb 17, 2016 at 05:32:58PM +0300, Ilya Verbin wrote: > > This patch fixes > > Bootstrap and make check passed. OK for... stage 1? > > Ok for stage1, with a few nits. Commit

Re: [PATCH PR69489/02]Handle PHI which can be degenerated to two arguments node in tree ifcvt.

On Tue, Mar 22, 2016 at 10:41 AM, Richard Biener wrote: > On Mon, Mar 21, 2016 at 4:22 PM, Bin Cheng wrote: >> Hi, >> The second issue revealed by PR69489 is tree ifcvt could not convert PHI >> nodes with more than 2 arguments. Among these nodes, there is a special >> kind of PHI which can be

Re: [PATCH] [AArch64] support -mfentry feature for arm64

On 20/04/16 02:25, AKASHI Takahiro wrote: > On Tue, Apr 19, 2016 at 09:39:39AM +0300, Alexander Monakov wrote: >> On Tue, 19 Apr 2016, AKASHI Takahiro wrote: > But if Szabolcs' two-instruction > sequence in the adjacent subthread is sufficient, this is moot. . It can also be sol

OpenMP offloading to NVPTX: backend patches

Hello! In responses to this email, I'll be posting 9 NVPTX-specific patches that are required for enabling OpenMP offloading. I intend to post corresponding libgomp and middle-end changes that make these useful a bit later. The patches are generated by taking a diff on amonakov/gomp-nvptx git br

[PATCH] new patterns for OpenMP SIMD-via-SIMT

This patch adds a few insn patterns used for OpenMP SIMD reduction/lastprivate/ordered lowering for SIMT execution. OpenMP lowering produces GOMP_SIMT_... internal functions when lowering SIMD constructs that can be offloaded to a SIMT device. After lto stream-in, those internal functions are tri

[PATCH] new target hook: TARGET_SIMT_VF

This patch adds a new target hook and implements it in a straightforward manner on NVPTX to indicate that the target is running in SIMT fashion with 32 threads in a synchronous group ("warp"). For use in OpenMP transforms. Previously posted here: [gomp-nvptx 5/9] new target hook: TARGET_SIMT_VF

[PATCH] add support for placing variables in shared memory

Allow using __attribute__((shared)) to place static variables in '.shared' memory space. Previously posted here: [gomp-nvptx 04/13] nvptx backend: add support for placing variables in shared memory https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01546.html [gomp-nvptx] doc: document nvptx shared

[PATCH] nvptx per-warp compiler-defined stacks (-msoft-stack)

This patch implements per-warp compiler-defined stacks under -msoft-stack option, and implements alloca on top of that. In a few obvious places, changes from -muniform-simt patch are present in the hunks. Previously posted here: [PATCH] nvptx: implement automatic storage in custom stacks https:/

[PATCH] nvptx -muniform-simt codegen variant

This patch implements a code generation variant needed for OpenMP, where all lanes in each warp can be kept active outside of SIMD regions, with observable execution effects as if only one lane was active, and local state (program counter and registers) synchronized among lanes, under -muniform-sim

[PATCH] nvptx -mgomp multilib

Wire up -mgomp multilib for OpenMP offloading, in a straightforward way. Changes in nvptx.opt and invoke.texi adding -msoft-stack and -muniform-simt are originally from the patches that introduced those. Doc additions in invoke.texi will probably change; I've asked Sandra Loosemore to have a look

[PATCH] nvptx omp target entrypoint handling

This patch adds OpenMP-specific kernel entry code emission. There's a corresponding omp-low.c patch that makes OpenACC use "omp acc target entrypoint" to disambiguate OpenACC and OpenMP target regions. 2015-12-09 Alexander Monakov * config/nvptx/nvptx.c (nvptx_record_offload_symbol):

[PATCH] nvptx mkoffload changes

Handle OpenMP offloading in NVPTX mkoffload. Previously posted here: [gomp-nvptx 7/9] nvptx mkoffload: pass -mgomp for OpenMP offloading https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00121.html 2015-12-09 Alexander Monakov * config/nvptx/mkoffload.c (main): Check that either OpenACC

[PATCH] nvptx libgcc changes

Rewrite libgcc/config/nvptx from PTX assembly to C, to allow building it for -mgomp multilib. Previously posted here: [gomp-nvptx 6/9] nvptx libgcc: rewrite in C https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00120.html [gomp-nvptx 2/7] nvptx libgcc: use attribute shared https://gcc.gnu.org/ml/gc

Re: [patch] libstdc++/69703 ignore endianness in codecvt_utf8

On 19/04/16 19:07 +0100, Jonathan Wakely wrote: This was reported as a bug in the Filesystem library, but it's actually a problem in the codecvt_utf8 facet that it uses. The fix had a silly typo meaning it didn't work for big endian targets, which was revealed by the improved tests I added. Te

match.pd patch: max(int_min, x)->x

Hello, this simple transformation is currently done in RTL, sometimes also in VRP if we have any kind of range information (even on the wrong side, but not with VR_VARYING). It seems more natural to complete the match.pd pattern than make VRP understand this case. Bootstrap+regtest on powerp

Re: [PATCH] Fix ICE in predicate_mem_writes (PR tree-optimization/70725)

On Wed, Apr 20, 2016 at 4:19 AM, Marek Polacek wrote: > On Wed, Apr 20, 2016 at 12:54:12PM +0200, Richard Biener wrote: >> On Wed, Apr 20, 2016 at 12:37 PM, Jakub Jelinek wrote: >> > On Wed, Apr 20, 2016 at 11:04:08AM +0200, Richard Biener wrote: >> >> > --- gcc/tree-if-conv.c >> >> > +++ gcc/tre

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