On Wed, Apr 20, 2016 at 4:19 AM, Uros Bizjak <ubiz...@gmail.com> wrote:
> BTW: There are a couple of regressions in the testsuite [1] when
> configured --with-arch=corei7. Can you please look at the testcases,
> if scan patterns need to be adjusted?
They are caused by -mtune=slm.
> FAIL: gcc.target/i386/avx256-unaligned-load-1.c scan-assembler-not
> (avx_loadups256|vmovups[^\\n\\r]*movv8sf_internal)
It is because avx_loadups256 and sse_loadups have been replaced by
movv8sf_internal and movv4sf_internal. -mtune=slm disables SSE
SSE stores.
> FAIL: gcc.target/i386/avx256-unaligned-store-2.c scan-assembler
> vmovups.*movv16qi_internal/3
It is because -mtune=slm disables SSE stores which is expected
by avx256-unaligned-store-2.c.
Here are 2 patches for them. Tested on x86-64. OK for trunk?
--
H.J.
From be7034d5b3f1b261058fbb7359822088efece1e9 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.to...@gmail.com>
Date: Wed, 20 Apr 2016 08:22:00 -0700
Subject: [PATCH 1/2] Update load scan avx256-unaligned-load-1.c
Since avx_loadups256 and sse_loadups have been replaced by movv8sf_internal
and movv4sf_internal, respectively, we need to scan movv8sf_internal and
movv4sf_internal for load.
* gcc.target/i386/avx256-unaligned-load-1.c: Update load scan.
---
gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
index 0c476cd..68378a5 100644
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
@@ -14,6 +14,6 @@ avx_test (void)
c[i] = a[i] * b[i+3];
}
-/* { dg-final { scan-assembler-not "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
-/* { dg-final { scan-assembler "(sse_loadups|movv4sf_internal)" } } */
+/* { dg-final { scan-assembler-not "vmovups\[^\n\r]*movv8sf_internal/2" } } */
+/* { dg-final { scan-assembler "movv4sf_internal/2" } } */
/* { dg-final { scan-assembler "vinsertf128" } } */
--
2.5.5
From 80a55496112abd43ff2076152ec9662e2709bedd Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.to...@gmail.com>
Date: Wed, 20 Apr 2016 08:24:43 -0700
Subject: [PATCH 2/2] Add -mtune-ctrl=sse_typeless_stores to
avx256-unaligned-store-2.c
Since avx256-unaligned-store-2.c scans typeless SSE stores, add
-mtune-ctrl=sse_typeless_stores to enable typeless SSE stores.
* gcc.target/i386/avx256-unaligned-store-2.c: Add
-mtune-ctrl=sse_typeless_stores.
---
gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
index 817be17..87285c6 100644
--- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store -mno-prefer-avx128" } */
+/* { dg-options "-O3 -mtune-ctrl=sse_typeless_stores -dp -mavx -mavx256-split-unaligned-store -mno-prefer-avx128" } */
#define N 1024
--
2.5.5
