> Given the ill-formed nature of __builtin_unreachable, I think the
> sensible thing is to require BARRIERs to match as well. If we don't,
> then we could consider paths which differ only in the existence of a
> BARRIER. If we cross jump them, then we either lose the
> BARRIER/__builtin_unreachab
Hi,
Here is the last patch of the fmin/fmax change, which adds the optabs
to the arm backend.
Tested:
arm-none-eabi: no regressions
Good to go?
David Sherwood.
ChangeLog:
2015-12-08 David Sherwood
gcc/
* config/arm/iterators.md: New iterators.
* config/arm/unspecs.md:
On 12/11/2015 09:25 PM, Jason Merrill wrote:
Hmm, can we generate the DWARF procedures during finalize_size_functions
to avoid the need for preserve_body?
Good idea, thank you! Here’s the updated patch (bootstrapped and
regtested on x86_64-linux, as usual).
--
Pierre-Marie de Rodat
>From 385
During reorg pass, thumb1_reorg () is tasked with rewriting mov rd, rn to subs
rd, rn, 0 to avoid a comparison against 0 instruction before doing a
conditional branch based on it. The actual avoiding of cmp is done in
cbranchsi4_insn instruction C output template. When the condition is met, the
On Thu, Dec 10, 2015 at 08:30:37AM +0100, Jan Hubicka wrote:
> * ipa-cp.c (ipcp_cloning_candidate_p): Use node->optimize_for_size_p.
> (good_cloning_opportunity_p): Likewise.
> (gather_context_independent_values): Do not return true when
> polymorphic call context is known o
Hi David,
On 16/12/15 08:53, David Sherwood wrote:
Hi,
Here is the last patch of the fmin/fmax change, which adds the optabs
to the arm backend.
Tested:
arm-none-eabi: no regressions
Good to go?
David Sherwood.
ChangeLog:
2015-12-08 David Sherwood
gcc/
* config/arm/iterat
On Tue, Dec 15, 2015 at 11:35:45AM +, Wilco Dijkstra wrote:
>
> Add support for vector permute cost since various permutes can expand into a
> complex
> sequence of instructions. This fixes major performance regressions due to
> recent changes
> in the SLP vectorizer (which now vectorizes m
On Mon, Dec 14, 2015 at 10:48 PM, Sebastian Pop wrote:
> we now check the isl version, as there are no real differences in existing
> files
> in between isl 0.14 and isl 0.15.
Looks good to me.
Richard.
> ---
> config/isl.m4| 29 +++
> configure
On Tue, Dec 15, 2015 at 5:14 PM, Bernd Schmidt wrote:
> On 12/15/2015 04:09 PM, Christian Bruel wrote:
>>
>> in "normal" mode, the TYPE_MODE for vector_type __simd64_int8_t is set
>> to V8QImode by arm_vector_mode_supported_p during the builtins type
>> initializations, thanks to TARGET_NEON set b
On Tue, Dec 15, 2015 at 10:54:49AM +, Wilco Dijkstra wrote:
> ping
>
> > -Original Message-
> > From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> > Sent: 06 November 2015 20:06
> > To: 'gcc-patches@gcc.gnu.org'
> > Subject: [PATCH][AArch64] Add TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLA
On Wed, Dec 16, 2015 at 8:43 AM, Ajit Kumar Agarwal
wrote:
> Hello Jeff:
>
> Here is more of a data you have asked for.
>
> SPEC FP benchmarks.
> a) No Path Splitting + tracer enabled
> Geomean Score = 4749.726.
> b) Path Splitting enabled + tracer enabled.
> Geomean Score = 4781.655.
>
On Wed, Dec 16, 2015 at 10:15 AM, Dominik Vogt wrote:
> On Thu, Dec 10, 2015 at 08:30:37AM +0100, Jan Hubicka wrote:
>> * ipa-cp.c (ipcp_cloning_candidate_p): Use node->optimize_for_size_p.
>> (good_cloning_opportunity_p): Likewise.
>> (gather_context_independent_values): Do not
Hi Ramana,
On 15/12/15 21:20, Ramana Radhakrishnan wrote:
On 07/12/15 10:39, Kyrill Tkachov wrote:
Hi all,
In this PR we ICE because during post-reload splitting we generate the insn:
(insn 27 26 11 2 (set (reg:SI 0 r0 [orig:121 D.4992 ] [121])
(and:SI (not:SI (const_int 1 [0x1]))
On Wed, Dec 16, 2015 at 10:32 AM, James Greenhalgh
wrote:
> On Tue, Dec 15, 2015 at 11:35:45AM +, Wilco Dijkstra wrote:
>>
>> Add support for vector permute cost since various permutes can expand into a
>> complex
>> sequence of instructions. This fixes major performance regressions due to
On Wed, Dec 16, 2015 at 10:59:10AM +0100, Richard Biener wrote:
> > What can I do to help fixing this?
>
> Same on x86_64 btw. If there isn't a bugreport already please open
> one to track this issue.
PR68860 covers this already and it has been discussed on this ml too
already.
Jakub
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On
Behalf Of Richard Biener
Sent: Wednesday, December 16, 2015 3:27 PM
To: Ajit Kumar Agarwal
Cc: Jeff Law; GCC Patches; Vinod Kathail; Shail Aditya Gupta; Vidhumouli
Hunsigida; Nagaraju Mekala
On Wed, Dec 16, 2015 at 10:59:10AM +0100, Richard Biener wrote:
> Same on x86_64 btw. If there isn't a bugreport already please open
> one to track this issue.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68935
Ciao
Dominik ^_^ ^_^
--
Dominik Vogt
IBM Germany
Hi,
while looking into a few small issues I noticed that we could use C++
defaults here too. Tested x86_64-linux.
Thanks,
Paolo.
///
Index: cp-tree.h
===
--- cp-tree.h (revision 231672)
+++ cp-tree.h (working
On Tue, 2015-12-15 10:43:58 -0700, Jeff Law wrote:
> On 12/14/2015 01:07 PM, Jan-Benedict Glaw wrote:
> >On Mon, 2015-12-14 18:54:28 +, Moore, Catherine
> > wrote:
> >>>avr-rtems
> >>>http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=478544
> >>>mipsel-elf
> >>
On Tue, Dec 15, 2015 at 09:11:38PM -0500, David Malcolm wrote:
> In the C frontend,
> c_parser_postfix_expression
> after parsing a primary expression passes "loc", the location of the
> *first token* in that expression to
> c_parser_postfix_expression_after_primary,
> which thus discards any r
On 10/12/15 11:02, Ramana Radhakrishnan wrote:
On Thu, Dec 10, 2015 at 10:43 AM, Ramana Radhakrishnan
wrote:
On Mon, Dec 7, 2015 at 4:04 PM, Matthew Wahab
wrote:
Ping. Updated patch attached.
Matthew
On 26/11/15 15:55, Matthew Wahab wrote:
Hello,
ARMv8.1 includes an extension to ARM whi
On 15/12/15 23:34, Evandro Menezes wrote:
> On 12/14/2015 05:26 AM, James Greenhalgh wrote:
>> On Thu, Dec 03, 2015 at 03:07:43PM -0600, Evandro Menezes wrote:
>>> On 11/20/2015 05:53 AM, James Greenhalgh wrote:
On Thu, Nov 19, 2015 at 04:04:41PM -0600, Evandro Menezes wrote:
> On 11/05/20
>>
>> I couldn't find 0/7 but in addition here you need to update the output
>> for TAG_FP_SIMD_Arch to be 4.
>>
>> regards
>> Ramana
>
> After discussing this offline, it turns out that the relevant attribute
> (Tag_Advanced_SIMD_arch) is set by the assembler.
Yep - sorry about the noise.
The
Richard Biener wrote:
> On Wed, Dec 16, 2015 at 10:32 AM, James Greenhalgh
> wrote:
> > On Tue, Dec 15, 2015 at 11:35:45AM +, Wilco Dijkstra wrote:
> >>
> >> Add support for vector permute cost since various permutes can expand into
> >> a complex
> >> sequence of instructions. This fixes ma
The estimate on target_clobbered_registers based on the call_used arrays is not
correct. This is the worst case
heuristics on the estimate on target_clobbered_registers. This disables many of
the loop Invariant code motion
opportunities in presence of call. Instead of considering the spill cos
Currently, the documentation for --with-multilib-list in gcc/doc/install.texi
only mentions sh*-*-* and x86-64-*-linux* targets. However, arm*-*-* targets
also support this option. This patch adds documention for the meaning of this
option for arm*-*-* targets.
ChangeLog entry is as follows:
Currently in config.gcc, only the first multilib in a multilib list is checked
for validity and the following elements are ignored due to the break which only
breaks out of loop in shell. A loop is also done over the multilib list
elements despite no combination being legal. This patch rework th
Hi Ramana,
As suggested in your initial answer to this thread, we updated the multilib
patch provided in ARM's embedded branch to be up-to-date with regards to
supported CPUs in GCC. As to the need to modify Makefile.in and configure.ac,
this is because the patch aims to let control to the user
Testisms, the easiest thing is to require vect_perm.
Tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-12-16 Richard Biener
PR testsuite/68916
PR testsuite/68914
* gcc.dg/vect/pr45752.c: Require vect_perm and adjust expected
dump.
* gcc.dg/ve
Hi All,
Here is simple patch which cures the issue with outer-loop unswitching
- added invocation of number_of_latch_executions() to reject
unswitching for non-iterated loops.
Bootstrapping and regression testing did not show any new failures.
Is it OK for trunk?
ChangeLog:
2014-12-16 Yuri Rum
On 12/15/2015 05:21 PM, Kyrill Tkachov wrote:
Then for the shift pattern in the MD file we'd have to dynamically
select the scheduling type depending on whether or not the shift
amount is 1 and the costs line up?
Yes. This isn't unusual, take a look at i386.md where you have a lot of
switches
On 12/14/2015 03:31 PM, Dhole wrote:
The copyright assignment process is now complete :)
Let me know if I'm required to do anything else regarding the patch I sent.
Right now we're in a bug fixing stage; please wait until stage 1 reopens
and then resend your patch.
Bernd
Hi!
On Mon, 14 Dec 2015 19:47:36 +0300, Ilya Verbin wrote:
> On Fri, Dec 11, 2015 at 18:27:13 +0100, Jakub Jelinek wrote:
> > On Tue, Dec 08, 2015 at 05:45:59PM +0300, Ilya Verbin wrote:
> > > +/* This function finalizes all initialized devices. */
> > > +
> > > +static void
> > > +gomp_target_f
The following will hopefully resolve PR68915
tested on x86_64-linux, applied.
Richard.
2015-12-16 Richard Biener
PR testsuite/68915
* gcc.dg/vect/pr46032.c: Use dg-additional-options.
Index: gcc/testsuite/gcc.dg/vect/pr46032.c
===
On Wed, Dec 16, 2015 at 12:24 PM, Richard Earnshaw (lists)
wrote:
> On 15/12/15 23:34, Evandro Menezes wrote:
>> On 12/14/2015 05:26 AM, James Greenhalgh wrote:
>>> On Thu, Dec 03, 2015 at 03:07:43PM -0600, Evandro Menezes wrote:
On 11/20/2015 05:53 AM, James Greenhalgh wrote:
> On Thu, N
The attached patch fixes the handling of LABEL_REF in genrecog and
genpreds.
The current code assumes that X can have only a mode than PRED (X,
MODE) if X is CONST_INT, CONST_DOUBLE or CONST_WIDE_INT, but
actually that can be also the case for a LABEL_REF with VOIDmode.
Due to this it is necessary
On 12/16/2015 12:54 PM, Ajit Kumar Agarwal wrote:
The estimate on target_clobbered_registers based on the call_used arrays is not
correct. This is the worst case
heuristics on the estimate on target_clobbered_registers. This disables many of
the loop Invariant code motion
opportunities in pres
Dominik Vogt wrote:
> On Mon, Dec 14, 2015 at 04:08:32PM +0100, Ulrich Weigand wrote:
> > I don't think that r1 is actually safe here. Note that it may be used
> > (unconditionally) as temp register in s390_emit_prologue in certain cases;
> > the upcoming split-stack code will also need to use r1
On Wed, Dec 16, 2015 at 1:14 PM, Yuri Rumyantsev wrote:
> Hi All,
>
> Here is simple patch which cures the issue with outer-loop unswitching
> - added invocation of number_of_latch_executions() to reject
> unswitching for non-iterated loops.
>
> Bootstrapping and regression testing did not show an
James Greenhalgh wrote:
> On Tue, Dec 15, 2015 at 10:54:49AM +, Wilco Dijkstra wrote:
> > ping
> >
> > > -Original Message-
> > > From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> > > Sent: 06 November 2015 20:06
> > > To: 'gcc-patches@gcc.gnu.org'
> > > Subject: [PATCH][AArch64] A
On Mon, 14 Dec 2015, Tom de Vries wrote:
> On 14/12/15 14:26, Richard Biener wrote:
> > On Sun, 13 Dec 2015, Tom de Vries wrote:
> >
> > > On 11/12/15 14:00, Richard Biener wrote:
> > > > On Fri, 11 Dec 2015, Tom de Vries wrote:
> > > >
> > > > > On 13/11/15 12:39, Jakub Jelinek wrote:
> > > > >
On 12/16/2015 12:54 PM, Ajit Kumar Agarwal wrote:
/* If there is a call in the loop body, the call-clobbered registers
are not available for loop invariants. */
+
if (call_p)
available_regs = available_regs - target_clobbered_regs;
-
+
/* If we have enough registers, we
On Thu, Dec 10, 2015 at 1:27 AM, Kugan
wrote:
> Hi Riachard,
>
> Thanks for the reviews.
>
> I think since we have some unresolved issues here, it is best to aim for
> the next stage1. I however would like any feedback so that I can
> continue to improve this.
Yeah, sorry I've been distracted lat
Hi,
Attached is the patch to add OpenACC documentation for libgomp.
Ok to commit to trunk?
Thanks!
Jim
Index: libgomp.texi
===
--- libgomp.texi (revision 231662)
+++ libgomp.texi (working copy)
@@ -94,10 +94,25 @@
@comment better
On Fri, Dec 11, 2015 at 3:03 PM, Yuri Rumyantsev wrote:
> Richard.
> Thanks for your review.
> I re-designed fix for assert by adding additional checks for vector
> comparison with boolean result to fold_binary_op_with_conditional_arg
> and remove early exit to combine_cond_expr_cond.
> Unfortunat
The following fixes the SLP miscompile in PR68861 which happens because
we didn't think of stmts appering multiple times in a SLP node when
doing the operand swapping support.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2015-12-16 Richard Biener
P
Hi,
This is an update of my previous patch. Cesar (thanks!)
pointed out some issues with the original patch that
have now been addressed.
Regtested on x86_64
OK for trunk?
Thanks!
Jim
diff --git a/gcc/fortran/openmp.c b/gcc/fortran/openmp.c
index 276f2f1..9350dc4 100644
--- a/gcc/fortran/ope
On Tue, Dec 15, 2015 at 12:06 AM, Steve Ellcey wrote:
> On Mon, 2015-12-14 at 09:57 +0100, Richard Biener wrote:
>
>> I don't know enough to assess the effect of this but
>>
>> 1) not all archs can do auto-incdec so either the comment is misleading
>> or the test should probably be amended
>> 2)
Hello,
ix86_target_macros_internal () contains duplicated check of `clzero'
option.
I've committed to main trunk as obvious patch in the bottom.
gcc/
* config/i386/i386-c.c (ix86_target_macros_internal): Remove
duplicate check (__CLZERO__).
--
Thanks, K
Index: gcc/config/i386/i38
On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> Dominik Vogt wrote:
> > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > cases
> > > where one of those is unused but r5 isn't, however. ]
> >
> > This can happen if the function only uses register pai
PTX's machine_function structure squirrels away the function type to calculate
the presence of varadic args later, rather than calculate it immediately. It
also uses an rtx field as a boolean. This patch reorganizes it with less
verbose names and more apt types.
I also noticed that nvptx_h
Dominik Vogt wrote:
> On Wed, Dec 16, 2015 at 01:51:45PM +0100, Ulrich Weigand wrote:
> > Dominik Vogt wrote:
> > > > r2 through r4 should be fine. [ Not sure if there will be many (any?)
> > > > cases
> > > > where one of those is unused but r5 isn't, however. ]
> > >
> > > This can happen if t
On Wed, Dec 16, 2015 at 01:05:21PM +, Wilco Dijkstra wrote:
> James Greenhalgh wrote:
> > On Tue, Dec 15, 2015 at 10:54:49AM +, Wilco Dijkstra wrote:
> > > ping
> > >
> > > > -Original Message-
> > > > From: Wilco Dijkstra [mailto:wilco.dijks...@arm.com]
> > > > Sent: 06 November 20
Richard,
Here is updated patch which includes (1) a test on exit proposed by
you and (2) another test from PR68021 which is caught by new check on
counted loop. Outer-loop unswitching is not performed for both new
tests.
Bootstrapping and regression testing did not show any new failures.
Is it O
On Tue, Dec 15, 2015 at 11:17:35AM +, Wilco Dijkstra wrote:
> ping
>
> > -Original Message-
> > From: Wilco Dijkstra [mailto:wdijk...@arm.com]
> > Sent: 28 October 2015 17:33
> > To: GCC Patches
> > Subject: [PATCH][AArch64] Avoid emitting zero immediate as zero register
> >
> > Sever
On Wed, Dec 16, 2015 at 3:36 PM, Yuri Rumyantsev wrote:
> Richard,
>
> Here is updated patch which includes (1) a test on exit proposed by
> you and (2) another test from PR68021 which is caught by new check on
> counted loop. Outer-loop unswitching is not performed for both new
> tests.
As said
On 16/12/15 14:16, Richard Biener wrote:
On Mon, 14 Dec 2015, Tom de Vries wrote:
On 14/12/15 14:26, Richard Biener wrote:
On Sun, 13 Dec 2015, Tom de Vries wrote:
On 11/12/15 14:00, Richard Biener wrote:
On Fri, 11 Dec 2015, Tom de Vries wrote:
On 13/11/15 12:39, Jakub Jelinek wrote:
We
This extends the previous fix for the CFG cleanup issue WRT dead SSA
defs to properly avoid doing sth fancy with conditons in the first pass.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-12-16 Richard Biener
PR tree-optimization/68870
* tree-cf
On Tue, Dec 08, 2015 at 09:21:29AM +, Kyrill Tkachov wrote:
> Hi all,
>
> The test gcc.target/aarch64/vbslq_u64_1.c started failing recently due to
> some tree-level changes.
> This just exposed a deficiency in our xor-and-xor pattern for the vector
> bit-select pattern:
> aarch64_simd_bsl_i
The following improves the location for "statement with no effect" warning by
using the location of the expression if available. Can't use EXPR_LOCATION as
*_DECLs still don't carry a location.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2015-12-16 Marek Polacek
PR c/64637
On Fri, Dec 04, 2015 at 09:30:45AM +, Kyrill Tkachov wrote:
> Hi all,
>
> We don't handle properly the patterns for the [us]bfiz and [us]bfx
> instructions when they
> have an extend+ashift form. For example, the
> *_ashl pattern.
> This leads to rtx costs recuring into the extend and assign
The following patch adds a heuristic to prefer store/load-lanes
over SLP when vectorizing. Compared to the variant attached to
the PR I made the STMT_VINFO_STRIDED_P behavior explicit (matching
what you've tested).
It's a heuristic that may end up vectorizing less loops or loops
in a less optima
On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> The following improves the location for "statement with no effect" warning by
> using the location of the expression if available. Can't use EXPR_LOCATION as
> *_DECLs still don't carry a location.
Out of interest, does it emit sane underl
On Wed, 2015-12-16 at 16:09 +0100, Marek Polacek wrote:
> On Wed, Dec 16, 2015 at 10:04:05AM -0500, David Malcolm wrote:
> > On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> > > The following improves the location for "statement with no effect"
> > > warning by
> > > using the location of
On Wed, Dec 16, 2015 at 10:04:05AM -0500, David Malcolm wrote:
> On Wed, 2015-12-16 at 15:58 +0100, Marek Polacek wrote:
> > The following improves the location for "statement with no effect" warning
> > by
> > using the location of the expression if available. Can't use EXPR_LOCATION
> > as
> >
On 10/09/15 12:28, Jiong Wang wrote:
TLS instruction sequences are always with fixed format, there is no need
to use operand modifier, we can hardcode the relocation modifiers into
instruction pattern, all those redundant checks in aarch64_print_operand
can be removed.
OK for trunk?
2015-09-1
On 16.12.2015 05:59, Bernd Edlinger wrote:
> Hi,
>
> On 16.12.2015 00:55 Bernd Schmidt wrote:
>> On 12/15/2015 10:13 PM, Bernd Edlinger wrote:
>>> due to recent discussion on the basic asm, and the special handling
>>> of ASM_INPUT in ia64, I tried to build a bare-metal cross-compiler
>>> for ia6
OK.
Jason
I think this caused PR68932 - FAIL:
obj-c++.dg/property/at-property-23.mm -fgnu-runtime (internal compiler
error)
Sorry about that. I'll look into it today.
Martin
I think this caused PR68932 - FAIL:
obj-c++.dg/property/at-property-23.mm -fgnu-runtime (internal compiler
error)
Sorry about that. I'll look into it today.
Martin
On 10/12/15 14:14, Tom de Vries wrote:
[ copy-pasting-with-quote from
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00420.html , for some
reason I didn't get this email ]
On Thu, 3 Dec 2015, Tom de Vries wrote:
The flag is set here in expand_omp_target:
...
12682 /* Prevent IPA from re
Hi!
On Mon, 14 Dec 2015 20:17:33 +0300, Ilya Verbin wrote:
> [updated patch]
This regresses libgomp.oacc-c-c++-common/declare-4.c compilation for
nvptx offloading:
spawn [...]/build-gcc/gcc/xgcc -B[...]/build-gcc/gcc/
[...]/source-gcc/libgomp/testsuite/libgomp.oacc-c/../libgomp.oacc-c-c++-
> On Thu, Dec 10, 2015 at 08:30:37AM +0100, Jan Hubicka wrote:
> > * ipa-cp.c (ipcp_cloning_candidate_p): Use node->optimize_for_size_p.
> > (good_cloning_opportunity_p): Likewise.
> > (gather_context_independent_values): Do not return true when
> > polymorphic call context is known
On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> I am trying to understand Jakub's debug code and perhaps it can be improved.
> But in
> the case of optimized out unused parameters I think it is perfectly resonable
> to
> say that the variable was optimized out.
As long as the valu
On 12/16/2015 07:58 AM, Marek Polacek wrote:
The following improves the location for "statement with no effect" warning by
using the location of the expression if available. Can't use EXPR_LOCATION as
*_DECLs still don't carry a location.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2
> -Original Message-
> From: Steve Ellcey [mailto:sell...@imgtec.com]
> Sent: Tuesday, December 15, 2015 4:09 PM
> To: Moore, Catherine
> Cc: gcc-patches@gcc.gnu.org; matthew.fort...@imgtec.com
> Subject: RE: [Patch] Fix for MIPS PR target/65604
>
> On Tue, 2015-12-15 at 15:13 +, Moo
PTX doesn't support sibcalls, so this test is doomed to fail.
2015-12-16 Nathan Sidwell
* gcc.dg/sibcall-9.c: Xfail for nvptx.
Index: gcc.dg/sibcall-9.c
===
--- gcc.dg/sibcall-9.c (revision 231689)
+++ gcc.dg/sibcall-9.c (workin
we check for a the isl compute timeout function added in isl 0.13.
That means GCC could still be configured with isl 0.13, 0.14, and 0.15.
* config/isl.m4 (ISL_CHECK_VERSION): Check for
isl_ctx_get_max_operations.
* configure: Regenerate.
gcc/
* config.in:
On 16/12/15 12:18, Bernd Schmidt wrote:
On 12/15/2015 05:21 PM, Kyrill Tkachov wrote:
Then for the shift pattern in the MD file we'd have to dynamically
select the scheduling type depending on whether or not the shift
amount is 1 and the costs line up?
Yes. This isn't unusual, take a look at
On 12/04/2015 05:39 AM, Szabolcs Nagy wrote:
As described in pr other/67627, the all-multi target can be
built in parallel with the %_.lo targets which generate make
dependencies that are parsed during the build of all-multi.
gcc -MD does not generate the makefile dependencies in an
atomic way s
On 12/04/2015 05:39 AM, Szabolcs Nagy wrote:
As described in pr other/67627, the all-multi target can be
built in parallel with the %_.lo targets which generate make
dependencies that are parsed during the build of all-multi.
gcc -MD does not generate the makefile dependencies in an
atomic way s
This is a relatively straightforward PR where we should mention a macro
expansion in a warning message. The patch below implements the
suggestion by Marek to pass a location down from
build_function_call_vec. Ok if tests pass on x86_64-linux?
One question I have is about -Wformat, which is dea
> On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> > I am trying to understand Jakub's debug code and perhaps it can be
> > improved. But in
> > the case of optimized out unused parameters I think it is perfectly
> > resonable to
> > say that the variable was optimized out.
>
> As
On 12/16/2015 10:00 AM, Kyrill Tkachov wrote:
On 16/12/15 12:18, Bernd Schmidt wrote:
On 12/15/2015 05:21 PM, Kyrill Tkachov wrote:
Then for the shift pattern in the MD file we'd have to
dynamically select the scheduling type depending on whether or
not the shift amount is 1 and the costs line
On Wed, Dec 16, 2015 at 06:15:33PM +0100, Jan Hubicka wrote:
> > On Wed, Dec 16, 2015 at 05:24:25PM +0100, Jan Hubicka wrote:
> > > I am trying to understand Jakub's debug code and perhaps it can be
> > > improved. But in
> > > the case of optimized out unused parameters I think it is perfectly
>
Hi
This patch addresses incorrect recognition of VEC_PERM_EXPRs as VUZP
and VZIP on armeb-* targets. It also fixes the definition of the
vuzpq_* and vzipq_* NEON intrinsics which use incorrect lane
specifiers in the use of __builtin_shuffle().
The problem with arm_neon.h can be seen by temporari
Currently trunk emits range information for most bad binary operations
in the C++ frontend; but not in the C frontend.
The helper function binary_op_error shared by C and C++ takes a
location_t. In the C++ frontend, a location_t containing the range
has already been built, so we get the underline
My patch for 63809 fixed non-capturing use of a parameter pack in a
regular lambda, but not in a generic lambda, where we can't rely on
being instantiated within the enclosing context. So we use the existing
support for references to parameters from trailing return type, another
situation wher
On Wed, 2015-12-09 at 18:44 +0100, Bernd Schmidt wrote:
> On 12/09/2015 05:58 PM, David Malcolm wrote:
> > On Wed, 2015-11-04 at 14:56 +0100, Bernd Schmidt wrote:
> >>
> >> This seems like fairly low impact but also low cost, so I'm fine with it
> >> in principle. I wonder whether the length of the
On Wed, 2015-12-16 at 00:52 +0100, Bernd Schmidt wrote:
> On 12/15/2015 08:30 PM, David Malcolm wrote:
>
> > I got thinking about what we'd have to do to support Perforce-style
> > markers, and began to find my token-matching approach to be a little
> > clunky (in conjunction with reading Martin's
Matthew pointed out this test was failing for arm-none-eabi because the
rtx_code enum is represented in 8 bits which causes this error:
pr68619-4.c:42:17: error: width of 'code' exceeds its type
enum rtx_code code:16;
I changed the size of the bitfield in the obvious way. I verified all
On 12/01/2015 12:32 PM, Richard Sandiford wrote:
Jeff Law writes:
@@ -1080,6 +1070,18 @@ add_removable_extension (const_rtx expr, rtx_insn *insn,
}
}
+ /* Fourth, if the extended version occupies more registers than the
+original and the source of the exten
Hi,
just to summarize a discussion on IRC. The problem is that we produce debug
statements for eliminated arguments only in ipa-sra and ipa-split, while we
don't do anything for cgraph clones. This is a problem on release branches,
too.
It seems we have all the necessary logic, but the callee modi
Hi,
I checked the ipa-pta and pta implementations and these seems to work just
fine with presence of aliases because get_constraint_for_ssa_var already
looks into the alias targets.
This patch adds a testcase I constructed. Since I am done with auditing
*alias*.c for variable aliases I will close
Hi,
On Mon, 14 Dec 2015, Patrick Palka wrote:
> >>> >This should use cp_tree_operand_length.
> >> Hmm, I don't immediately see how I can use this function here. It
> >> expects a tree but I dont have an appropriate tree to give to it, only a
> >> tree_code.
> >
> > True. So let's introduce cp_t
This patch removes OUTGOING_STATIC_CHAIN_REGNUM -- there's no need for it to be
distinct from STATIC_CHAIN_REGNUM. Also, when we have to emit a frame or
outgoing args, but it's zero sized, there's no need to actually emit the frame
or arg array. We can just initialize the appropriate register
On 12/16/2015 05:24 AM, Richard Earnshaw (lists) wrote:
On 15/12/15 23:34, Evandro Menezes wrote:
On 12/14/2015 05:26 AM, James Greenhalgh wrote:
On Thu, Dec 03, 2015 at 03:07:43PM -0600, Evandro Menezes wrote:
On 11/20/2015 05:53 AM, James Greenhalgh wrote:
On Thu, Nov 19, 2015 at 04:04:41PM
On 12/12/15 09:44, Nathan Sidwell wrote:
On 12/11/15 13:15, Jan Hubicka wrote:
Jan,
b) augment can_replace_by_local_alias_in_vtable to check whether
aliases can be created?
I think this is best: can_replace_by_local_alias_in_vtable exists to prevent the
body walk in cases we are not going t
On 12/01/2015 12:32 PM, Richard Sandiford wrote:
Jeff Law writes:
@@ -1080,6 +1070,18 @@ add_removable_extension (const_rtx expr, rtx_insn *insn,
}
}
+ /* Fourth, if the extended version occupies more registers than the
+original and the source of the exten
Hi,
The attached patch removes the use of the map structure
(struct map) from the NVPTX plugin.
Regtested on x86_64-pc-linux-gnu
Ok for trunk?
Thanks!
Jim
ChangeLog
=
2015-12-XX James Norris
libgomp/
* plugin/plugin-nvptx.c (struct map): Removed.
(map_init
1 - 100 of 137 matches
Mail list logo
