On Fri, 4 Dec 2015, Jan Hubicka wrote:
> >
> > I wonder if you can split out the re-naming at this stage. Further
> > comments below.
>
> OK, I will commit the renaming and ipa-icf fix separately.
> >
> > > Bootstrapped/regtested x86_64-linux, OK?
> > >
> > > I will work on some testcases for
Ping. Originally posted here:
https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03440.html
Regards,
Michael Collison
On Fri, 4 Dec 2015, Jan Hubicka wrote:
> Hi,
> this is the patch for fold-const.c. Can you think of some testcase for the
> MR_DEPENDENCE_CLIQUE comparsion? I am not that familiar with the code to
> be able to construct it :(
With ICF it would involve a variant using restrict args vs.
non-restric
On Fri, 4 Dec 2015, Alan Lawrence wrote:
> On 04/12/15 17:46, Ramana Radhakrishnan wrote:
> >
> >
> > On 04/12/15 16:04, Richard Biener wrote:
> > > On December 4, 2015 4:32:33 PM GMT+01:00, Alan Lawrence
> > > wrote:
> > > > On 27/11/15 08:30, Richard Biener wrote:
> > > > >
> > > > > This is
On Sun, 6 Dec 2015, Bernd Edlinger wrote:
>
> Hi,
>
> while looking at the handling of basic asm statements
> I noticed two minor glitches, which I want to fix now.
>
> Secondly there is a wrong check in shorten_branches in final.c
>
> Here we check if GET_CODE (body) == ASM_INPUT, that is
> n
On Sun, 6 Dec 2015, Bernd Edlinger wrote:
>
> Hi,
>
> while looking at the handling of basic asm statements
> I noticed two minor glitches, which I want to fix now.
>
> First there is a missing check in compare_gimple_asm in ipa-icf-gimple.c
>
> Here we check if two asm statements are exactly
Hi,
2015-12-07 8:20 GMT+01:00 Tobias Burnus :
> Always - or only with optimization?
>
Only with optimization.
> I wonder whether using
>
> __asm__ __volatile__ ("":::"memory");
>
> would be sufficient as it has a way lower overhead than
> __sync_synchronize().
>
>
> That would be something like:
Hi Joern,
> > + insn = emit_insn (gen_blockage ());
>
> Is this actually part of the patch to fix cfi generation?
This instruction prevents the delay branch scheduler to speculatively use
epilogue instructions to fill up the delay slots. Hence, generating an assert
during dwarf2cfi execut
Hi,
it's a couple of regressions in the C testsuite present on SPARC 64-bit and
coming from the new coalescing code which fails to handle vector types with
BLKmode that are returned in multiple registers. The code assigns a BLKmode
REG to the RESULT_DECL of the function in expand_function_star
I wrote:
> I wonder whether using
>
> __asm__ __volatile__ ("":::"memory");
>
> would be sufficient as it has a way lower overhead than
> __sync_synchronize().
Namely, something like the attached patch.
Regarding the original patch submission: Is there a reason that you didn't
include the test c
On 12/07/2015 10:35 AM, Eric Botcazou wrote:
As discussed with Alexandre in the audit trail, the attached minimal fix just
prevents the problematic BLKmode REG from being generated, which appears to be
sufficient to restore the nominal operating mode.
PR middle-end/68291
PR mi
On 12/04/2015 08:36 PM, Jakub Jelinek wrote:
On Fri, Dec 04, 2015 at 06:19:19PM +, Manuel López-Ibáñez wrote:
My guess is that the first error_at should use arg instead of
option->opt_text to be equivalent. Of course, ideally, this code would
not be duplicated, but rather merged "somehow".
On 12/04/2015 10:09 PM, David Malcolm wrote:
Updated patch to comment attached, which rewrites things to clarify the
meaning of SHOW_CARET_P.
I guess this is OK for now. I think I'll go play with the Fortran
frontend a bit to see what exactly is going on with its use of set_range
there, I sti
Hi all,
In this PR we ICE because during post-reload splitting we generate the insn:
(insn 27 26 11 2 (set (reg:SI 0 r0 [orig:121 D.4992 ] [121])
(and:SI (not:SI (const_int 1 [0x1]))
(reg:SI 0 r0 [orig:121 D.4992 ] [121])))
(nil))
The splitter at fault is andsi_iorsi3_n
On Fri, Dec 4, 2015 at 8:51 PM, Bill Schmidt
wrote:
> Since r226675, we have been seeing these failures:
>
> FAIL: gcc.dg/vect/vect-widen-mult-const-s16.c -flto -ffat-lto-objects
> scan-tree-dump-times vect "pattern recognized" 2
> FAIL: gcc.dg/vect/vect-widen-mult-const-s16.c scan-tree-dump-times
On Fri, Dec 4, 2015 at 8:59 PM, Sebastian Paul Pop wrote:
> I would highly recommend updating the required version of ISL to isl-0.15:
> that would simplify the existing code, removing a lot of code under "#ifdef
> old ISL",
> and allow us to fully transition to schedule_trees instead of dealing w
Richard!
Here is middle-end part of patch with changes proposed by you.
Is it OK for trunk?
Thanks.
Yuri.
ChangeLog:
2015-12-07 Yuri Rumyantsev
PR middle-end/68542
* fold-const.c (fold_relational_const): Add handling of vector
comparison with boolean result.
* tree-cfg.c (verify_gimple_comp
Ping. Updated patch attached.
Matthew
On 27/11/15 09:23, Matthew Wahab wrote:
On 24/11/15 15:22, James Greenhalgh wrote:
> On Mon, Nov 16, 2015 at 04:31:32PM +, Matthew Wahab wrote:
>>
>> The command line options for target selection allow ARMv8.1 extensions
>> to be individually enable
Hi,
I'm sorry it took me more than a month to come up with another round
of patches aiming at merging the HSA branch into the trunk. Keeping
up-to date with the latest changes in the OpenMP 4.5 area was
strenuous and we have discovered and fixed a few bugs as I intensified
my testing efforts.
Wh
Hi,
this patch contains changes to the configuration mechanism and offload
bits, so that users can build compilers with HSA support. It plays
nicely with other accelerators despite using an altogether different
implementation approach. I have also added to it definitions of the
new options and pa
Hi,
The patch below contains all changes to libgomp files except for the
hsa plugin (which is in the following patch).
The changes can roughly divided into three categories. First, it
contains changes I that are necessary to support shared-memory
devices. In majority of cases this means treatin
Hi,
the patch below adds the HSA-specific plugin for libgomp. The plugin
implements the interface mandated by libgomp and takes care of finding
any available HSA devices, finalizing HSAIL code and running it on
HSA-capable GPUs. The plugin does not really implement any data
movement functions (i
Subject: Make copy_gimple_seq_and_replace_locals copy seqs in omp clauses
Hi,
this is https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00477.html with
the early return requested by Jakub. Please refer to that previous
email for explanation why it is necessary.
Thanks,
2015-12-03 Martin Jambor
Hi,
the patch in this email contains the changes to make our OpenMP
lowering and expansion machinery produce GPU kernels for a certain
limited class of loops. The plan is to make that class quite a big
bigger, but only the following is ready for submission now.
Basically, whenever the compiler c
Hi,
the pass manager changes required for HSA have already been committed
to trunk so all that remains are these additions to the pass pipeline.
Thanks,
Martin
2015-12-04 Martin Jambor
Martin Liska
* passes.def: Schedule pass_ipa_hsa and pass_gen_hsail.
Hi,
when a target construct is gridified, the HSA GPU function is
associated with the CPU function throughout the compilation, so that
they can be registered as a pair in libgomp.
Ungridified target constructs and, more importantly, "pragma omp
declare target" marked functions emerge out of OMP e
Hi,
the following patch adds a BRIG (binary representation of HSAIL)
representation description. It is within a single header file
describing the binary structures and constants of the format.
The file comes from the HSA Foundation (I have only added the
HSA_BRIG_FORMAT_H macro and check and rem
Hi,
because HSA backend is not based on RTL,we need our own, and it is in
this patch. The allocator has been written by Michael Matz and I have
put it into a separate email so that I can add him to CC, because he
is much better suited to answer any questions or review comments.
Thanks,
Martin
On Mon, Dec 07, 2015 at 12:17:58PM +0100, Martin Jambor wrote:
> Because I have not been able to come up with any solution to failing
> libgomp/testsuite/libgomp.c++/target-2.C, I have disabled use of
> dynamic parallelism in this merge (I keep it on the branch) and
> therefore entirely rely on the
Since r229889, we now have tests that pass only with ISL 0.15. Although ISL 0.15
is not a requirement, it seems we should make it easy to build the compiler that
way.
Other opinions?
Thanks,
Alan
contrib/ChangeLog:
* download_prerequisites: Update ISL version to 0.15.
---
contrib/downl
On 2015.12.07 at 11:52 +, Alan Lawrence wrote:
> Since r229889, we now have tests that pass only with ISL 0.15. Although ISL
> 0.15
> is not a requirement, it seems we should make it easy to build the compiler
> that
> way.
This is already fixed by r231329.
--
Markus
On Mon, Dec 7, 2015 at 12:52 PM, Alan Lawrence wrote:
> Since r229889, we now have tests that pass only with ISL 0.15. Although ISL
> 0.15
> is not a requirement, it seems we should make it easy to build the compiler
> that
> way.
>
> Other opinions?
Ok.
Richard.
> Thanks,
> Alan
>
> contrib/
On 07/12/15 11:54, Markus Trippelsdorf wrote:
On 2015.12.07 at 11:52 +, Alan Lawrence wrote:
Since r229889, we now have tests that pass only with ISL 0.15. Although ISL 0.15
is not a requirement, it seems we should make it easy to build the compiler that
way.
This is already fixed by r2313
On Sun, Dec 06, 2015 at 11:50:15PM -0500, Patrick Palka wrote:
> diff --git a/gcc/c/c-fold.c b/gcc/c/c-fold.c
> index c554e17..ab0b37f 100644
> --- a/gcc/c/c-fold.c
> +++ b/gcc/c/c-fold.c
> @@ -88,6 +88,7 @@ c_fully_fold (tree expr, bool in_init, bool *maybe_const)
> }
>ret = c_fully_fold_
On Mon, 7 Dec 2015, Patrick Palka wrote:
> To fix this inconsistency, this patch calls decl_constant_value in
> c_fully fold after folding the given expression.
The aim should be to eliminate decl_constant_value use here once all
folding optimizations are also done on GIMPLE (and generally reduc
On Sun, Dec 6, 2015 at 11:50 PM, Patrick Palka wrote:
> There is a minor inconsistency in the folding behavior within the C
> frontend. The C frontend does not currently fold the expression "x",
> where x is a const int, yet the FE does fold the expression "x + 0".
>
> This happens because decl_c
On Mon, Dec 7, 2015 at 7:20 AM, Marek Polacek wrote:
> On Sun, Dec 06, 2015 at 11:50:15PM -0500, Patrick Palka wrote:
>> diff --git a/gcc/c/c-fold.c b/gcc/c/c-fold.c
>> index c554e17..ab0b37f 100644
>> --- a/gcc/c/c-fold.c
>> +++ b/gcc/c/c-fold.c
>> @@ -88,6 +88,7 @@ c_fully_fold (tree expr, bool
Hi DJ,
Please find attached an updated patch which tries to address the points raised
by you in my earlier attempt,
https://gcc.gnu.org/ml/gcc-patches/2015-08/msg01729.html
1. Added an option for -msave.. and -mno-save..
The default will be to save the MDUC registers for the g13 target in the
On Mon, Dec 7, 2015 at 7:23 AM, Joseph Myers wrote:
> On Mon, 7 Dec 2015, Patrick Palka wrote:
>
>> To fix this inconsistency, this patch calls decl_constant_value in
>> c_fully fold after folding the given expression.
>
> The aim should be to eliminate decl_constant_value use here once all
> fold
Hi,
> AFAICT, you use hardware synchronisation instruction for EMMODEL_SEQ,
> and compiler memory barriers for all other memory models (except
> MEMMODEL_RELAXED). That makes no sense; either the platform needs
> explicit instructions for memory coherency, or it doesn't.
Indeed, we on purpose mi
On Mon, Dec 07, 2015 at 11:24:02AM +0100, Bernd Schmidt wrote:
> On 12/04/2015 08:36 PM, Jakub Jelinek wrote:
> >On Fri, Dec 04, 2015 at 06:19:19PM +, Manuel López-Ibáñez wrote:
> >>My guess is that the first error_at should use arg instead of
> >>option->opt_text to be equivalent. Of course, i
Alex pointed me at his ptx patch
https://gcc.gnu.org/ml/gcc-patches/2015-10/msg03393.html but meanwhile I'd
reorganized that part of the PTX backend.
This patch implements Alex's patch in the new code base. There are some minor
additions.
1) we also look inside vector types.
2) we only limit
On Thu, Dec 03, 2015 at 09:40:29PM +, Joseph Myers wrote:
> On Thu, 3 Dec 2015, Marek Polacek wrote:
>
> > > I think you also need to decrement orig_qual_indirect, which counts the
> > > number of levels of array type derivation from orig_qual_type.
> >
> > Thus:
> >
> > Bootstrapped/regtes
On 12/06/15 03:56, Dmitry Vyukov wrote:
Hello,
Sancov tests submitted in 231296 assume that asan is supported on all platforms.
This patch fixes that assumption.
* gcc.target/powerpc/recip-sqrtf.c: New test.
Index: gcc.dg/sancov/sancov.exp
==
On 07/12/15 10:06, Tobias Burnus wrote:
I wrote:
I wonder whether using
__asm__ __volatile__ ("":::"memory");
would be sufficient as it has a way lower overhead than
__sync_synchronize().
Namely, something like the attached patch.
Regarding the original patch submission: Is there a reason t
On Sun, Dec 06, 2015 at 09:56:32AM +0100, Dmitry Vyukov wrote:
> --- gcc.dg/sancov/sancov.exp (revision 231328)
> +++ gcc.dg/sancov/sancov.exp (working copy)
> @@ -18,6 +18,7 @@
>
> load_lib gcc-dg.exp
> load_lib torture-options.exp
> +load_lib asan-dg.exp
>
> dg-init
> torture-init
> @@ -31
John David Anglin writes:
> 2015-12-05 John David Anglin
>
> PR 68115/libfortran
> * configure.ac: Set libbacktrace_cv_sys_sync to no on hppa*-*-hpux*.
> * configure: Regenerate.
> * elf.c (backtrace_initialize): Cast __sync_bool_compare_and_swap call
> to void.
On Mon, Dec 07, 2015 at 11:09:52AM +, Matthew Wahab wrote:
> Ping. Updated patch attached.
This is OK, thanks.
James
>
> Matthew
>
> On 27/11/15 09:23, Matthew Wahab wrote:
> >On 24/11/15 15:22, James Greenhalgh wrote:
> > > On Mon, Nov 16, 2015 at 04:31:32PM +, Matthew Wahab wrote:
>
Your patch fixes the issues. In attachment patch, test case and changelog.
Thanks!
2015-12-07 11:06 GMT+01:00 Tobias Burnus :
> I wrote:
>> I wonder whether using
>>
>> __asm__ __volatile__ ("":::"memory");
>>
>> would be sufficient as it has a way lower overhead than
>> __sync_synchronize().
>
>
From 358ae2453a4b965adaf9e684220b7461f719a568 Mon Sep 17 00:00:00 2001
From: Chen Gang
Date: Mon, 7 Dec 2015 21:29:20 +0800
Subject: [PATCH] gcc/config/tilegx/tilegx.md: Compare only 32-bit values for
32-bit comparing
For __buildin_mul_overflow(), it will really compare only 32-bit values
for 32
Hi.
As Jakub pointed out in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66896#c15,
I forgot
to add a test-case to both GCC-5-branch and trunk.
May I please installed the suggested patch to both these branches?
Thanks,
Martin
>From 7df3eaa59c4b6ee9f011f35ee480e022fe77e0b3 Mon Sep 17 00:00:00 200
On 12/01/15 11:01, Bernd Schmidt wrote:
On 12/01/2015 04:28 PM, Alexander Monakov wrote:
I'm taking a different approach. I want to execute all insns in all warp
members, while ensuring that effect (on global and local state) is that same
as if any single thread was executing that instruction.
On 12/07/2015 02:44 PM, Jakub Jelinek wrote:
So like this?
+/* Perform diagnostics for read_cmdline_option and control_warning_option
+ functions. Returns true if an error has been diagnosed. */
Let's document arguments; for the ones identical to read_cmdline_option
an explicit pointer
On Mon, Dec 7, 2015 at 2:56 PM, Nathan Sidwell wrote:
> On 12/06/15 03:56, Dmitry Vyukov wrote:
>>
>> Hello,
>>
>> Sancov tests submitted in 231296 assume that asan is supported on all
>> platforms.
>> This patch fixes that assumption.
>
>
>>* gcc.target/powerpc/recip-sqrtf.c: New test.
>> Ind
On 12/01/15 18:52, Bernd Schmidt wrote:
What exactly is the problem with having asm files? I'm asking because this...
On 12/01/2015 04:28 PM, Alexander Monakov wrote:
+/* __shared__ char *__nvptx_stacks[32]; */
+asm ("// BEGIN GLOBAL VAR DEF: __nvptx_stacks");
+asm (".visible .shared .u64 __nv
On Mon, Dec 7, 2015 at 3:09 PM, Jakub Jelinek wrote:
> On Sun, Dec 06, 2015 at 09:56:32AM +0100, Dmitry Vyukov wrote:
>
>> --- gcc.dg/sancov/sancov.exp (revision 231328)
>> +++ gcc.dg/sancov/sancov.exp (working copy)
>> @@ -18,6 +18,7 @@
>>
>> load_lib gcc-dg.exp
>> load_lib torture-options.exp
On Mon, Dec 07, 2015 at 04:16:02PM +0100, Dmitry Vyukov wrote:
> Index: ChangeLog
> ===
> --- ChangeLog (revision 231362)
> +++ ChangeLog (working copy)
> @@ -1,3 +1,7 @@
> +2015-12-06 Dmitry Vyukov
> +
> + * gcc.dg/sancov/asan.c: D
On Mon, Dec 7, 2015 at 4:20 PM, Jakub Jelinek wrote:
> On Mon, Dec 07, 2015 at 04:16:02PM +0100, Dmitry Vyukov wrote:
>> Index: ChangeLog
>> ===
>> --- ChangeLog (revision 231362)
>> +++ ChangeLog (working copy)
>> @@ -1,3 +1,7 @@
>>
On 12/07/2015 06:53 AM, Chen Gang wrote:
> -(define_insn "insn_cmpne_"
> - [(set (match_operand:I48MODE2 0 "register_operand" "=r")
> - (ne:I48MODE2 (match_operand:I48MODE 1 "reg_or_0_operand" "rO")
> - (match_operand:I48MODE 2 "reg_or_cint_operand" "rO")))]
> +(define_insn "i
On 12/06/2015 06:52 AM, James Norris wrote:
> This patch fixes a some runtime issues when dealing with
> the deviceptr clause in Fortran. There were some corner
> cases that were not being dealt with correctly, and the
> patch resolves these. Also a new set of test cases has
> been added.
Which c
2015-12-06 22:41 GMT+03:00 Aleksandra Tsvetkova :
> Fixed all.
> Now there are no new fails on spec2000
If you made some fix in your algorithm to pass SPEC benchmarks, you
need to extend your tests to cover this fix.
Thanks,
Ilya
Ping. Updated patch attached.
Matthew
On 26/11/15 15:55, Matthew Wahab wrote:
Hello,
ARMv8.1 includes an extension to ARM which adds two Adv.SIMD
instructions, vqrdmlah and vqrdmlsh. This patch set adds support for
ARMv8.1 and for the new instructions, enabling the architecture with
--march=ar
Ping. Updated patch attached.
Matthew
On 26/11/15 15:58, Matthew Wahab wrote:
This patch sets up multilib support for ARMv8.1, treating it as a
synonym for ARMv8. Since ARMv8.1 integer, FP or SIMD
instructions are only generated for the new, instruction-specific
instrinsics, mapping to ARMv8 rat
Ping. Updated patch attached.
Matthew
On 26/11/15 16:00, Matthew Wahab wrote:
Hello,
This patch adds patterns for the instructions, vqrdmlah and vqrdmlsh,
introduced in the ARMv8.1 architecture. The instructions are made
available when -march=armv8.1-a is enabled with suitable fpu settings,
suc
Ping. Updated patch attached.
Matthew
On 26/11/15 16:01, Matthew Wahab wrote:
Hello,
This patch adds the feature macro __ARM_FEATURE_QRDMX to indicate the
presence of the ARMv8.1 instructions vqrdmlah and vqrdmlsh. It is
defined when the instructions are available, as it is when
-march=armv8.1
On Mon, 7 Dec 2015, Marek Polacek wrote:
> + if (orig_qual_indirect != 0)
> + orig_qual_type = TREE_TYPE (orig_qual_type);
> + else
> + orig_qual_indirect--;
For optimal results for debug info, I think that should be == 0 (i.e.
preserve orig_qu
On 27/11/15 17:11, Matthew Wahab wrote:
On 27/11/15 13:44, Christophe Lyon wrote:
On 26/11/15 16:02, Matthew Wahab wrote:
This patch adds ARMv8.1 support to GCC Dejagnu, to allow ARM
tests to specify targest and to set up command line options.
It builds on the ARMv8.1 target support added for
Ping. Updated patch attached.
Matthew
On 26/11/15 16:10, Matthew Wahab wrote:
Attached the missing patch.
Matthew
On 26/11/15 16:04, Matthew Wahab wrote:
Hello,
This patch adds the ACLE intrinsics for the instructions introduced in
ARMv8.1. It adds the vqrmdlah_lane and vqrdmlsh_lane forms of
Ping. Updated patch attached.
Matthew
On 26/11/15 16:04, Matthew Wahab wrote:
Hello,
This patch adds the ACLE intrinsics for the instructions introduced in
ARMv8.1. It adds the vqrmdlah and vqrdmlsh forms of the instrinsics to
the arm_neon.h header, together with the ARM builtins used to implem
calls to no return fns can cause problems with the PTX JIT. It doesn't
understand their no-return nature and can erroneously think there are unexitable
loops (depending on the precise placement of bbs). It can get so upset it
segfaults.
gcc.dg/pr68671.c started causing this last week, with w
On 12/04/2015 06:52 PM, H.J. Lu wrote:
On Fri, Dec 4, 2015 at 11:26 AM, Vladimir Makarov wrote:
The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68349
The patch was tested and bootstrapped on x86/x86-64.
Committed as rev. 231300.
unsigned long strlen();
^^^
> Ok. Although thinking about your comment in the PR about not making such
> vectors gimple registers I wonder what the effects of that would be.
First of all it's a bit painful to do because is_gimple_reg_type is defined
inline in gimple-expr.h and adding TYPE_MODE in there causes a compilation
On December 7, 2015 5:42:02 PM GMT+01:00, Eric Botcazou
wrote:
>> Ok. Although thinking about your comment in the PR about not making
>such
>> vectors gimple registers I wonder what the effects of that would be.
>
>First of all it's a bit painful to do because is_gimple_reg_type is
>defined
>inl
On Mon, Dec 07, 2015 at 04:05:11PM +, Joseph Myers wrote:
> On Mon, 7 Dec 2015, Marek Polacek wrote:
>
> > + if (orig_qual_indirect != 0)
> > + orig_qual_type = TREE_TYPE (orig_qual_type);
> > + else
> > + orig_qual_indirect--;
>
> For optimal resul
On 12/07/15 11:18, Nathan Sidwell wrote:
calls to no return fns can cause problems with the PTX JIT. It doesn't
understand their no-return nature and can erroneously think there are unexitable
loops (depending on the precise placement of bbs). It can get so upset it
segfaults.
gcc.dg/pr68671.c
Hello Nathan,
On Mon, 7 Dec 2015, Nathan Sidwell wrote:
> This patch changes call emission to look for a noreturn note and emit a trap
> insn after the call. The JIT no longer explodes.
I think there's a potential issue with the patch: when the noreturn function
has a non-void return value, you
Hi Richi,
I was afraid this would break X86. Unfortunately, your proposed patch
didn't change any output for me. Still seeing 6 and 8 instances of
"pattern recognized", unfortunately.
Bill
On Mon, 2015-12-07 at 11:50 +0100, Richard Biener wrote:
> On Fri, Dec 4, 2015 at 8:51 PM, Bill Schmidt
>
On 12/07/2015 06:03 PM, Nathan Sidwell wrote:
On 12/07/15 11:18, Nathan Sidwell wrote:
calls to no return fns can cause problems with the PTX JIT. It doesn't
understand their no-return nature and can erroneously think there are
unexitable
loops (depending on the precise placement of bbs). It c
On 12/07/15 12:08, Alexander Monakov wrote:
Hello Nathan,
On Mon, 7 Dec 2015, Nathan Sidwell wrote:
This patch changes call emission to look for a noreturn note and emit a trap
insn after the call. The JIT no longer explodes.
I think there's a potential issue with the patch: when the noretu
-Original Message-
From: Michael Eager [mailto:ea...@eagerm.com]
Sent: Thursday, December 03, 2015 7:27 PM
To: Ajit Kumar Agarwal; GCC Patches
Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala
Subject: Re: [Patch,microblaze]: Instruction prefetch optimization f
On 12/07/2015 06:34 PM, Nathan Sidwell wrote:
Aren't noreturn fns required to be void? It certainly doesn't make
sense for them to do otherwise.
The documentation says "it makes no sense" for them to have a type other
than void, but I don't think that translates into a requirement. I
suppos
On Mon, 7 Dec 2015, Marek Polacek wrote:
> Anyway, here's the version with == 0. Thanks,
>
> Bootstrapped/regtested on x86_64-linux, ok for trunk?
>
> 2015-12-07 Marek Polacek
>
> PR c/68668
> * c-decl.c (grokdeclarator): If ORIG_QUAL_INDIRECT is indirect, use
> TREE_TYPE
This testcase used to ICE, but compiles fine since the C++ delayed folding
merge. I'd like to add it to the testsuite and close the PR.
Tested on x86_64-linux, ok for trunk?
2015-12-07 Marek Polacek
PR c++/68116
* g++.dg/cpp0x/pr68116.C: New test.
diff --git gcc/testsuite/g+
This patch merges the two places were we handle return type emission. In a
similar way to write_one_arg, we now have write_return.
This patch shows that the C++ NRV patch I created some time back is at best
incomplete, because it's not being considered in the prototype emission.
Something tha
On December 7, 2015 6:21:36 PM GMT+01:00, Bill Schmidt
wrote:
>Hi Richi,
>
>I was afraid this would break X86. Unfortunately, your proposed patch
>didn't change any output for me. Still seeing 6 and 8 instances of
>"pattern recognized", unfortunately.
Hmm, can you open a PR and attach vectori
> >
> > Well, not exactly of the case mentioned above, but still think that this is
> > safe (ugly, too). An alternative is to keep around the bodies until after
> > inlining. I have infrastructure for that in my tree, but it is hard to
> > tune to
> > do: first the alternative function body may
> On Fri, 4 Dec 2015, Jan Hubicka wrote:
>
> > Hi,
> > this is the patch for fold-const.c. Can you think of some testcase for the
> > MR_DEPENDENCE_CLIQUE comparsion? I am not that familiar with the code to
> > be able to construct it :(
>
> With ICF it would involve a variant using restrict args
While doing more testing of the MIPS frame header optimization I checked
in earlier, I found I could not build the elf toolchain when I turned the
optimization on by default. This is because GCC was putting a frame related
instruction (the save of the return address) into an annulled delay slot.
T
> > Bootstrapped/regtested x86_64-linux and also lto-bootstraped. Looks OK?
> >
> > * alias.c (alias_set_subset_of, alias_sets_conflict_p,
> > objects_must_conflict_p): Short circuit for !flag_strict_aliasing
> > (get_alias_set): Remove flag_strict_aliasing check.
> > (new_alias_se
This testcase was failing because the NRV optimization changing VAR_DECL
to RESULT_DECL was confusing the constexpr code. Fixed by moving
delayed folding to below NRV modifications. I also needed to move the
pre-genericize plugin earlier so that folding doesn't break the
expression ranges plu
The code for recognizing a constrained partial specialization of a class
was incorrectly treating the template friend as a partial specialization
because "class A" was finding the injected-class-name from the enclosing
scope.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 1155b92a5e8151
On 12/07/2015 07:54 PM, Steve Ellcey wrote:
if (must_annul)
- used_annul = 1;
+ {
+ /* Frame related instructions cannot go into annulled delay
+slots, it messes up the dwarf info. */
+ if (RTX_FRAME_RELATED_P (trial))
+
On 12/07/2015 12:28 PM, Bernd Schmidt wrote:
On 12/07/2015 07:54 PM, Steve Ellcey wrote:
if (must_annul)
-used_annul = 1;
+{
+ /* Frame related instructions cannot go into annulled delay
+ slots, it messes up the dwarf info. */
+ if (RTX_FRAME_
On Mon, 2015-12-07 at 20:28 +0100, Bernd Schmidt wrote:
> On 12/07/2015 07:54 PM, Steve Ellcey wrote:
> > if (must_annul)
> > - used_annul = 1;
> > + {
> > + /* Frame related instructions cannot go into annulled delay
> > +slots, it messes up the dwarf info.
> > > Bootstrapped/regtested x86_64-linux and also lto-bootstraped. Looks OK?
> > >
> > > * alias.c (alias_set_subset_of, alias_sets_conflict_p,
> > > objects_must_conflict_p): Short circuit for !flag_strict_aliasing
> > > (get_alias_set): Remove flag_strict_aliasing check.
> > > (new_alia
On Mon, 2015-12-07 at 19:17 +0100, Richard Biener wrote:
> On December 7, 2015 6:21:36 PM GMT+01:00, Bill Schmidt
> wrote:
> >Hi Richi,
> >
> >I was afraid this would break X86. Unfortunately, your proposed patch
> >didn't change any output for me. Still seeing 6 and 8 instances of
> >"pattern
On 12/04/2015 03:25 AM, Kyrill Tkachov wrote:
This is ok arm-wise, sorry for the delay.
Make sure to regenerate and commit the updated config/arm/arm-tune.md
hunk
when committing the patch.
Checked in as r231378.
Thank you,
--
Evandro Menezes
On 12/07/2015 08:43 PM, Steve Ellcey wrote:
I am not sure about this. There is an earlier if statement in the loop
that does a 'return' instead of a break (or continue) and there is a
return in the 'else' part of the if that sets must_annul. Both of these
are inside the loop that looks at all t
On 12/07/15 12:42, Bernd Schmidt wrote:
On 12/07/2015 06:34 PM, Nathan Sidwell wrote:
Aren't noreturn fns required to be void? It certainly doesn't make
sense for them to do otherwise.
The documentation says "it makes no sense" for them to have a type other than
void, but I don't think that
On 12/05/2015 06:07 PM, Martin Sebor wrote:
+ tree oper = TREE_OPERAND (object, 0);
+ STRIP_NOPS (oper);
+ null_object_p = integer_zerop (oper);
You could use tree_strip_nop_conversions to avoid needing a local
variable, but this is OK too.
Jason
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