On Thu, Nov 19, 2015 at 10:32 AM, Bin.Cheng wrote:
> On Tue, Nov 17, 2015 at 6:08 PM, James Greenhalgh
> wrote:
>> On Tue, Nov 17, 2015 at 05:21:01PM +0800, Bin Cheng wrote:
>>> Hi,
>>> GIMPLE IVO needs to call backend interface to calculate costs for addr
>>> expressions like below:
>>>FORM1
On Wed, Nov 18, 2015 at 11:50 PM, Bernd Schmidt wrote:
> On 11/10/2015 11:19 AM, Bin.Cheng wrote:
>>
>> On Tue, Nov 10, 2015 at 6:06 PM, Bernd Schmidt
>> wrote:
>>>
>>>
>>> Multi-line expressions should be wrapped in parentheses so that
>>> emacs/indent
>>> can format them automatically. Two sets
On 20/11/15 01:41, Bernd Schmidt wrote:
I1 is def_insn, I3 is cand->insn. tmp_reg is 'ax'. What we want to do
is reject this transformation
because the destination of def_insn (aka I1), that is 'ax', is not the
operand of the extend operation
in cand->insn (aka I3). As you said, rtx_equal won't
Hi Jeff,
The code there would solve this problem, but the approach is is overly
cautious, since it disables the optimization for all extensions that
increase the number of hard registers used. Some of these will be
viable candidates, provided that the extra hard registers are no used.
(This is
When vectorising a integer induction condition reduction,
is_nonwrapping_integer_induction ends up with different values for base
during the analysis and build phases. In the first it is an INTEGER_CST,
in the second the loop has been vectorised out and the base is now a
variable.
This results in
Hi,
this documents the new overflow arithmetics patterns added recently (addv4,
subv4, mulv4, umulv4, negv3) and only them, i.e. the old ones are still not.
This also fixes the description of the cbranch and jump patterns, which were
referring to a label_ref instead of a code_label.
Tested with
On Thu, 19 Nov 2015, Tom de Vries wrote:
> On 17/11/15 23:20, Tom de Vries wrote:
> > [ was: Re: [PATCH, 10/16] Add pass_oacc_kernels pass group in passes.def ]
> >
> > Hi,
> >
> > Consider test-case test.c, with a use of the final value of the
> > iteration variable (return i):
> > ...
> > unsi
On Thu, Nov 19, 2015 at 08:26:45AM -0800, Cesar Philippidis wrote:
> (gfc_oacc_routine_name): New struct;
Full stop instead of semicolon.
> diff --git a/gcc/tree-nested.c b/gcc/tree-nested.c
> index 1f6311c..e321072 100644
> --- a/gcc/tree-nested.c
> +++ b/gcc/tree-nested.c
> @@ -1106,6 +11
Toward fixing PR68385. I'm just starting a full round of testing, but
extern void underflow(void) __attribute__((noreturn));
unsigned sub1(unsigned a, unsigned b)
{
unsigned r = a - b;
if (r > a) underflow();
return r;
}
unsigned sub2(unsigned a, unsigned b)
{
unsigned r;
if
On Thu, 19 Nov 2015, Tom de Vries wrote:
> On 17/11/15 15:53, Tom de Vries wrote:
> > > And the above LIM example
> > > is none for why you need two LIM passes...
> >
> > Indeed. I'm planning a separate reply to explain in more detail the need
> > for the two pass_lims.
>
> I.
>
> I managed to
On Fri, Nov 20, 2015 at 11:12:06AM +0100, Eric Botcazou wrote:
> Hi,
>
> this documents the new overflow arithmetics patterns added recently (addv4,
> subv4, mulv4, umulv4, negv3) and only them, i.e. the old ones are still not.
> This also fixes the description of the cbranch and jump patterns, w
On Thu, 19 Nov 2015, Tom de Vries wrote:
> On 16/11/15 13:45, Richard Biener wrote:
> > > I've eliminated all the uses for pass_tree_loop_init/pass_tree_loop_done
> > > in
> > > >the pass group. Instead, I've added conditional loop optimizer setup in:
> > > >- pass_lim and pass_scev_cprop (added
Enable instruction fusion of AES instructions on ARM for Cortex-A53 and
Cortex-A57.
OK for commit?
ChangeLog:
2015-11-20 Wilco Dijkstra
* gcc/config/arm/arm.c (arm_cortex_a53_tune): Add AES fusion.
(arm_cortex_a57_tune): Likewise.
(aarch_macro_fusion_pair_p): Add supp
On Thu, Nov 19, 2015 at 6:04 PM, David Malcolm wrote:
> Jeff pre-approved the plugin version of this (as a new
> file unittests/test-bitmap.c):
> https://gcc.gnu.org/ml/gcc-patches/2015-10/msg03284.html
> with:
>> OK if/when prereqs are approved. Minor twiddling if we end up moving it
>> elsewh
On Fri, Nov 20, 2015 at 11:27:48AM +0100, Richard Henderson wrote:
> Toward fixing PR68385. I'm just starting a full round of testing, but
>
> extern void underflow(void) __attribute__((noreturn));
> unsigned sub1(unsigned a, unsigned b)
> {
> unsigned r = a - b;
> if (r > a) underflow();
> Toward fixing PR68385. I'm just starting a full round of testing, but
Do you mind if I install my doc patch? It's slightly more thorough.
--
Eric Botcazou
On Fri, Nov 20, 2015 at 8:21 AM, Jim Wilson wrote:
> A cygwin hosted cross compiler to aarch64-linux, compiling a C version
> of linpack with -Ofast, produces code that runs 17% slower than a
> linux hosted compiler. The problem shows up in the vect dump, where
> some different vectorization opti
On Thu, Nov 19, 2015 at 10:22:16AM -0600, James Norris wrote:
> 2015-XX-XX James Norris
> Cesar Philippidis
>
> gcc/fortran/
> * dump-parse-tree.c (show_namespace): Handle declares.
> * gfortran.h (struct symbol_attribute): New fields.
> (enum gfc_omp_map_map
On Fri, Nov 20, 2015 at 10:24 AM, Alan Hayward wrote:
> When vectorising a integer induction condition reduction,
> is_nonwrapping_integer_induction ends up with different values for base
> during the analysis and build phases. In the first it is an INTEGER_CST,
> in the second the loop has been v
> Eric has just submitted a documentation path that documented the
> {add,sub,mul,umul}v4 and negv3 patterns, so this should be
> applied on top of that.
OK, I'm going to apply it, thanks. Note that the comment at the beginning
of expand_addsub_overflow describing the overall strategy ought to b
Hi Andrew,
On 17/11/15 22:10, Andrew Pinski wrote:
Because the imp and parts are really integer rather than strings, this patch
moves the comparisons to be integer. Also allows saving around integers are
easier than doing string comparisons. This allows for the next change.
The way I store BI
On 11/20/2015 11:43 AM, Jakub Jelinek wrote:
+(define_expand "uaddv4"
+ [(parallel [(set (reg:CCC FLAGS_REG)
+ (compare:CCC
+(plus:SWI (match_dup 1) (match_dup 2))
+(match_dup 1)))
+ (set (match_dup 0)
+ (plus:
On 11/20/2015 11:56 AM, Eric Botcazou wrote:
Eric has just submitted a documentation path that documented the
{add,sub,mul,umul}v4 and negv3 patterns, so this should be
applied on top of that.
OK, I'm going to apply it, thanks.
Thanks.
Note that the comment at the beginning
of expand_addsub
On 11/20/2015 03:14 AM, Bernd Schmidt wrote:
> BTW, I'm with whoever said absolutely no way to the idea of making automatic
> changes like this as part of a commit hook.
>
> I think the whitespace change can go in if it hasn't already, but I think the
> other one still has enough problems that I
On Wed, Nov 18, 2015 at 2:53 PM, Ilya Enkovich wrote:
> 2015-11-18 16:44 GMT+03:00 Richard Biener :
>> On Wed, Nov 18, 2015 at 12:34 PM, Ilya Enkovich
>> wrote:
>>> Hi,
>>>
>>> When we compute vectypes we skip non-relevant phi nodes. But we process
>>> non-relevant alive statements and thus ma
2015-11-20 14:28 GMT+03:00 Richard Biener :
> On Wed, Nov 18, 2015 at 2:53 PM, Ilya Enkovich wrote:
>> 2015-11-18 16:44 GMT+03:00 Richard Biener :
>>> On Wed, Nov 18, 2015 at 12:34 PM, Ilya Enkovich
>>> wrote:
Hi,
When we compute vectypes we skip non-relevant phi nodes. But we pr
On 11/19/2015 06:43 PM, Pedro Alves wrote:
> On 11/19/2015 12:54 PM, Martin Liška wrote:
>> ContinuationIndentWidth: 2
>> -ForEachMacros:
>> ['_FOR_EACH','_FOR_EACH_1','FOR_EACH_AGGR_INIT_EXPR_ARG','FOR_EACH_ALIAS','FOR_EACH_ALLOCNO','FOR_EACH_ALLOCNO_OBJECT','FOR_EACH_ARTIFICIAL_DEF','FOR_EACH_A
On 11/20/2015 11:33 AM, Martin Liška wrote:
> Hi Pedro.
Hi Martin.
> Fully agree with you, there's suggested patch.
> Hope I can install the patch for trunk?
I'd call it obvious. :-)
Thanks,
Pedro Alves
Hi Andre,
On 18/11/15 09:44, Andre Vieira wrote:
On 17/11/15 10:10, James Greenhalgh wrote:
On Mon, Nov 16, 2015 at 01:15:32PM +, Andre Vieira wrote:
On 16/11/15 12:07, James Greenhalgh wrote:
On Mon, Nov 16, 2015 at 10:49:11AM +, Andre Vieira wrote:
Hi,
This patch changes the ta
Hi,
the 16 bit bswap instruction support was missing in the back-end so
far. Added with the attached patch.
Bootstrapped on s390 and s390x. No regressions.
Bye,
-Andreas-
gcc/testsuite/ChangeLog:
2015-11-20 Andreas Krebbel
* gcc.target/s390/bswap-1.c: New test.
gcc/ChangeLog:
On Thu, Nov 19, 2015 at 04:04:41PM -0600, Evandro Menezes wrote:
> On 11/05/2015 02:51 PM, Evandro Menezes wrote:
> >2015-11-05 Evandro Menezes
> >
> > gcc/
> >
> > * config/aarch64/aarch64.c (aarch64_override_options_internal):
> > Increase loop peeling limit.
> >
> >This patch inc
Hi Richard,
As per Jakub suggestion in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67326,
the below patch fixes the regression in tree if conversion.
Basically allowing if conversion to happen for a candidate DR, if we find
similar DR with same dimensions and that DR will not trap.
To find si
Hi Kirill,
On 18/11/15 14:11, Kirill Yukhin wrote:
Hello Andreas, Devid.
On 18 Nov 10:45, Andreas Schwab wrote:
Kirill Yukhin writes:
diff --git a/gcc/testsuite/c-c++-common/attr-simd.c
b/gcc/testsuite/c-c++-common/attr-simd.c
new file mode 100644
index 000..b4eda34
--- /dev/null
+++ b
On 11/20/2015 12:52 PM, Andreas Krebbel wrote:
+(define_insn "bswaphi2"
+ [(set (match_operand:HI 0 "register_operand" "=d")
+ (bswap:HI (match_operand:HI 1 "memory_operand" "RT")))]
+ "TARGET_CPU_ZARCH"
+ "lrvh\t%0,%1"
+ [(set_attr "type" "load")
+ (set_attr "op_type" "RX
On Fri, Nov 20, 2015 at 12:02:07PM +, Kumar, Venkataramanan wrote:
> Also.
> (1) I guard these checks for -ftree-loop-if-convert-stores and -fno-common.
> Sometimes vectorization flags also triggers if conversion.
> (2) Also hashing base DRs for writes only.
Let me comment just on formatti
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
> On 11/12/2015 09:39 AM, Evandro Menezes wrote:
>2015-11-12 Evandro Menezes
>
>[AArch64] Add attribute for compatibility with ARM pipeline models
>
>gcc/
>
>* config/aarch64/aarch64.md (predicated): Copy attr
On 20/11/2015 11:00, "Richard Biener" wrote:
>On Fri, Nov 20, 2015 at 10:24 AM, Alan Hayward
>wrote:
>> When vectorising a integer induction condition reduction,
>> is_nonwrapping_integer_induction ends up with different values for base
>> during the analysis and build phases. In the first it
Status
==
We plan to do a GCC 5.3 release candidate at the end of next week
followed by the actual release a week after that.
So now is the time to look at your regression bugs in bugzilla and
do some backporting for things already fixed on trunk.
Quality Data
Priority
[ was: Re: [PATCH, 10/16] Add pass_oacc_kernels pass group in passes.def ]
On 18/11/15 17:22, Bernhard Reutner-Fischer wrote:
Bonus points for fixing the dump_file to parse in:
>Parloops will fail because:
>...
>phi is n_2 = PHI
>arg of phi to exit: value n_4(D) used outside loop
>checking if
On Fri, Nov 20, 2015 at 7:53 AM, Richard Biener wrote:
>
> Status
> ==
>
> We plan to do a GCC 5.3 release candidate at the end of next week
> followed by the actual release a week after that.
>
> So now is the time to look at your regression bugs in bugzilla and
> do some backporting for thin
On 19 Nov 18:19, Richard Biener wrote:
> On November 19, 2015 6:12:30 PM GMT+01:00, Bernd Schmidt
> wrote:
> >On 11/19/2015 05:31 PM, Ilya Enkovich wrote:
> >> Currently we fold all memcpy/memmove calls with a known data size.
> >> It causes two problems when used with Pointer Bounds Checker.
> >
This patch to the Go frontend fixes the case where two different
methods on different types with the same method name both define a
type internally with the same name where the type requires a specific
type hash or equality function. Before this patch those functions
would get the same, causing a
On 20/11/15 11:37, Richard Biener wrote:
I'd rather make loop_optimizer_init do nothing
if requested flags are already set and no fixup is needed
Thus sth like
Index: gcc/loop-init.c
===
--- gcc/loop-init.c (revision 23064
On Fri, 20 Nov 2015, Tom de Vries wrote:
> On 20/11/15 11:37, Richard Biener wrote:
> >I'd rather make loop_optimizer_init do nothing
> > if requested flags are already set and no fixup is needed
>
> > Thus sth like
> >
> > Index: gcc/loop-init.c
> > =
Hello Kyrill,
On 20 Nov 12:15, Kyrill Tkachov wrote:
> >gcc/tessuite/
> > * c-c++-common/attr-simd-3.c: Put xfail (PR68158) on dg-error.
>
> This test fails on bare-metal targets that don't support -fcilkplus or
> -pthread.
> Would you consider moving them to the cilkplus testing directory or
On Fri, Nov 20, 2015 at 1:33 PM, Alan Hayward wrote:
>
>
> On 20/11/2015 11:00, "Richard Biener" wrote:
>
>>On Fri, Nov 20, 2015 at 10:24 AM, Alan Hayward
>>wrote:
>>> When vectorising a integer induction condition reduction,
>>> is_nonwrapping_integer_induction ends up with different values for
On Fri, Nov 20, 2015 at 2:08 PM, Ilya Enkovich wrote:
> On 19 Nov 18:19, Richard Biener wrote:
>> On November 19, 2015 6:12:30 PM GMT+01:00, Bernd Schmidt
>> wrote:
>> >On 11/19/2015 05:31 PM, Ilya Enkovich wrote:
>> >> Currently we fold all memcpy/memmove calls with a known data size.
>> >> It
On 11/19/2015 12:49 AM, Jeff Law wrote:
On 11/18/2015 12:16 PM, Bernd Schmidt wrote:
I don't think so, actually. One safe option would be to rip it out and
just stop transforming this case, but let's start by looking at the code
just a bit further down, calling noce_can_store_speculate. This was
On 20/11/2015 13:47, "Richard Biener" wrote:
>On Fri, Nov 20, 2015 at 1:33 PM, Alan Hayward
>wrote:
>>
>>
>>On 20/11/2015 11:00, "Richard Biener" wrote:
>>
>>>On Fri, Nov 20, 2015 at 10:24 AM, Alan Hayward
>>>wrote:
When vectorising a integer induction condition reduction,
is_nonwrap
This patch was pushed on binutils-gdb repo, so I also commit it on gcc.
Tristan.
2015-11-20 Tristan Gingold
Sync with binutils-gdb:
2015-11-20 Tristan Gingold
* configure.ac: Add aarch64-*-darwin* and arm-*-darwin*.
* configure: Regenerate.
Index: configu
On 20 Nov 14:54, Richard Biener wrote:
> On Fri, Nov 20, 2015 at 2:08 PM, Ilya Enkovich wrote:
> > On 19 Nov 18:19, Richard Biener wrote:
> >> On November 19, 2015 6:12:30 PM GMT+01:00, Bernd Schmidt
> >> wrote:
> >> >On 11/19/2015 05:31 PM, Ilya Enkovich wrote:
> >> >> Currently we fold all mem
Jim discovered that he needed to override the anchoring hook when using a PPC
host-side compiler, but didn't figure out why this was needed. Digging into it,
I discovered that flag_section_anchors is cleared in toplev.c by the command
line option machinery, if there are no anchor target hooks.
On 20/11/15 12:27, James Greenhalgh wrote:
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
2015-11-12 Evandro Menezes
[AArch64] Add attribute for compatibility with ARM pipeline models
gcc/
* config/aarch64
On 11/20/2015 01:23 PM, Richard Henderson wrote:
> On 11/20/2015 12:52 PM, Andreas Krebbel wrote:
>> +(define_insn "bswaphi2"
>> + [(set (match_operand:HI 0 "register_operand" "=d")
>> +(bswap:HI (match_operand:HI 1 "memory_operand" "RT")))]
>> + "TARGET_CPU_ZARCH"
>> + "lrvh\t%0
Dear All,
I have committed as 'obvious' revision 230661 to fix 2/3 submodule
problems. In the case of the third, PR68243, I believe gfortran is
behaving correctly and I am awaiting confirmation from the reporter.
Thanks to Dominique for regtesting the part of the patch that fixes PR66762.
I hav
On 20 Nov 14:31, Ilya Enkovich wrote:
> 2015-11-20 14:28 GMT+03:00 Richard Biener :
> > On Wed, Nov 18, 2015 at 2:53 PM, Ilya Enkovich
> > wrote:
> >> 2015-11-18 16:44 GMT+03:00 Richard Biener :
> >>> On Wed, Nov 18, 2015 at 12:34 PM, Ilya Enkovich
> >>> wrote:
> Hi,
>
> When we
On 10/11/15 17:32, Kyrill Tkachov wrote:
> Hi all,
>
> This ICE in this PR occurs when we're trying to split unaligned_loaddi into
> two SImode unaligned loads.
> The problem is in the addressing mode. When reload was picking the
> addressing mode we accepted an offset of
> -256 because the mod
On 11/11/15 16:10, Kyrill Tkachov wrote:
> Hi all,
>
> The attached testcase ICEs when compiled with -march=armv6k -mthumb -Os or
> any march
> for which -mthumb gives Thumb1:
> error: unrecognizable insn:
> }
> ^
> (insn 13 12 14 5 (set (reg:SI 116 [ x ])
> (unspec:SI [
>
On 11/19/2015 05:16 PM, Jason Merrill wrote:
On 11/19/2015 02:44 PM, Martin Sebor wrote:
On 11/18/2015 09:26 PM, Jason Merrill wrote:
The rs6000 target was hitting a bootstrap failure due to
-Werror=type-limits. Since warn_tautological_cmp and other warnings
avoid warning if one of the operand
On 11/20/2015 06:27 AM, James Greenhalgh wrote:
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
2015-11-12 Evandro Menezes
[AArch64] Add attribute for compatibility with ARM pipeline models
gcc/
* config/aar
On 11/20/2015 08:34 AM, Kyrill Tkachov wrote:
On 20/11/15 12:27, James Greenhalgh wrote:
On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
On 11/12/2015 09:39 AM, Evandro Menezes wrote:
2015-11-12 Evandro Menezes
[AArch64] Add attribute for compatibility with ARM pipe
[ was: Re: [PATCH] Fix parloops gimple_uid usage ]
On 09/10/15 23:09, Tom de Vries wrote:
@@ -2392,6 +2397,9 @@ gather_scalar_reductions (loop_p loop,
reduction_info_table_type *reduction_list
loop_vec_info simple_inner_loop_info = NULL;
bool allow_double_reduc = true;
+ if (!stmt_vec
Hmm, it looks like using expansion_point_if_in_system_header might avoid
the first issue you mention.
Thus.
Great, thanks! (I'll have to remember the trick for my own use!)
Martin
On Fri, Nov 20, 2015 at 09:55:29AM -0600, Evandro Menezes wrote:
> On 11/20/2015 06:27 AM, James Greenhalgh wrote:
> >On Thu, Nov 12, 2015 at 11:32:36AM -0600, Evandro Menezes wrote:
> >>On 11/12/2015 09:39 AM, Evandro Menezes wrote:
> >>2015-11-12 Evandro Menezes
> >>
> >>[AArch64] Add a
On 20/11/15 14:29, Richard Biener wrote:
I agree it's somewhat of an odd behavior but all passes should
either be placed in a sub-pipeline with an outer
loop_optimizer_init()/finalize () call or call both themselves.
Hmm, but adding loop_optimizer_finalize at the end of pass_lim breaks
the loo
Hi Kyrill
On 20/11/15 11:51, Kyrill Tkachov wrote:
Hi Andre,
On 18/11/15 09:44, Andre Vieira wrote:
On 17/11/15 10:10, James Greenhalgh wrote:
On Mon, Nov 16, 2015 at 01:15:32PM +, Andre Vieira wrote:
On 16/11/15 12:07, James Greenhalgh wrote:
On Mon, Nov 16, 2015 at 10:49:11AM +, An
On Thu, Nov 19, 2015 at 10:31:41AM -0700, Jeff Law wrote:
> On 11/18/2015 11:20 PM, Senthil Kumar Selvaraj wrote:
> >On Wed, Nov 18, 2015 at 09:36:21AM +0100, Richard Biener wrote:
> >>
> >>Otherwise ok.
> >
> >See modified patch below. If you think vrp98.c is unnecessary, feel free
> >to dump it :
On Tue, Nov 10, 2015 at 11:54:00AM -0600, Evandro Menezes wrote:
>2015-11-10 Evandro Menezes
>
>gcc/
>
>* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
>* config/aarch64/aarch64.md: Include "exynos-m1.md".
>* config/arm/arm-cores.def: Use the E
On Thu, Nov 19, 2015 at 04:06:17PM -0600, Evandro Menezes wrote:
> On 11/05/2015 06:09 PM, Evandro Menezes wrote:
> >2015-10-25 Evandro Menezes
> >
> > gcc/
> >
> > * config/aarch64/aarch64-cores.def: Use the Exynos M1 cost model.
> > * config/aarch64/aarch64.c (exynosm1_addrcost_ta
On 20 November 2015 at 16:10, Martin Sebor wrote:
>>> Hmm, it looks like using expansion_point_if_in_system_header might avoid
>>> the first issue you mention.
>>
>>
>> Thus.
>
>
> Great, thanks! (I'll have to remember the trick for my own use!)
I added this to https://gcc.gnu.org/wiki/Diagnosti
On 6 November 2015 at 10:39, Richard Biener wrote:
>> ../spec2000/benchspec/CINT2000/254.gap/src/polynom.c:358:11: error: location
>> references block not in block tree
>> l1_279 = PHI <1(28), l1_299(33)>
>
> ^^^
>
> this is the error to look at! It means that the GC heap will be corrupted
> quit
On Thu, 19 Nov 2015 21:21:51 +0100, Jan Kratochvil wrote:
> * python/hook.in: Call register_libstdcxx_printers.
> * python/libstdcxx/v6/__init__.py: Wrap it to
> register_libstdcxx_printers.
[...]
> -import libstdcxx.v6
> +# Call a function as a plain import would not execute body
On 11/20/2015 02:19 AM, Nick Clifton wrote:
Hi Jeff,
The code there would solve this problem, but the approach is is overly
cautious, since it disables the optimization for all extensions that
increase the number of hard registers used. Some of these will be
viable candidates, provided that th
On 11/20/2015 10:04 AM, Senthil Kumar Selvaraj wrote:
On Thu, Nov 19, 2015 at 10:31:41AM -0700, Jeff Law wrote:
On 11/18/2015 11:20 PM, Senthil Kumar Selvaraj wrote:
On Wed, Nov 18, 2015 at 09:36:21AM +0100, Richard Biener wrote:
Otherwise ok.
See modified patch below. If you think vrp98.c
On 20/11/15 08:31, Bin.Cheng wrote:
> On Thu, Nov 19, 2015 at 10:32 AM, Bin.Cheng wrote:
>> On Tue, Nov 17, 2015 at 6:08 PM, James Greenhalgh
>> wrote:
>>> On Tue, Nov 17, 2015 at 05:21:01PM +0800, Bin Cheng wrote:
Hi,
GIMPLE IVO needs to call backend interface to calculate costs for ad
On 20/11/15 18:28 +0100, Jan Kratochvil wrote:
On Thu, 19 Nov 2015 21:21:51 +0100, Jan Kratochvil wrote:
* python/hook.in: Call register_libstdcxx_printers.
* python/libstdcxx/v6/__init__.py: Wrap it to
register_libstdcxx_printers.
[...]
-import libstdcxx.v6
+# Call a f
On 11/19/2015 12:02 PM, Manuel López-Ibáñez wrote:
On 19 November 2015 at 17:54, Jeff Law wrote:
But there were a couple of patches from you some time ago, for
example: http://permalink.gmane.org/gmane.comp.gcc.patches/343476
What happened with those?
On hold pending fixing the type-limits w
On 20 November 2015 at 17:42, Jeff Law wrote:
> So we have to detangle the operand shortening from warning detection. Kai's
> idea was to first make the shortening code "pure" in the sense that it would
> have no side effects other than to generate the warnings. Canonicalization
> and other trans
On 11/20/2015 04:33 AM, Martin Liška wrote:
On 11/19/2015 06:43 PM, Pedro Alves wrote:
On 11/19/2015 12:54 PM, Martin Liška wrote:
ContinuationIndentWidth: 2
-ForEachMacros:
['_FOR_EACH','_FOR_EACH_1','FOR_EACH_AGGR_INIT_EXPR_ARG','FOR_EACH_ALIAS','FOR_EACH_ALLOCNO','FOR_EACH_ALLOCNO_OBJECT'
I merged trunk revision 230657 to the gccgo branch.
Ian
On Tue, Nov 17, 2015 at 4:22 AM, Richard Biener
wrote:
> On Tue, Nov 17, 2015 at 12:01 PM, H.J. Lu wrote:
>> Empty record should be returned and passed the same way in C and C++.
>> This patch adds LANG_HOOKS_EMPTY_RECORD_P for C++ empty class, which
>> defaults to return false. For C++, LANG_HO
On 11/20/2015 07:08 AM, Bernd Schmidt wrote:
BZ27313 is marked as fixed by the introduction of the tree cselim pass,
thus the problem won't even be seen at RTL level.
Cool.
I'm undecided on whether cs-elim is safe wrt the store speculation vs
locks concerns raised in the thread discussing Ian
On Fri, 20 Nov 2015 18:40:46 +0100, Jonathan Wakely wrote:
> The patch is OK for trunk and gcc-5-branch.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68448
trunk:
https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=230669
5.x:
https://gcc.gnu.org/viewcvs/gcc?view=revision&revisi
On Wed, Dec 10, 2014 at 01:48:21 +0300, Ilya Verbin wrote:
> On 09 Dec 14:59, Richard Biener wrote:
> > On Mon, 8 Dec 2014, Ilya Verbin wrote:
> > > Unfortunately, this fix was not general enough.
> > > There might be cases when mixed object files get into lto-wrapper, ie
> > > some of
> > > them
On 11/20/2015 05:15 AM, Kyrill Tkachov wrote:
Hi Kirill,
On 18/11/15 14:11, Kirill Yukhin wrote:
Hello Andreas, Devid.
On 18 Nov 10:45, Andreas Schwab wrote:
Kirill Yukhin writes:
diff --git a/gcc/testsuite/c-c++-common/attr-simd.c
b/gcc/testsuite/c-c++-common/attr-simd.c
new file mode 100
In this bug, we hit the (A & sign-bit) != 0 -> A < 0 transformation.
Because of delayed folding, the operands aren't fully folded yet, so we
have NOP_EXPRs around INTEGER_CSTs, and so calling wi::only_sign_bit_p
ICEs. We've been seeing several similar bugs, where code calls
integer_zerop and t
Hi!
node->get_body () can run various IPA passes and ggc_collect in them, so
it is undesirable to hold pointers to GC memory in automatic vars over it.
While I could store those vars (clone_info, clone and id) into special GTY
vars just to avoid collecting them, it seems easier to call node->get_b
Hi!
If C/C++ array section reductions have non-zero (positive) bias, it is
implemented by declaring a smaller private array and subtracting the bias
from the start of the private array (because valid code may only dereference
elements from bias onwards). But, this isn't something that is kosher i
On Thu, Nov 19, 2015 at 04:58:36PM -0800, Steve Kargl wrote:
>
> 2015-11-19 Steven G. Kargl
>
> * intrinsic.h: Prototype for gfc_simplify_cshift
> * intrinsic.c (add_functions): Use gfc_simplify_cshift.
> * simplify.c (gfc_simplify_cshift): Implement simplification of CSHIFT.
Hi!
This patch fixes ICE where a parameter mentioned in a debug source bind
has its VLA type mistakenly remapped and that leads to inconsistent type
between the PARM_DECL and SSA_NAMEs derived from it.
The patch Tom posted for this can't work, because we assume that the
s=> value as well as debug
The attached patch fixes some more places in c/c-parser.c where the
src_range field of a c_expr was being left uninitialized, this time for
various Objective C constructs.
The source ranges are verified using the same unit-testing plugin used
for C expressions. This leads to a wart, which is that
On 11/20/2015 02:58 PM, Jason Merrill wrote:
OK if testing passes?
Which it did.
Jason
This patch from Lynn Boger fixes the go tool shipped with gccgo to use
the correct tool directory. It also fixes the 'go tool' output to
only list known tools. Bootstrapped and ran Go testsuite on
x86_64-pc-linux-gnu. Committed to mainline and GCC 5 branch.
Ian
Index: gcc/go/gofrontend/MERGE
==
On 11/20/2015 02:19 AM, Nick Clifton wrote:
Hi Jeff,
The code there would solve this problem, but the approach is is overly
cautious, since it disables the optimization for all extensions that
increase the number of hard registers used. Some of these will be
viable candidates, provided that th
This just moves the VIS3 mulx patterns to a more appropriate place.
Tested on SPARC/Solaris, applied on the mainline.
2015-11-20 Eric Botcazou
* config/sparc/sparc.md (umulxhi_vis): Move around.
(*umulxhi_sp64): Likewise.
(umulxhi_v8plus): Likewise.
(xmulx_vis
On 11/20/2015 11:17 AM, James Greenhalgh wrote:
On Tue, Nov 10, 2015 at 11:54:00AM -0600, Evandro Menezes wrote:
2015-11-10 Evandro Menezes
gcc/
* config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model.
* config/aarch64/aarch64.md: Include "exynos-m1.md".
> I would hazard a guess that the authors simply didn't consider the
> multi-hard reg case. Essentially if the original set reached an
> extension, then obviously the original set got there unharmed and the
> extended destination should reach as well -- except that doesn't apply
> to multi-word ha
On Nov 16, 2015, at 6:02 AM, Renlin Li wrote:
> On 14/11/15 00:33, David Edelsohn wrote:
>> No RISC architecture can store directly to MEM, so the expected RTL in
>> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This
>> probably should be disabled for ARM and other RISC architect
On 11/20/2015 01:52 PM, H.J. Lu wrote:
On Tue, Nov 17, 2015 at 4:22 AM, Richard Biener
wrote:
On Tue, Nov 17, 2015 at 12:01 PM, H.J. Lu wrote:
Empty record should be returned and passed the same way in C and C++.
This patch adds LANG_HOOKS_EMPTY_RECORD_P for C++ empty class, which
defaults to
On 11/18/2015 07:15 AM, Nick Clifton wrote:
Hi Guys,
I recently discovered a bug in the current Redundant Extension
Elimination optimization. If the candidate extension instruction
increases the number of hard registers used, the pass does not check
to see if these extra registers a
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