Re: [PATCH, alpha]: Remove dead (HOST_BITS_PER_WIDE_INT < 64) code

On Fri, May 8, 2015 at 10:23 PM, Richard Henderson wrote: > On 05/08/2015 09:43 AM, Uros Bizjak wrote: >> @@ -1509,8 +1509,7 @@ >> (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r") >> (match_operand:DI 2 "mul8_operand" "I")) >> (match_opera

Re: Fwd: [PING 2][PATCH] libgcc: Add CFI directives to the soft floating point support code for ARM

On 10/05/15 23:16, Martin Galvan wrote: Hi Ramana! Sorry to bother, but I looked at the repository and didn't see this committed. As I don't have write access could you please commit this for me? Thanks a lot! sorry about the slow response, I was travelling for a bit and missed your emails

Re: [PATCH][PR66010] Don't take address of ap unless necessary

On Fri, 8 May 2015, Tom de Vries wrote: > Hi, > > this patch fixes PR66010. > > > I. > > Consider this test-case, with a va_list passed from f2 to f2_1: > ... > #include > > inline int __attribute__((always_inline)) > f2_1 (va_list ap) > { > return va_arg (ap, int); > } > > int > f2 (int

Re: [PATCH][PR66013] Update address_taken after ifn_va_arg expansion

On Fri, May 8, 2015 at 9:16 PM, Tom de Vries wrote: > On 08-05-15 17:31, Richard Biener wrote: >>> >>> >OK for trunk? >> >> As noted in one of the PRs I think that it is the proper time to >> re-implement the stdarg optimization on the un-lowered form which >> should also fix this. > > > AFAIU, th

Re: [C frontend] Fix construction of TYPE_STUB_DECL

On Sun, May 10, 2015 at 7:33 PM, Jan Hubicka wrote: > Hi, > TREE_PUBLIC of TYPE_DECL is defined to say if the type is public: > /* In a VAR_DECL, FUNCTION_DECL, NAMESPACE_DECL or TYPE_DECL, >nonzero means name is to be accessible from outside this translation unit. >In an IDENTIFIER_NODE,

Re: [patch 0/10] debug-early merge

Hi Aldy, On 08/05/15 01:30, Aldy Hernandez wrote: Hi folks. I have divided the patches into 10 pieces. The patches are interdependent and cannot be applied independently. I am merely dividing them up to aid the relevant reviewers. As I've mentioned elsewhere, the patchset as posted has been

Re: [rs6000] Fix compare debug failure on AIX

> I'm sorry that XCOFF debugging changes the generated code (only in the > sense of allocating a frame), but that is a system dependency. It's > been this way for over 20 years. I see no reason to produce worse > code at -O0 when not debugging simply to make testcases happier. You apparently rea

Re: [PATCH, ARM] attribute target (thumb,arm) [3/6] respin (4th)

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PR 66076: invalid vec_grow in rtx iterators

The rtx iterators start out using a stack worklist but fall back to a heap worklist if the stack one turns out to be too small (which is rare). PR 66076 showed up a bug in the code that makes the switch from the stack worklist to the heap worklist: the heap one might already have been allocated if

Fix pattern validation in genrecog

Thomas pointed out that, while I'd kept the code to validate patterns for things like missing modes, the code wasn't being used. Fixed with the patch below. I ended up reinstating the original code to create a single rtx pattern for a define_peephole2 sequence, so that it could be passed to valid

Re: [PATCH, ARM] attribute target (thumb,arm) [1/6] respin (4th)

OK with those changes. Ramana thanks, done following up the thumb_code cleanup, here is a missing chunk for the vxworks config. arm-vxworks build checked. ok for trunk ? thanks, Christian 2015-05-11 Christian Bruel * config/arm/arm-protos.h (thumb_code, thumb1_code): Remove.

Re: PR 66076: invalid vec_grow in rtx iterators

> gcc/ > PR rtl-optimization/66076 > * rtlanal.c (generic_subrtx_iterator ::add_single_to_queue): > Don't grow the heap array if it is already big enough from a > previous iteration. > > gcc/testsuite/ > PR rtl-optimization/66076 > * gcc.dg/torture/pr66076.c: Ne

Re: [PATCH][expr.c] PR 65358 Avoid clobbering partial argument during sibcall

On 01/05/15 19:51, Jeff Law wrote: On 04/28/2015 03:54 AM, Kyrill Tkachov wrote: On 27/04/15 21:13, Jeff Law wrote: On 04/21/2015 11:33 AM, Kyrill Tkachov wrote: On 21/04/15 15:09, Jeff Law wrote: On 04/21/2015 02:30 AM, Kyrill Tkachov wrote: From reading config/stormy16/stormy-abi it s

[PATCH, ARM] Fix testcase for PR64616

Hi, Testcase made for PR64616 was only passing when using a litteral pool. Rather than having an alternative for systems where this is not true, this patch changes the test to check that a global copy propagation occurs in cprop2. This should work accross all ARM targets (it works when targetti

Re: [PATCH, ARM] Fix testcase for PR64616

On Mon, May 11, 2015 at 10:43 AM, Thomas Preud'homme wrote: > Hi, > > Testcase made for PR64616 was only passing when using a litteral pool. Rather > than having an alternative for systems where this is not true, this patch > changes the test to check that a global copy propagation occurs in cpr

Re: [PATCH, ARM] attribute target (thumb,arm) [1/6] respin (4th)

On Mon, May 11, 2015 at 10:13 AM, Christian Bruel wrote: >> >> >> OK with those changes. >> >> >> >> Ramana >> > > thanks, done > > following up the thumb_code cleanup, here is a missing chunk for the vxworks > config. > > arm-vxworks build checked. ok for trunk ? > > thanks, > > Christian OK th

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On 09/05/15 19:57, Szabolcs Nagy wrote: > * H.J. Lu [2015-05-09 10:41:41 -0700]: >> There are >> >> 4: 2b70 806 FUNCGLOBAL DEFAULT 12 >> __cpu_indicator_init@GCC_4.8.0 >> 38: 002153d016 OBJECT GLOBAL DEFAULT 25 >> __cpu_model@GCC_4.8.0 >> >> and >> >>

Re: [PATCH, ARM] committed: attribute target (thumb,arm) [1/6] respin (4th)

here the p1 patch committed at rev 222995 On 05/11/2015 11:56 AM, Ramana Radhakrishnan wrote: On Mon, May 11, 2015 at 10:13 AM, Christian Bruel wrote: OK with those changes. Ramana thanks, done following up the thumb_code cleanup, here is a missing chunk for the vxworks config. arm-v

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On Mon, May 11, 2015 at 11:20:15AM +0100, Szabolcs Nagy wrote: > > > On 09/05/15 19:57, Szabolcs Nagy wrote: > > * H.J. Lu [2015-05-09 10:41:41 -0700]: > >> There are > >> > >> 4: 2b70 806 FUNCGLOBAL DEFAULT 12 > >> __cpu_indicator_init@GCC_4.8.0 > >> 38: 002

Re: [patch 0/10] debug-early merge

Perfect. Thanks for doing this. Aldy On May 11, 2015 4:23 AM, Kyrill Tkachov wrote: > > Hi Aldy, > > On 08/05/15 01:30, Aldy Hernandez wrote: > > Hi folks. > > > > I have divided the patches into 10 pieces.  The patches are > > interdependent and cannot be applied independently.  I am merel

Re: [Patch, Fortran, 66035, v1] [5/6 Regression] gfortran ICE segfault

Hi Mikael, > > diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c > > index cf607d0..402d9b9 100644 > > --- a/gcc/fortran/trans-expr.c > > +++ b/gcc/fortran/trans-expr.c > > @@ -6881,6 +6881,30 @@ alloc_scalar_allocatable_for_subcomponent_assignment > > (stmtblock_t *block, TREE_TYPE

Re: [C frontend] Fix construction of TYPE_STUB_DECL

> On Sun, May 10, 2015 at 7:33 PM, Jan Hubicka wrote: > > Hi, > > TREE_PUBLIC of TYPE_DECL is defined to say if the type is public: > > /* In a VAR_DECL, FUNCTION_DECL, NAMESPACE_DECL or TYPE_DECL, > >nonzero means name is to be accessible from outside this translation > > unit. > >In an

Re: [PATCH][MIPS] Enable load-load/store-store bonding

On Tuesday 21 April 2015 12:39 AM, Matthew Fortune wrote: Sameera Deshpande writes: Gentle reminder! Thanks Sameera. Just a couple of comments inline below and a question for Catherine at the end. - Thanks and regards, Sameera D. On Monday 30 March 2015 04:58 PM, sameera wrote: Hi! S

Re: [patch, libgomp] Re-factor GOMP_MAP_POINTER handling

Ping. On 2015/4/21 08:21 PM, Chung-Lin Tang wrote: > Hi, > while investigating some issues in the variable mapping code, I observed > that the GOMP_MAP_POINTER handling is essentially duplicated under the PSET > case. > This patch abstracts and unifies the handling code, basically just a cleanup

Re: PATCHes to help with C++11 bootstrap

On 2015.05.08 at 23:30 -0500, Jason Merrill wrote: > One C++11 compatibility issue that turns up a lot in the GCC sources is > that in C++98, > > #define BAR "bar" > const char *p = "foo"BAR; There was a missing fix for gcc/config/rs6000/option-defaults.h. This broke bootstrap on ppc64. Fix com

Fix verify_type ICE on TYPE_METHOS

Jason, this patch is trying to fix the following verify_type_ice that check that TYPE_METHODS is same for main variant and all its complete variants. - /* FIXME: this check triggers during libstdc++ build that is a bug. - It affects non-LTO debug output only, because free_lang_data clears -

Re: [PATCH] Expand PIC calls without PLT with -fno-plt

Hi, On Wed, 6 May 2015, Rich Felker wrote: > I don't see how this case is improved unless GCC is failing to consider > strong definitions in the same TU as locally-binding. Interposition of non-static non-inline non-weak symbols is supported independend of if they are defined in the same TU or

[Patch][loop-invariant.c] Fix a couple of bugs regarding loop invariant motion discovered by spec2k6 on aarch64

Hi, This patch fixes a couple of issues I saw during the compilation of shell_lam.f for 410.bwaves test in spec2006: * create_new_invariant: We shouldn't bother attempting to calculate the address cost for something that clearly isn't an address. Use a SCALAR_INT_MODE_P check to eliminate the mos

RE: [PATCH][MIPS] Enable load-load/store-store bonding

Hi Sameera, Sameera Deshpande writes: > Changelog: > gcc/ > * config/mips/mips.md (JOIN_MODE): New mode iterator. > (join2_load_Store): New pattern. > (join2_loadhi): Likewise. > (define_peehole2): Add peephole2 patterns to join 2 > HI/SI/SF/DF-mode >

[patch, fortran] pr66100 bound simplification refactoring fallout

Hello, This fixes a regression introduced by my bound simplification refactoring at https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00843.html The assert was introduced in the change above and checks that the refactoring didn't lose anything regarding the condition used in the existing code. The con

Re: [PATCH][MIPS] Enable load-load/store-store bonding

On Monday 11 May 2015 05:43 PM, Matthew Fortune wrote: Hi Sameera, Sameera Deshpande writes: Changelog: gcc/ * config/mips/mips.md (JOIN_MODE): New mode iterator. (join2_load_Store): New pattern. (join2_loadhi): Likewise. (define_peehole2): Add peephole2

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On 11/05/15 11:31, Jakub Jelinek wrote: > On Mon, May 11, 2015 at 11:20:15AM +0100, Szabolcs Nagy wrote: >>> i think it might be enough to add __cpu_indicator_init_local >>> as an alias to __cpu_indicator_init in libgcc.a and then use >>> the *_local symbol from the ifunc resolver, that way no new

[PATCH] libiberty: cleanup Makefile.in

* maint-tool: Refactor pic/ and noasan/ handling. * Makefile.in: Likewise. Regenerate dependencies. --- It's hard to see which parts of libiberty get built with which flags due to the current way the checks for pic and noasan are performed. So push this decision to make(1). For t

Re: [PATCH] Fix memory leak in C++ pretty printer

On 11/05/15 03:34, Patrick Palka wrote: In gcc/cp/error.c we initialize the C++ pretty printer object twice: first during statics initialization and later in a placement-new in init_error(). This double-initialization causes a memory leak of about 7kb according to valgrind. I don't see a reason

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On Mon, May 11, 2015 at 01:39:17PM +0100, Szabolcs Nagy wrote: > fyi, musl loader loads libstdc++ just fine because it has no But will it load any shared library that uses any of the 26 (if I count well on x86_64) @ symbols from libstdc++.so.6? readelf -Ws /lib64/libstdc++.so.6 | grep '@' | grep -

[PATCH] combine: Don't create (set (reg:CC) (compare (reg:CC) (const0)))

There already was code to just use the original reg:CC, but it was positioned incorrectly: if the original code (that this RTL is simplified from) did not already start with a COMPARE (or not in the right mode), it didn't trigger. But it is valid in that case as well. This then allows merging the

Re: [Patch, Fortran] Simplify lbound

Le 11/05/2015 00:08, Thomas Koenig a écrit : > Am 10.05.2015 um 22:43 schrieb H.J. Lu: > >>> Here is what I have committed. >>> >> >> It caused: >> >> /export/gnu/import/git/sources/gcc/gcc/testsuite/gfortran.dg/inline_matmul_3.f90:38:39: >> Error: Variable 'c1' cannot appear in the expression at

Re: [RFC 0/6] Flags outputs for asms

On Fri, May 08, 2015 at 01:15:25PM -0700, Richard Henderson wrote: > But it *does* try to match an intermediate pattern, > > (set (reg:CCGC 17 flags) > (compare:CCGC (reg:CCGC 17 flags) > (const_int 0 [0]))) Patch posted at .

[PATCH 03/13] S/390 Fix secondary reload issue with store/load relative operands.

We need a scratch register for loading from or storing to a symbolic memory reference where we cannot use the load/store relative instructions for. However, the check currently fails to handle floating point modes in GPRs correctly. gcc/ * config/s390/s390.c (s390_secondary_reload): Fix c

[PATCH 01/13] recog: Increased max number of alternatives.

With the vector facility support z13 mov patterns have more than 30 alternatives. gcc/ * recog.h: Increase MAX_RECOG_ALTERNATIVES. --- gcc/recog.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/recog.h b/gcc/recog.h index 8a38b26..4d8ca0c 100644 --- a/gcc/recog

[PATCH 00/13] S/390 Implement support for IBM z13

The attached patchset adds support for the IBM z13 machine to the GCC S/390 backend. The machine has been announced recently: http://www-03.ibm.com/press/us/en/pressrelease/45808.wss IBM z/Architecture Principles of Operation http://publibfi.boulder.ibm.com/epubs/pdf/dz9zr010.pdf The required Bi

[PATCH 04/13] S/390 Add -march/-mtune=z13 option.

gcc/ * common/config/s390/s390-common.c (processor_flags_table): Add z13. * config.gcc: Add z13. * config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_2964_Z13. * config/s390/s390.c (s390_adjust_priority): Check for PROCESSOR_2964_Z13

[PATCH 07/13] S/390 Add vector scalar instruction support.

With this patch GCC makes use of the vector instruction which are available in single element mode. By using these instructions scalar double operations can use 32 registers. gcc/ * config/s390/s390-modes.def: Add new modes CCVEQ, CCVFH, and CCVFHE. * config/s390/s390.c (s

[PATCH 02/13] optabs: Fix vec_perm -> V16QI middle end lowering.

The current implementation re-uses the location of the selection pattern to generate a new one. This fails if the pattern resides in a read-only location. With the patch a new temporary register is allocated for that purpose. gcc/ * optabs.c (expand_vec_perm): Allocate a temp reg for the

[RFC 12/13] S/390 Vector ABI GNU Attribute.

With this patch .gnu_attribute is used to mark binaries with a vector ABI tag. This is required since the z13 vector support breaks the ABI of existing vector_size attribute generated vector types: 1. vector_size(16) and bigger vectors are aligned to 8 byte boundaries (formerly vectors were alway

[PATCH 10/13] Testsuite These testcases require disabling hardware vector support on S/390.

gcc/testsuite/ * gcc.dg/tree-ssa/gen-vect-11b.c: Disable vector instructions on s390*. * gcc.dg/tree-ssa/gen-vect-11c.c: Likewise. --- gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c |1 + gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c |1 + 2 files changed, 2 insertio

[PATCH 11/13] Testsuite S/390 vector types are only 8 byte aligned.

gcc/testsuite/ * lib/target-supports.exp: Vector do not always have natural alignment on s390*. --- gcc/testsuite/lib/target-supports.exp |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-sup

[PATCH 13/13] S/390 Invalid vector binary ops

This is a first try to implement at least some of the requirements regarding the vector bool type documented for IBM XLC. With this patch error messages will be issued for invalid uses of vector bool types in binary operators. vector bool types are being marked opaque in order to prevent the fron

[PATCH 09/13] S/390 Add zvector testcases.

gcc/testsuite/ * gcc.target/s390/zvector/vec-dbl-math-compile-1.c: New test. * gcc.target/s390/zvector/vec-genbytemask-1.c: New test. * gcc.target/s390/zvector/vec-genmask-1.c: New test. * gcc.target/s390/zvector/vec-lcbb-1.c: New test. * gcc.target/s390/zvec

[PATCH 06/13] Vector base support - testcases

gcc/testsuite/ * gcc.target/s390/s390.exp (check_effective_target_vector): New check. * gcc.target/s390/vector/vec-abi-1.c: New test. * gcc.target/s390/vector/vec-abi-2.c: New test. * gcc.target/s390/vector/vec-abi-3.c: New test. * gcc.target/s390/vec

[PATCH 05/13] S/390 Vector base support.

gcc/ * config/s390/constraints.md (j00, jm1, jxx, jyy, v): New constraints. * config/s390/predicates.md (const0_operand, constm1_operand) (constable_operand): Accept vector operands. * config/s390/s390-modes.def: Add supported vector modes. * config/s

Re: [PATCH] Fix memory leak in C++ pretty printer

On 11/05/15 03:34, Patrick Palka wrote: In gcc/cp/error.c we initialize the C++ pretty printer object twice: first during statics initialization and later in a placement-new in init_error(). This double-initialization causes a memory leak of about 7kb according to valgrind. I don't see a reason

[PATCH 08/13] S/390 zvector builtin support.

With this patch GCC implements an Altivec style set of builtins to make use of vector instructions in C/C++ code. This is provided for compatibility with the IBM XL compiler. gcc/ * config.gcc: Add vecintrin.h to extra_headers. Add s390-c.o to c_target_objs and cxx_target_objs.

Re: [PATCH 01/13] recog: Increased max number of alternatives.

On Mon, May 11, 2015 at 03:23:29PM +0200, Andreas Krebbel wrote: > With the vector facility support z13 mov patterns have more than 30 > alternatives. Wow, that is a lot! > --- a/gcc/recog.h > +++ b/gcc/recog.h > @@ -23,7 +23,7 @@ along with GCC; see the file COPYING3. If not see > /* Random nu

Re: [patch] Perform anonymous constant propagation during inlining

> >Would you be OK with a slight variation of your earlier idea, i.e. > >calling fold_stmt with a specific valueizer from fold_marked_statements > >instead of the implicit no_follow_ssa_edges in the inliner? Something > >like: > > > >tree > >follow_anonymous_single_use_edges (tree val) > >{ > > >

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On Mon, May 11, 2015 at 12:31:51PM +0200, Jakub Jelinek wrote: > On Mon, May 11, 2015 at 11:20:15AM +0100, Szabolcs Nagy wrote: > > > > > > On 09/05/15 19:57, Szabolcs Nagy wrote: > > > * H.J. Lu [2015-05-09 10:41:41 -0700]: > > >> There are > > >> > > >> 4: 2b70 806 FUNCG

Re: [PATCH] Expand PIC calls without PLT with -fno-plt

On Mon, May 11, 2015 at 01:48:03PM +0200, Michael Matz wrote: > Hi, > > On Wed, 6 May 2015, Rich Felker wrote: > > > I don't see how this case is improved unless GCC is failing to consider > > strong definitions in the same TU as locally-binding. > > Interposition of non-static non-inline non-w

C PATCH for -Wshift-negative-value (PR c/66066)

The -Wshift-negative-value patch caused grief since it breaks building some programs. The following patch should alleviate the pain a bit: mark a left shift of a negative value as non-const only if pedantic. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2015-05-11 Marek Polacek

False ODR violation positives on anonymous namespace types

Jason, I got my firefox tree building again and noticed that my patch to enable ODR merging on non-class types caused false positives: /aux/hubicka/trunk-install/include/c++/6.0.0/ext/new_allocator.h:66:26: warning: type ‘(anonymous namespace)::ObservationWithStack const&’ violates one definitio

Re: [PATCH 01/13] recog: Increased max number of alternatives.

On 05/11/2015 04:01 PM, Segher Boessenkool wrote: > On Mon, May 11, 2015 at 03:23:29PM +0200, Andreas Krebbel wrote: >> With the vector facility support z13 mov patterns have more than 30 >> alternatives. > > Wow, that is a lot! > >> --- a/gcc/recog.h >> +++ b/gcc/recog.h >> @@ -23,7 +23,7 @@ alo

[wwwdocs] Update changes.html

Ok to commit? Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v retrieving revision 1.3 diff -u -r1.3 changes.html --- changes.html6 May 2015 09:55:29 - 1.3 +++ changes.html11 May

Re: C PATCH for -Wshift-negative-value (PR c/66066)

On 11/05/15 16:21, Marek Polacek wrote: The -Wshift-negative-value patch caused grief since it breaks building some programs. The following patch should alleviate the pain a bit: mark a left shift of a negative value as non-const only if pedantic. Either this is not correct according to the gu

Re: [PATCH][PR66010] Don't take address of ap unless necessary

On 11-05-15 09:47, Richard Biener wrote: Bootstrapped and reg-tested on x86_64, with and without -m32. > >OK for trunk? > >[ FWIW, I suspect this patch will make life easier for the reimplementation of >the pass_stdarg optimization using ifn_va_arg. ] + if (canon_va_type != NULL) +{ +

Re: [PATCH 4/6] rs6000: Delete some now-superfluous zero_ext{end,ract} patterns

On Sun, May 10, 2015 at 12:13 PM, Segher Boessenkool wrote: > After the change to combine, we no longer need all the special-case > patterns. > > Tested on powerpc64-linux, as usual. As mentioned with the combine > patch, there are no differences to generated code in cc1. > > This does not delete

Re: [PATCH 5/6] rs6000: Don't use gen_rlwinm

On Sun, May 10, 2015 at 12:13 PM, Segher Boessenkool wrote: > The next patch will rename the "rlwinm" pattern (as well as the other patterns > that implement rlwinm, now unnamed). The only place that uses gen_rlwinm > (an expander) is better off expanding the separate operations separately. > Do

Re: PATCH] PR target/65612: Multiversioning doesn't work with DSO nor PIE

On 11/05/15 14:05, Jakub Jelinek wrote: > On Mon, May 11, 2015 at 01:39:17PM +0100, Szabolcs Nagy wrote: >> fyi, musl loader loads libstdc++ just fine because it has no > > But will it load any shared library that uses any of the 26 (if I count well > on x86_64) @ symbols from libstdc++.so.6? i

Re: [PATCH 6/6] rs6000: Clean up the various rlwinm patterns

On Sun, May 10, 2015 at 12:13 PM, Segher Boessenkool wrote: > Some cleanups: > > * Give every define_insn a name; > * Add missing conditions for some of the dot forms; > * Use define_insn_and_split to reduce duplication; > * Renumber operands so 0,1,2,3 are the actual operands of the machine > i

Re: [PATCH 3/6] rs6000: Don't use zero_extract in the bswap:HI splitter

On Sun, May 10, 2015 at 12:13 PM, Segher Boessenkool wrote: > The next patch removes the zero_extract insn this splits to. Write > it as (and (lshiftrt ... instead. > > Okay for trunk? > > > Segher > > > 2015-05-10 Segher Boessenkool > > * config/rs6000/rs6000.md (define_split for bswa

Re: C PATCH for -Wshift-negative-value (PR c/66066)

On Mon, May 11, 2015 at 05:09:26PM +0200, Manuel López-Ibáñez wrote: > On 11/05/15 16:21, Marek Polacek wrote: > >The -Wshift-negative-value patch caused grief since it breaks building > >some programs. The following patch should alleviate the pain a bit: mark > >a left shift of a negative value a

[Ping] [C++ Patch] PR 61683

Hi, pinging this... On 04/30/2015 01:56 AM, Paolo Carlini wrote: Hi, this seems pretty straightforward given the grammar. Tested x86_64-linux. https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01948.html Paolo.

[patch, MIPS, testsuite] Fix gcc.target/mips/branch-1.c

The test gcc.target/mips/branch-1.c has started failing because it is trying to verify that each of 4 functions generates and 'andi' instruction and only finding 2 of them. With a recent change (fixing PR 65150) GCC determined that the f1 and f2 functions generate identical code and that the f3 an

Re: C PATCH for -Wshift-negative-value (PR c/66066)

On 2015.05.11 at 17:54 +0200, Marek Polacek wrote: > On Mon, May 11, 2015 at 05:09:26PM +0200, Manuel López-Ibáñez wrote: > > On 11/05/15 16:21, Marek Polacek wrote: > > >The -Wshift-negative-value patch caused grief since it breaks building > > >some programs. The following patch should alleviate

RE: [patch, MIPS, testsuite] Fix gcc.target/mips/branch-1.c

> -Original Message- > From: Steve Ellcey [mailto:sell...@imgtec.com] > Sent: Monday, May 11, 2015 12:02 PM > To: gcc-patches@gcc.gnu.org > Cc: matthew.fort...@imgtec.com; Moore, Catherine > Subject: [patch, MIPS, testsuite] Fix gcc.target/mips/branch-1.c > > The test gcc.target/mips/bra

Re: [wwwdocs] Update changes.html

Hi Marek, On Mon, 11 May 2015, Marek Polacek wrote: > Ok to commit? as maintainer I am happy for you to commit documentation/web changes without approval, though I am also happy to review. > +General Optimizer Improvements > + > +UndefinedBehaviorSanitizer gained a new sanitization option:

Re: [PATCH i386] PR65753: allow PIC tail calls via function pointers

On Sun, 10 May 2015, Jan Hubicka wrote: > You probably need to update comment here. I wonder what happens when we > optimize > indirect call to direct call to global function at RTL level? I suppose we are > safe here, because at RTL level we explicitly represent if we refer to PLT > entry > or t

Re: [wwwdocs] Update changes.html

On Mon, May 11, 2015 at 06:04:48PM +0200, Gerald Pfeifer wrote: > Hi Marek, > > On Mon, 11 May 2015, Marek Polacek wrote: > > Ok to commit? > > as maintainer I am happy for you to commit documentation/web changes > without approval, though I am also happy to review. I was hoping you could glance

libgo patch committed: Fix runtime/pprof test when libgo compiled with -O0

The runtime/pprof package builds stack traces that skip runtime functions. When libgo is compiled with -O0, the function profilealloc appears on the stack trace, but the package doesn't know to skip it. Rename the function so that it is skipped. This lets the runtime/pprof test pass when libgo is

Re: [PATCH i386] Move CLOBBERED_REGS earlier in register class list

On Sun, 10 May 2015, Uros Bizjak wrote: > On Sun, May 10, 2015 at 7:51 PM, Uros Bizjak wrote: > > On Sun, May 10, 2015 at 6:44 PM, Jan Hubicka wrote: > >>> On 32-bit x86, register class CLOBBERED_REGS is a proper subset of > >>> LEGACY_REGS, which causes IRA not to consider it separately for regi

Re: [PATCH i386] Move CLOBBERED_REGS earlier in register class list

On Mon, May 11, 2015 at 6:25 PM, Alexander Monakov wrote: >> >>> LEGACY_REGS, which causes IRA not to consider it separately for register >> >>> allocation, even when it has lower cost than other classes. This patch >> >>> is >> >>> useful to fix code generation problem that appears with no-PLT

[gomp4] Next set of OpenACC changes

Hi! On Tue, 05 May 2015 10:54:02 +0200, I wrote: > In follow-up messages, I'll be posting the separated parts (for easier > review) of a next set of OpenACC changes that we'd like to commit. > ChangeLog updates not yet written; will do that before commit, obviously. In order for us to be able to

[PATCH, i386]: Use insn PATTERN when looking for memory_references in ix86_loop_unroll_adjust

Hello! 2015-05-11 Uros Bizjak * config/i386/i386.c (ix86_loop_unroll_adjust): Use PATTERN (insn) when looking for memory references. Tested on x86_64-linux-gnu {,-m32} and committed to mainline SVN. Uros. Index: config/i386/i386.c =

Re: [wwwdocs] Update changes.html

On Mon, 11 May 2015, Marek Polacek wrote: > Is the following any better? Thanks, Yes, this looks fine. (I admit that "flexible array member-like arrays" confused me a bit, but that's probably me not fully getting standards language. ;-) Gerald

Re: [PATCH][MIPS] Enable load-load/store-store bonding

On May 11, 2015, at 4:05 AM, sameera wrote: >>> +(define_insn "*join2_loadhi" >>> + [(set (match_operand:SI 0 "register_operand" "=r") >>> + (any_extend:SI (match_operand:HI 1 "non_volatile_mem_operand" "m"))) >>> + (set (match_operand:SI 2 "register_operand" "=r") >>> + (any_extend:SI (mat

Re: Remove mode argument from gen_rtx_SET

> What I was confused about is that the first set isn't valid rtl. > The SET_SRC and SET_DEST always have to have the same mode > (or VOIDmode in the case of a CONST_INT, etc., where the mode > is implicitly the same as the SET_DEST). So wouldn't it have > to be: > > (set (reg:SI 1) >(

Re: [PATCH 01/13] recog: Increased max number of alternatives.

On 05/11/2015 07:23 AM, Andreas Krebbel wrote: With the vector facility support z13 mov patterns have more than 30 alternatives. gcc/ * recog.h: Increase MAX_RECOG_ALTERNATIVES. --- gcc/recog.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/recog.h b/gcc/re

Re: [PATCH 10/13] Testsuite These testcases require disabling hardware vector support on S/390.

On 05/11/2015 07:23 AM, Andreas Krebbel wrote: gcc/testsuite/ * gcc.dg/tree-ssa/gen-vect-11b.c: Disable vector instructions on s390*. * gcc.dg/tree-ssa/gen-vect-11c.c: Likewise. Fine with me. Seems to me that generally adding a clause like this to a test ought to fall

Re: [PATCH 11/13] Testsuite S/390 vector types are only 8 byte aligned.

On 05/11/2015 07:23 AM, Andreas Krebbel wrote: gcc/testsuite/ * lib/target-supports.exp: Vector do not always have natural alignment on s390*. OK. jeff

Re: [PATCH 08/13] S/390 zvector builtin support.

On 05/11/2015 07:40 AM, Andreas Krebbel wrote: With this patch GCC implements an Altivec style set of builtins to make use of vector instructions in C/C++ code. This is provided for compatibility with the IBM XL compiler. gcc/ * config.gcc: Add vecintrin.h to extra_headers. Add s390-c.

Re: False ODR violation positives on anonymous namespace types

On 05/11/2015 09:28 AM, Jan Hubicka wrote: We already discussed earlier that type_in_anonymous_namespace_p is not working on compund types, because these do not have TYPE_STUB_DECL. I thought those are !TYPE_NAME types. What is reason for !TYPE_NAME type with no TYPE_STUB_DECL? Is it always a c

Re: [patch, avr] extend part-clobbered check to AVR_TINY architecture

2015-05-11 9:07 GMT+03:00 Sivanupandi, Pitchumani : >> -Original Message- >> From: Denis Chertykov [mailto:cherty...@gmail.com] >> Sent: Sunday, May 10, 2015 12:55 PM >> To: Sivanupandi, Pitchumani >> Cc: Georg-Johann Lay; GCC Patches >> Subject: Re: [patch, avr] extend part-clobbered check

Re: Fix verify_type ICE on TYPE_METHOS

On 05/11/2015 06:38 AM, Jan Hubicka wrote: -TYPE_METHODS (type) = chainon (TYPE_METHODS (type), fn); +TYPE_METHODS (type) = chainon (TYPE_METHODS (TYPE_MAIN_VARIANT (type)), fn); else { - DECL_CHAIN (fn) = TYPE_METHODS (type); - TYPE_METHODS (type) = fn; + DECL_C

Re: [PATCH 02/13] optabs: Fix vec_perm -> V16QI middle end lowering.

On 05/11/2015 07:23 AM, Andreas Krebbel wrote: The current implementation re-uses the location of the selection pattern to generate a new one. This fails if the pattern resides in a read-only location. With the patch a new temporary register is allocated for that purpose. gcc/ * optabs

Re: [PATCH] combine: Don't create (set (reg:CC) (compare (reg:CC) (const0)))

On 05/11/2015 07:13 AM, Segher Boessenkool wrote: There already was code to just use the original reg:CC, but it was positioned incorrectly: if the original code (that this RTL is simplified from) did not already start with a COMPARE (or not in the right mode), it didn't trigger. But it is valid

Re: False ODR violation positives on anonymous namespace types

> On 05/11/2015 09:28 AM, Jan Hubicka wrote: > >We already discussed earlier that type_in_anonymous_namespace_p is not > >working > >on compund types, because these do not have TYPE_STUB_DECL. I thought those > >are > >!TYPE_NAME types. What is reason for !TYPE_NAME type with no TYPE_STUB_DECL?

RE: [RFC]: Remove Mem/address type assumption in combiner

On Thu, 2015-05-07 at 11:01 +, Kumar, Venkataramanan wrote: > Hi Segher, > > Thank you I committed as r222874. > Ref: https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222874 > > Regards, > Venkat. Venkat, This patch broke a number of MIPS tests, specifically mips32r6 tests that loo

Re: [PATCH i386] Extend sibcall peepholes to allow source in %eax

On Sun, 10 May 2015, Jan Hubicka wrote: > > On i386, peepholes that transform memory load and register-indirect jump > > into > > memory-indirect jump are overly restrictive in that they don't allow > > combining > > when the jump target is loaded into %eax, and the called function returns a > >

Re: False ODR violation positives on anonymous namespace types

On 05/11/2015 12:46 PM, Jan Hubicka wrote: Well, my main motivatoin to extend from RECORD_OR_UNION_TYPE_P was to handle enums. But other case I would like to deal with are integer types - i.e. preserve difference between char/signed char/unsigned char/short/int/long/wchar in cases where they str

RE: [patch 1/28] top-level: Use automake-1.11.6

On Sat, 9 May 2015, Bernd Edlinger wrote: > But maybe you would like it better if we update, for instance, to: > automake-1.14  _and_  autoconf-2.69 ? Updating to current automake and autoconf release versions (but still using git versions of the toplevel scripts, not those from particular rele

Re: [PATCH] Fix memory leak in C++ pretty printer

On 05/11/2015 08:03 AM, Manuel López-Ibáñez wrote: My preference would be to replace the static with a pointer and placement-new with proper new and delete, but see: https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00910.html Agreed. Jason

Re: [PATCH i386] Extend sibcall peepholes to allow source in %eax

> On Sun, 10 May 2015, Jan Hubicka wrote: > > > > On i386, peepholes that transform memory load and register-indirect jump > > > into > > > memory-indirect jump are overly restrictive in that they don't allow > > > combining > > > when the jump target is loaded into %eax, and the called function

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