Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

2024-06-07 Thread Robin Dapp
>> When you say other variants are still to be implemented >> does that also include variants for zbb with min/max >> or zicond? > > No, I mean some other forms like branch need the improvement from the > middle end(aka widen_mul). Ah, I see, thanks. Those can save one instruction and we want th

RE: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

2024-06-07 Thread Li, Pan2
..@gmail.com Subject: Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int Hi Pan, > + /* Step-2: lt = x < y */ > + riscv_emit_binary (LTU, pmode_lt, pmode_x, pmode_y); > + > + /* Step-3: lt = -lt */ > + riscv_emit_unary (NEG, pmode_lt, p

Re: [PATCH v2] RISC-V: Implement .SAT_SUB for unsigned scalar int

2024-06-07 Thread Robin Dapp
Hi Pan, > + /* Step-2: lt = x < y */ > + riscv_emit_binary (LTU, pmode_lt, pmode_x, pmode_y); > + > + /* Step-3: lt = -lt */ > + riscv_emit_unary (NEG, pmode_lt, pmode_lt); > + > + /* Step-4: lt = ~lt */ > + riscv_emit_unary (NOT, pmode_lt, pmode_lt); Can we replace step 3 and 4 with sub