Hi,
Thanks for the review and suggestions.
> I think the patch isn't quite complete yet. You will also need changes in
> generic code. Currently sched_macro_fuse_insns() does:
Modified the sched_macro_fuse_insns() as required.
> Basically the idea is to push the check for CC usage into target m
On Wed, Mar 15, 2017 at 8:20 AM, Wilco Dijkstra wrote:
> Hi,
>
> I think the patch isn't quite complete yet. You will also need changes in
> generic code. Currently sched_macro_fuse_insns() does:
>
> if (any_condjump_p (insn))
> {
> unsigned int condreg1, condreg2;
> rtx cc_reg_1
Hi,
I think the patch isn't quite complete yet. You will also need changes in
generic code. Currently sched_macro_fuse_insns() does:
if (any_condjump_p (insn))
{
unsigned int condreg1, condreg2;
rtx cc_reg_1;
targetm.fixed_condition_code_regs (&condreg1, &condreg2);
Hi Kyrill,
>> I suggest you reword the whole comment and not talk about particular CPUs
>> but rather about the kinds of instructions you want to fuse
Modified as per the comments. Had modified the earlier version of patch
which had the vulcan reservation before James comments.
Please find attac
Hi Naveen,
On 15/03/17 05:32, Hurugalawadi, Naveen wrote:
Hi James,
My reason for asking is that the instruction fusion implemented in LLVM
( lib/Target/AArch64/AArch64MacroFusion.cpp::shouldScheduleAdjacent )
Sorry. There seems to be some confusion in the branch instructions.
The branch shou
Hi James,
>> My reason for asking is that the instruction fusion implemented in LLVM
>> ( lib/Target/AArch64/AArch64MacroFusion.cpp::shouldScheduleAdjacent )
Sorry. There seems to be some confusion in the branch instructions.
The branch should be conditional for ALU_BRANCH fusion.
Please find at
On Thu, Mar 09, 2017 at 06:22:33AM +, Hurugalawadi, Naveen wrote:
> Hi James,
>
> Thanks for the review and your comments.
>
> >> I'd need more detail on what types of instruction pairs you
> >> are trying to fuse.
>
> The documentation mentions it as follows:-
> Single uop ALU instruction
Hi James,
Thanks for the review and your comments.
>> I'd need more detail on what types of instruction pairs you
>> are trying to fuse.
The documentation mentions it as follows:-
Single uop ALU instruction may fuse with adjacent branch instruction in the
same bundle
>> This comment looks inc
On Mon, Mar 06, 2017 at 05:10:10AM +, Hurugalawadi, Naveen wrote:
> Hi,
>
> Please find attached the patch that implements alu_branch fusion
> for AArch64.
> The patch doesn't change spec but improve other benchmarks.
>
> Bootstrapped and Regression tested on aarch64-thunder-linux.
> Please r
