On Fri, 2020-03-13 at 09:09 +0100, Christophe Lyon wrote:
> Hi,
>
>
> On Thu, 12 Mar 2020 at 23:12, Jeff Law via Gcc-patches
> wrote:
> > On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
> > > On Thu, Mar 12, 2020 at 12:03:08PM -0600, Jeff Law wrote:
> > > > On Sat, 2020-02-08 at 10:
Jeff, thanks for picking this up.
Jeff Law writes:
> On Thu, 2020-03-12 at 15:26 -0500, Segher Boessenkool wrote:
>> On Thu, Mar 12, 2020 at 12:47:04PM -0600, Jeff Law wrote:
>> > On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
>> > > > else if (n_sets == 1
>> > > > -
Hi,
On Thu, 12 Mar 2020 at 23:12, Jeff Law via Gcc-patches
wrote:
>
> On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
> > On Thu, Mar 12, 2020 at 12:03:08PM -0600, Jeff Law wrote:
> > > On Sat, 2020-02-08 at 10:41 -0600, Segher Boessenkool wrote:
> > > > I don't think each stanza of
On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
> On Thu, Mar 12, 2020 at 12:03:08PM -0600, Jeff Law wrote:
> > On Sat, 2020-02-08 at 10:41 -0600, Segher Boessenkool wrote:
> > > I don't think each stanza of code should use it's own "noop-ness", no.
> > Richard's patch is actually bett
On Thu, 2020-03-12 at 15:26 -0500, Segher Boessenkool wrote:
> On Thu, Mar 12, 2020 at 12:47:04PM -0600, Jeff Law wrote:
> > On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
> > > > else if (n_sets == 1
> > > > - && MEM_P (trial)
> > > > + &&
On Thu, Mar 12, 2020 at 12:47:04PM -0600, Jeff Law wrote:
> On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
> > > else if (n_sets == 1
> > > -&& MEM_P (trial)
> > > +&& ! CALL_P (insn)
> > > +&& (MEM_P (trial) || REG_P (trial))
> > >
On Thu, 2020-03-12 at 13:23 -0500, Segher Boessenkool wrote:
>
> > > I don't know if this patch makes matters worse or not. It doesn't seem
> > > suitable for stage 4 though. And Richard said the cse.c part breaks
> > > rs6000, if that is true, yes I do object ;-)
> > The rs6000 port breakage is
On Thu, Mar 12, 2020 at 12:03:08PM -0600, Jeff Law wrote:
> On Sat, 2020-02-08 at 10:41 -0600, Segher Boessenkool wrote:
> > I don't think each stanza of code should use it's own "noop-ness", no.
> Richard's patch is actually better than mine in that regard as it handles mem
> and
> reg nop moves
On Sat, 2020-02-08 at 10:41 -0600, Segher Boessenkool wrote:
> On Fri, Feb 07, 2020 at 09:00:40AM -0700, Jeff Law wrote:
> > On Thu, 2020-02-06 at 07:56 -0600, Segher Boessenkool wrote:
> > > On Wed, Feb 05, 2020 at 11:48:23AM -0700, Jeff Law wrote:
> > > > Yea, it's closely related. In your case
On Fri, Feb 07, 2020 at 09:00:40AM -0700, Jeff Law wrote:
> On Thu, 2020-02-06 at 07:56 -0600, Segher Boessenkool wrote:
> > On Wed, Feb 05, 2020 at 11:48:23AM -0700, Jeff Law wrote:
> > > Yea, it's closely related. In your case you need to effectively ignore
> > > the nop insn to get the optimiza
On Thu, 2020-02-06 at 07:56 -0600, Segher Boessenkool wrote:
> On Wed, Feb 05, 2020 at 11:48:23AM -0700, Jeff Law wrote:
> > Yea, it's closely related. In your case you need to effectively ignore
> > the nop insn to get the optimization you want. In mine that nop insn
> > causes an ICE.
> >
> >
On Wed, Feb 05, 2020 at 11:48:23AM -0700, Jeff Law wrote:
> Yea, it's closely related. In your case you need to effectively ignore
> the nop insn to get the optimization you want. In mine that nop insn
> causes an ICE.
>
> I think we could take your cse bits + adding a !CALL_P separately from
>
On Wed, 2020-02-05 at 13:30 +, Richard Sandiford wrote:
> Jeff Law writes:
> > Richard & Segher, if y'all could check my analysis here, it'd be
> > appreciated.
> >
> > pr90275 is a P2 regression that is only triggering on ARM. David's
> > testcase in c#1 is the best for this problem as it d
Jeff Law writes:
> Richard & Segher, if y'all could check my analysis here, it'd be
> appreciated.
>
> pr90275 is a P2 regression that is only triggering on ARM. David's
> testcase in c#1 is the best for this problem as it doesn't require
> magic flags like -fno-dce to trigger.
>
> The block in q
Hi all,
On Wed, Feb 05, 2020 at 07:26:03AM +0100, Jakub Jelinek wrote:
> On Tue, Feb 04, 2020 at 06:04:09PM -0700, Jeff Law wrote:
> > --- a/gcc/cse.c
> > +++ b/gcc/cse.c
> > @@ -5572,6 +5572,16 @@ cse_insn (rtx_insn *insn)
> > sets[i].rtl = 0;
> > }
> >
> > + /* Similarly for no-
On Tue, Feb 04, 2020 at 06:04:09PM -0700, Jeff Law wrote:
> --- a/gcc/cse.c
> +++ b/gcc/cse.c
> @@ -5572,6 +5572,16 @@ cse_insn (rtx_insn *insn)
> sets[i].rtl = 0;
> }
>
> + /* Similarly for no-op moves. */
> + if (n_sets == 1
> + && GET_CODE (src) == REG
Just nits
Richard & Segher, if y'all could check my analysis here, it'd be
appreciated.
pr90275 is a P2 regression that is only triggering on ARM. David's
testcase in c#1 is the best for this problem as it doesn't require
magic flags like -fno-dce to trigger.
The block in question:
> (code_label 89 88 9
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