On Mon, Jun 13, 2011 at 2:40 AM, Kaushik Phatak
wrote:
> Hi Jeff,
> Thanks for the quick review.
>
>>> the right test is rtx_equal_p(operands[0], operands[1])
> Committed with above changes to the bsetqi_msx, bclrqi_msx and bnotqi_msx
> patterns.
>
Commit is incorrect. Testsuite ChangeLog entri
> 2011-06-09 Kaushik Phatak
>
> * config/h8300/h8300.md (bsetqi_msx, bclrqi_msx, bnotqi_msx): Added
> condition to disallow non-identical memory locations.
> (*andqi3_2, andqi3_1, iorqi3_1, xorqi3_1): Reorder insn to give
> preference to bit manipulation instructions.
>
[mailto:l...@redhat.com]
Sent: 11 June 2011 00:01
To: Kaushik Phatak
Cc: gcc-patches@gcc.gnu.org; Prafulla Thakare
Subject: Re: [Patch : H8300] Bug fix for bit insn and minor tweaks to insns
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On 06/09/11 01:20, Kaushik Phatak wrote:
> Hi,
> The follo
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On 06/09/11 01:20, Kaushik Phatak wrote:
> Hi,
> The following patch fixes an ICE that is generated when the compiler tries
> to perform bit manipulation for logical operations when the source and
> destination address does not match. The testcase is
Hi,
The following patch fixes an ICE that is generated when the compiler tries
to perform bit manipulation for logical operations when the source and
destination address does not match. The testcase is also included in the
patch(gcc.dg).
The additional condition in the insn takes care of the ICE