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On 06/09/11 01:20, Kaushik Phatak wrote:
> Hi,
> The following patch fixes an ICE that is generated when the compiler tries
> to perform bit manipulation for logical operations when the source and 
> destination address does not match. The testcase is also included in the 
> patch(gcc.dg).
> The additional condition in the insn takes care of the ICE which occurs at 
> '-O1'.
> The other insn's are reordered to give preference to bit instructions using 
> existing
> constraints.
> Ok to apply?
> 
> Thanks & Regards,
> Kaushik Phatak
> www.kpitgnutools.com
> 
> 2011-06-09  Kaushik Phatak <kaushik.pha...@kpitcummins.com>
> 
>       * config/h8300/h8300.md (bsetqi_msx, bclrqi_msx, bnotqi_msx): Added 
>       condition to disallow non-identical memory locations.
>       (*andqi3_2, andqi3_1, iorqi3_1, xorqi3_1): Reorder insn to give
>       preference to bit manipulation instructions.
>       * gcc.dg/h8300-bit-insn-ice2.2: New testcase.
Can't the operand be MEM (reg) or MEM (const_int)?  In which case
INTVAL (XEXP (operands[], 0)) is the wrong test since you shouldn't be
applying INTVAL to a REG.  Furthermore, if you're trying to compare
CONST_INTs, those are shared and you can use pointer equality rather
than their underlying value.
Regardless, I think the right test is
rtx_equal_p (operands[0], operands[1], NULL)

With that change to bsetqi_msx, bclrqi_msx and bnotqi_msx this patch is OK.

jeff
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