Re: [PATCH v3 0/2] RISC-V: Support CORE-V XCVMAC and XCVALU extensions

2023-10-10 Thread Kito Cheng
Just repeat what I said on the mailing list again :P it's LGTM, just need to rebase to deal with riscv.opt related changes :) On Sat, Sep 30, 2023 at 8:02 PM Mary Bennett wrote: > > Thank you for reviewing this patch. > > v1->v2: > * Add XCValu RTL. > * Change assembly mnemonics from mixed c

[PATCH v3 0/2] RISC-V: Support CORE-V XCVMAC and XCVALU extensions

2023-09-30 Thread Mary Bennett
Thank you for reviewing this patch. v1->v2: * Add XCValu RTL. * Change assembly mnemonics from mixed case to lower case. v2->v3: * Change commit message from past tense to present. * Add documentation for new dg-effective-targets. This patch series presents the comprehensive implementati