] RISC-V: Add more test cases for RVV FP16
On 6/8/23 01:52, pan2...@intel.com wrote:
> From: Pan Li
>
> This patch would like to add new test cases to make sure the RVV FP16
> works well as expected.
>
> Signed-off-by: Pan Li
>
> gcc/testsuite/ChangeLog:
>
>
On 6/8/23 01:52, pan2...@intel.com wrote:
From: Pan Li
This patch would like to add new test cases to make sure the
RVV FP16 works well as expected.
Signed-off-by: Pan Li
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/zvfh-intrinsic.c: Add new cases.
* gcc.target/ri
From: Pan Li
This patch would like to add new test cases to make sure the
RVV FP16 works well as expected.
Signed-off-by: Pan Li
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/zvfh-intrinsic.c: Add new cases.
* gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: New test.
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