On Thu, Feb 14, 2019 at 12:43 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 9:21 PM Uros Bizjak wrote:
> >
> > On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
> > >
> > > Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> > > enable SSSE3 __m64 tests even when AVX is enable
On Thu, Feb 14, 2019 at 9:21 PM Uros Bizjak wrote:
>
> On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
> >
> > Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> > enable SSSE3 __m64 tests even when AVX is enabled.
> >
> > PR target/89021
> > * gcc.target/i386/ss
On Thu, Feb 14, 2019 at 1:30 PM H.J. Lu wrote:
>
> Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
> enable SSSE3 __m64 tests even when AVX is enabled.
>
> PR target/89021
> * gcc.target/i386/ssse3-pabsb.c: Also enable __m64 check in
> 64-bit mode.
>
Since we now emulate MMX intrinsics with SSE in 64-bit mode, we can
enable SSSE3 __m64 tests even when AVX is enabled.
PR target/89021
* gcc.target/i386/ssse3-pabsb.c: Also enable __m64 check in
64-bit mode.
* gcc.target/i386/ssse3-pabsd.c: Likewise.
* gcc.t