On Wed, Apr 14, 2021 at 02:38:47PM -0500, Segher Boessenkool wrote:
> On Fri, Apr 09, 2021 at 10:43:58AM -0400, Michael Meissner wrote:
> > (Fv mode attribute): Add KFmode and TFmode.
> > (movcc_fpmask): Replace
> > movcc_p9. Add IEEE 128-bit fp support.
> > (movcc_
On 14 April 2021 21:01:15 CEST, Segher Boessenkool
wrote:
>> > > --- /dev/null
>> > > +++ b/gcc/testsuite/gcc.target/powerpc/float128-cmove.c
>> > > @@ -0,0 +1,93 @@
>> > > +/* { dg-do compile } */
>> > > +/* { dg-require-effective-target ppc_float128_hw } */
>> > > +/* { dg-require-effective-ta
On Fri, Apr 09, 2021 at 10:43:58AM -0400, Michael Meissner wrote:
> (Fv mode attribute): Add KFmode and TFmode.
> (movcc_fpmask): Replace
> movcc_p9. Add IEEE 128-bit fp support.
> (movcc_invert_fpmask): Replace
> movcc_invert_p9. Add IEEE 128-bit fp
>
On Fri, Apr 09, 2021 at 09:20:32PM +0200, Bernhard Reutner-Fischer wrote:
> On Fri, 09 Apr 2021 11:54:59 -0500
> will schmidt via Gcc-patches wrote:
> > > + enum rtx_code cond = reverse_condition_maybe_unordered (GET_CODE
> > > (old_cmp));
>
> I think you can drop the enum keyword.
You can in
On Fri, 09 Apr 2021 11:54:59 -0500
will schmidt via Gcc-patches wrote:
> On Fri, 2021-04-09 at 10:43 -0400, Michael Meissner wrote:
> > gcc/
> > 2021-04-09 Michael Meissner
> > (movcc_fpmask): Replace
> > movcc_p9. Add IEEE 128-bit fp support.
> > (movcc_invert_fpmask
On Fri, 2021-04-09 at 10:43 -0400, Michael Meissner wrote:
> Add IEEE 128-bit fp conditional move on PowerPC.
>
> This patch has been posted various times in the past. My memory is the last
> time I changed the patch, I addressed the concerns posted at that time. Since
> then the patch seems to
Add IEEE 128-bit fp conditional move on PowerPC.
This patch has been posted various times in the past. My memory is the last
time I changed the patch, I addressed the concerns posted at that time. Since
then the patch seems to have gone into a limbo state.
This patch adds the support for power1
