Re: [PATCH] RISC-V: Derive ABI from -march if -mabi is not present.

Hi Maciej: Thanks for sharing your experience on MIPS, that sounds like just opposite derived directions to this scheme. > The MIPS port used to have `-mcpu=' as well, which used to be roughly > equivalent to modern `-mtune='; from your description I gather `-mcpu=' is > going to be roughly equi

Re: [PATCH] RISC-V: Derive ABI from -march if -mabi is not present.

Hi Andreas: Thanks for your review, writing the document is my weakness ...:P On Tue, Oct 6, 2020 at 3:34 PM Andreas Schwab wrote: > > On Okt 06 2020, Kito Cheng wrote: > > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > > index f623467b7637..c6ba738aa0b7 100644 > > --- a/gcc/doc/invo

Re: [PATCH] RISC-V: Derive ABI from -march if -mabi is not present.

On Tue, 6 Oct 2020, Kito Cheng wrote: > I think this patch is kind of major change for GCC RISC-V port, so I cc all > RISC-V gcc maintainer to make sure this change is fine with you guys. > > - Motivation of this patch: >1. Sync behavior between clang/llvm. >2. Preparation for -mcpu opti

Re: [PATCH] RISC-V: Derive ABI from -march if -mabi is not present.

On Okt 06 2020, Kito Cheng wrote: > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index f623467b7637..c6ba738aa0b7 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -25928,7 +25928,14 @@ allows floating-point values up to 32 bits long to > be passed in registers; or >

[PATCH] RISC-V: Derive ABI from -march if -mabi is not present.

Hi Jim, Palmer and Andrew: I think this patch is kind of major change for GCC RISC-V port, so I cc all RISC-V gcc maintainer to make sure this change is fine with you guys. - Motivation of this patch: 1. Sync behavior between clang/llvm. 2. Preparation for -mcpu option support, -mcpu will