On Mon, Mar 02, 2020 at 07:41:42PM -0500, Michael Meissner wrote:
> On Fri, Feb 28, 2020 at 06:45:25AM -0600, Segher Boessenkool wrote:
> > On Fri, Feb 28, 2020 at 12:32:06AM -0500, Michael Meissner wrote:
> > > There is a wider issue to optimize all cases of vec_extract to do the
> > > sign,
> >
On Fri, Feb 28, 2020 at 06:45:25AM -0600, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Feb 28, 2020 at 12:32:06AM -0500, Michael Meissner wrote:
> > As part of my work in adding support for -mcpu=future, I noticed an insn
> > that
> > would never match.
>
> > It will never match, because the zero
Hi!
On Fri, Feb 28, 2020 at 12:32:06AM -0500, Michael Meissner wrote:
> As part of my work in adding support for -mcpu=future, I noticed an insn that
> would never match.
> It will never match, because the zero_extend result is the same mode as the
> input, so the machine independent parts of the
As part of my work in adding support for -mcpu=future, I noticed an insn that
would never match.
Here is the insn:
(define_insn_and_split "*vsx_extract__mode_var"
[(set (match_operand: 0 "gpc_reg_operand" "=r,r,r")
(zero_extend:
(unspec:
[(match_operand:VSX_EXTRACT_I
