On Mon, Mar 02, 2020 at 07:41:42PM -0500, Michael Meissner wrote: > On Fri, Feb 28, 2020 at 06:45:25AM -0600, Segher Boessenkool wrote: > > On Fri, Feb 28, 2020 at 12:32:06AM -0500, Michael Meissner wrote: > > > There is a wider issue to optimize all cases of vec_extract to do the > > > sign, > > > zero, and float extension automatically when we are loading from memory, > > > which > > > is PR target/93230. I have patches for all of the cases for 93230, but > > > they > > > will need to wait until GCC 11 opens up. > > > > If you don't use reload_completed in the split condition you do not have > > this problem (in the normal case). Please work on that? > > No. I tend to think that if we do the split before reload, that it will cause > some regressions, because the register allocator will take the opportunity to > change loads to vector registers to be loads to GPRs and direct moves.
It will cause better optimisations, yes. Earlier optimisations. The compiler will use a different register set if it thinks that is cheaper to do. We need to get that right *anyway*, because it is used from many more places. > One of > the original motivations for some of these patches is to avoid direct moves. You only need to do all of this manually because you split after reload. That is only a good thing to do if you *have* to, usually because some datum can end up in memory or in a register, and those are significantly differently for the machine code you need. This is not true here, because you do *not* allow both regs and mem (in the normal case). If you split earlier, you do not have to do all the main rtl optimisations (say cprop, fwprop, combine, insn selection in general) manually, as you do have to do to not get terrible code if you split after reload. > I also worry that things like having to use SUBREG's before RA (instead of > just > changing the mode and/or the register number that we can do after reload) will > not work because generally vectors and scalars aren't tieable. You have pseudos before reload. Subregs work fine. If they weren't tieable you could not do this on hard regs either, so I don't see your point at all here? Segher
