Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-06-23 Thread James Greenhalgh
On Mon, Jun 23, 2014 at 01:53:28PM +0100, Kyrill Tkachov wrote: > On 19/06/14 14:12, James Greenhalgh wrote: > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > > >index > > >266d7873a5a1b8dbb7f955c3f13cf370920a9c4a..7c5b5a566ebfd907b83b38eed2e214738e7e9bd4 > > > 10064

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-06-23 Thread Kyrill Tkachov
Hi James, On 19/06/14 14:12, James Greenhalgh wrote: diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md >index 266d7873a5a1b8dbb7f955c3f13cf370920a9c4a..7c5b5a566ebfd907b83b38eed2e214738e7e9bd4 100644 >--- a/gcc/config/aarch64/aarch64.md >+++ b/gcc/config/aarch64/aarch

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-06-23 Thread Marcus Shawcroft
On 19 June 2014 14:12, James Greenhalgh wrote: > This has been sitting waiting for comment for a while now. If we do need a > mechanism to describe individual costs for alternatives, it will need > applied to all the existing uses in aarch64.md/aarch64-simd.md. I think > solving that problem (if

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-06-19 Thread James Greenhalgh
On Fri, May 16, 2014 at 11:30:38AM +0100, James Greenhalgh wrote: > On Fri, Mar 28, 2014 at 03:39:53PM +, James Greenhalgh wrote: > > On Fri, Mar 28, 2014 at 03:09:22PM +, pins...@gmail.com wrote: > > > > On Mar 28, 2014, at 7:48 AM, James Greenhalgh > > > > wrote: > > > > On Fri, Mar 28,

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-05-16 Thread James Greenhalgh
On Fri, Mar 28, 2014 at 03:39:53PM +, James Greenhalgh wrote: > On Fri, Mar 28, 2014 at 03:09:22PM +, pins...@gmail.com wrote: > > > On Mar 28, 2014, at 7:48 AM, James Greenhalgh > > > wrote: > > > On Fri, Mar 28, 2014 at 11:11:58AM +, pins...@gmail.com wrote: > > >>> On Mar 28, 2014,

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-03-28 Thread James Greenhalgh
On Fri, Mar 28, 2014 at 11:11:58AM +, pins...@gmail.com wrote: > > On Mar 28, 2014, at 2:12 AM, James Greenhalgh > > wrote: > > Hi, > > > > There is no way to perform scalar addition in the vector register file, > > but with the RTX costs in place we start rewriting (x << 1) to (x + x) > > o

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-03-28 Thread James Greenhalgh
On Fri, Mar 28, 2014 at 03:09:22PM +, pins...@gmail.com wrote: > > > > On Mar 28, 2014, at 7:48 AM, James Greenhalgh > > wrote: > > > > On Fri, Mar 28, 2014 at 11:11:58AM +, pins...@gmail.com wrote: > >>> On Mar 28, 2014, at 2:12 AM, James Greenhalgh > >>> wrote: > >>> Hi, > >>> > >

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-03-28 Thread pinskia
> On Mar 28, 2014, at 7:48 AM, James Greenhalgh > wrote: > > On Fri, Mar 28, 2014 at 11:11:58AM +, pins...@gmail.com wrote: >>> On Mar 28, 2014, at 2:12 AM, James Greenhalgh >>> wrote: >>> Hi, >>> >>> There is no way to perform scalar addition in the vector register file, >>> but with t

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-03-28 Thread pinskia
> On Mar 28, 2014, at 2:12 AM, James Greenhalgh > wrote: > > > Hi, > > There is no way to perform scalar addition in the vector register file, > but with the RTX costs in place we start rewriting (x << 1) to (x + x) > on almost all cores. The code which makes this decision has no idea that w

[AArch64] Implement ADD in vector registers for 32-bit scalar values.

2014-03-28 Thread James Greenhalgh
Hi, There is no way to perform scalar addition in the vector register file, but with the RTX costs in place we start rewriting (x << 1) to (x + x) on almost all cores. The code which makes this decision has no idea that we will end up doing this (it happens well before reload) and so we end up wi