| 1 -
> 1 file changed, 1 deletion(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed the whole series to master with minor fixups in descriptions.
--
Thanks.
-- Max
Add new function check_effective_target_xtensa_atomic and use it in the
check_effective_target_sync_int_long and
check_effective_target_sync_char_short.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_xtensa_atomic): New function.
(check_effectiv
retw.n
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (xtensa_register_move_cost):
> Add appropriate move costs between AR_REGS and FP_REGS.
> ---
> gcc/config/xtensa/xtensa.cc | 28 +++++++-
> 1 file changed, 19 insertions(+), 9 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
That's a nice fix, thank you Suwa-san!
--
Thanks.
-- Max
7b lra(_IO_FILE*, int)
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lra.cc:2636
0xbdbe77 do_reload
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/ira.cc:5987
0xbdbe77 execute
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/ira.cc:6175
--
Thanks.
-- Max
allocated registers that satisfy the above constraints.
> ---
> gcc/config/xtensa/xtensa.md | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
nsa.cc | 3 +++
> gcc/config/xtensa/xtensa.md | 12 ++--
> 2 files changed, 9 insertions(+), 6 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
d a case statement for TYPE_FARITH.
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
rder alternative that corresponds to L32R machine instruction,
> and prefix alternatives that correspond to LSI/SSI instructions
> with the constraint character '^' so that they are disparaged by
> reload/LRA.
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
A0_REG)' after calling
> xtensa_expand_epilogue.
> ---
> gcc/config/xtensa/xtensa-protos.h | 2 +-
> gcc/config/xtensa/xtensa.cc | 10 +-
> gcc/config/xtensa/xtensa.md | 9 +
> 3 files changed, 7 insertions(+), 14 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
> +extern const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER];
> +#define LEAF_REGISTERS xtensa_leaf_regs
> +
> +/* For Xtensa, no remapping is necessary, but this macro must be
> + defined if LEAF_REGISTERS is defined. */
> +#define LEAF_REG_REMAP(REGNO) ((int) (REGNO))
> +
> /* Internal macros to classify a register number. */
>
> /* 16 address registers + fake registers */
> --
> 2.39.2
--
Thanks.
-- Max
(floatsisf2): Change from "floatsisf2".
> (*floatsisf2_scaled): New insn definition.
> ---
> gcc/config/xtensa/predicates.md | 20
> gcc/config/xtensa/xtensa.md | 58 ++---
> 2 files changed, 66 insertions(+), 12 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
tensa-linux-uclibc, no new regressions.
Committed to master
--
Thanks.
-- Max
gcc/
* config/xtensa/xtensa.cc (xtensa_option_override_after_change):
New function.
(TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define as
xtensa_option_override_after_change.
(xtensa_option_override): Call
xtensa_option_override_after_change.
---
gcc/con
On Mon, Jul 15, 2024 at 10:21:18AM -0700, Ian Lance Taylor wrote:
> Can you see whether this patch works for FDPIC support? This is based
> on your patch but has various changes. Thanks.
Yes, it is working.
--
Thanks.
-- Max
On Wed, Jul 10, 2024 at 12:49 PM Ian Lance Taylor wrote:
> On Sun, May 26, 2024 at 11:51 PM Max Filippov wrote:
> > diff --git a/libbacktrace/internal.h b/libbacktrace/internal.h
> > index 4fa0af8cb6c9..456911166026 100644
> > --- a/libbacktrace/internal.h
> > ++
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
s mentioned above,
> and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.
> ---
> gcc/config/xtensa/xtensa-protos.h | 2 +-
> gcc/config/xtensa/xtensa.cc | 75 ---
> gcc/config/xtensa/xtensa.md | 56 ++-
> 3 files changed, 103 insertions(+), 30 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
./gt-ipa-prop.h:39
0xc99b58 gt_ggc_mx(ipa_return_value_summary*&)
./gt-ipa-prop.h:62
--
Thanks.
-- Max
On Sun, May 26, 2024 at 11:50 PM Max Filippov wrote:
>
> Instead of a single base address FDPIC ELF files use load map: a
> structure with an array of mappings for individual segments. Change
> libbacktrace functions and structures to support that.
Ping?
> libbacktrace/
.h | 4 ++--
> gcc/config/xtensa/xtensa.cc | 16 ++--
> gcc/config/xtensa/xtensa.md | 13 +++--
> 3 files changed, 19 insertions(+), 14 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
Suwa-san, something has changed in your mail setup apparently: every
patch context line now gets an extra space in the beginning. Could you
please fix that?
--
Thanks.
-- Max
h | 1 -
> gcc/config/xtensa/xtensa.cc | 14 --
> gcc/config/xtensa/xtensa.md | 5 -
> 3 files changed, 4 insertions(+), 16 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
ig/xtensa/xtensa.md | 4 +-
> 3 files changed, 51 insertions(+), 53 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
For some reason neither git am nor patch -p1 could apply this patch,
so I did that manually.
--
Thanks.
-- Max
See PR libstdc++/111641 for details. There's a patch in
> there, too.
Oh, cool, thanks for the pointer Rainer. So patch 2 of this series can be
disregarded.
--
Thanks.
-- Max
bc.
Adding -funwind-tables to the libstdc++ version of libbacktrace fixed
that. Which makes me wonder how it works for other architectures?
Max Filippov (2):
libbacktrace: add FDPIC support
libstdc++-v3/src/libbacktrace: add -funwind-tables
libbacktrace/dwarf.c
Instead of a single base address FDPIC ELF files use load map: a
structure with an array of mappings for individual segments. Change
libbacktrace functions and structures to support that.
libbacktrace/
PR libbacktrace/114941
* dwarf.c: Include or if available.
(struct d
libstdc++-v3/
* src/libbacktrace/Makefile.am (AM_CFLAGS, AM_CXXFLAGS): Add
-funwind-tables
* src/libbacktrace/Makefile.in: Regenerate.
---
libstdc++-v3/src/libbacktrace/Makefile.am | 4 ++--
libstdc++-v3/src/libbacktrace/Makefile.in | 4 ++--
2 files changed, 4 insertions(
On Fri, Mar 22, 2024 at 1:15 PM Max Filippov wrote:
>
> libgcc/
> * unwind-arm-common.inc (__gnu_personality_sigframe_fdpic): Cast
> last argument of _Unwind_VRS_Set to void *.
> ---
> libgcc/unwind-arm-common.inc | 2 +-
> 1 file changed, 1 insertion(+),
, so it is easy to solve by defining that pattern.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md: Add new split pattern described above.
> ---
> gcc/config/xtensa/xtensa.md | 14 ++
> 1 file changed, 14 insertions(+)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
libgcc/
* unwind-arm-common.inc (__gnu_personality_sigframe_fdpic): Cast
last argument of _Unwind_VRS_Set to void *.
---
libgcc/unwind-arm-common.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc
inde
After switching to LRA xtensa backend generates the following code for
saving/loading registers:
movi a9, 0x190
add a9, a9, sp
s32i.n a3, a9, 0
instead of the shorter and more efficient
s32i a3, a9, 0x190
E.g. the following code can be used to reproduce it:
i
1 file changed, 1 insertion(+), 1 deletion(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
gcc/config/xtensa/xtensa.md | 22 ++
> 1 file changed, 14 insertions(+), 8 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
812
0x1c08b57 decompose_multiword_subregs
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1569
0x1c09d7d execute
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/lower-subreg.cc:1834
--
Thanks.
-- Max
From: Takayuki 'January June' Suwa
gcc/ChangeLog:
* config/xtensa/constraints.md (R, T, U):
Change define_constraint to define_memory_constraint.
* config/xtensa/predicates.md (move_operand): Don't check that a
constant pool operand size is a multiple of UNITS_PER
From: Takayuki 'January June' Suwa
gcc/ChangeLog:
* config/xtensa/constraints.md (R, T, U):
Change define_constraint to define_memory_constraint.
* config/xtensa/predicates.md (move_operand): Don't check that a
constant pool operand size is a multiple of UNITS_PER
Hi Suwa-san,
I've finally processed the new issues introduced by this change.
On Wed, May 10, 2023 at 2:10 AM Max Filippov wrote:
> On Mon, May 8, 2023 at 6:38 AM Takayuki 'January June' Suwa
> wrote:
> >
> > gcc/ChangeLog:
> >
> >
gcc/
* config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
26 (which corresponds to RF-2014.0) to 27 (which
corresponds to RG-2015.0, the release where salt/saltu opcodes
were introduced).
---
gcc/config/xtensa/xtensa.h | 2 +-
1 file changed, 1 ins
gcc/
* config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
unsigned comparisons.
* config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
generation of salt/saltu instructions.
* config/xtensa/xtensa.h (TARGET_SALT): New macro.
* config/xtensa/
registers.
> * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
> (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
> ---
> gcc/config/xtensa/xtensa.cc | 35 +--
> gcc/config/xtensa/xtensa.md | 112
> 2 files changed, 113 insertions(+), 34 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
gcc/
* config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
unsigned comparisons.
* config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
generation of salt/saltu instructions.
* config/xtensa/xtensa.h (TARGET_SALT): New macro.
* gcc/config/xte
a.cc | 43 +++--
> gcc/config/xtensa/xtensa.md | 34 -----
> 2 files changed, 37 insertions(+), 40 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
On Tue, Sep 5, 2023 at 9:24 PM Takayuki 'January June' Suwa
wrote:
> On 2023/09/06 8:01, Max Filippov wrote:
> > On Tue, Sep 5, 2023 at 2:29 AM Takayuki 'January June' Suwa
> > wrote:
> >> ;; after (prereq. TARGET_MINMAX)
> >> test0:
&
minua2, a2, a9
> ret.n
ISTM that test1 could be done with movnez in the same two instructions:
movi a9, 1
movnez a2, a9, a2
--
Thanks.
-- Max
als.
--
Thanks.
-- Max
On Thu, Jul 20, 2023 at 10:45 AM Alexey Lapshin
wrote:
>
> On Thu, 2023-07-20 at 08:25 -0700, Max Filippov wrote:
> > But it defines them with their respective values.
> > Just notice that it adds two leading underscores in front of the names.
>
> Why builtin macros
ts for keeping backwards
compatibility with the overlay-based configuration method (:
I did the same for the uClibc, but the change is still in my queue:
https://github.com/jcmvbkbc/uclibc-ng-xtensa/commit/842aede0537812a0d2158433c5e048ee87324075
--
Thanks.
-- Max
ctive values.
Just notice that it adds two leading underscores in front of the names.
> But the value must be set to make it work correctly.
> It uses builtin_define() instead builtin_define_with_int_value()
>
> I will check how it could be soved with the loop approach.
--
Thanks.
-- Max
gt; +XTENSA_CPU_CPP_BUILTIN(XTENSA_MARCH_EARLIEST);
> \
> +XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_CLAMPS);
> \
> +XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_DEPBITS);
> \
> +XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_EXCLUSIVE);
> \
> +XTENSA_CPU_CPP_BUILTIN(XCHAL_HAVE_XEA3);
> \
>} while (0)
>
> #define CPP_SPEC " %(subtarget_cpp_spec) "
> --
> 2.34.1
>
--
Thanks.
-- Max
clibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
ed, 1 insertion(+), 1 deletion(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
inux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
a_constantsynth_2insn):
> Add new pattern for the abovementioned case.
> ---
> gcc/config/xtensa/xtensa.cc | 12 ++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
nsa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
On Mon, Jun 5, 2023 at 8:15 AM Max Filippov wrote:
>
> Hi Suwa-san,
>
> On Mon, Jun 5, 2023 at 2:37 AM Takayuki 'January June' Suwa
> wrote:
> >
> > This patch optimizes the boolean evaluation of EQ/NE against zero
> > by adding two insn_and_split patte
fig/xtensa/xtensa.md | 53 +
> 3 files changed, 106 insertions(+), 9 deletions(-)
This version performs much better than v1, but there's still new
testsuite failure in the gcc.c-torture/execute/bitfld-3.c
and the following change in the generated code
from:
l32i.n a11, a7, 8
l8uia9, a7, 12
movia10, 0xff
add.n a9, a9, a10
addi.n a7, a11, -1
movi.n a10, 1
movi.n a6, 0
moveqz a10, a6, a11
to:
l32i.n a10, a7, 8
l8uia9, a7, 12
movia11, 0xff
add.n a9, a9, a11
addi.n a7, a10, -1
movi.n a11, 1
mov.n a10, a11
movnez a10, a11, a11
suggests that the pattern movsicc_ne0_reg_zero does not work correctly
when its operands overlap.
--
Thanks.
-- Max
IN, *eqne_INT_MIN):
> New insn_and_split patterns.
> ---
> gcc/config/xtensa/xtensa.md | 64 +
> 1 file changed, 64 insertions(+)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
rtran build, all
with the similar diagnostic:
gcc/libgfortran/intrinsics/erfc_scaled_inc.c:179:1: error: unrecognizable insn:
179 | }
| ^
(insn 23 22 24 2 (set (reg:CC 18 b0)
(lt:CC (const_double:SF 0.0 [0x0.0p+0])
(reg/v:SF 96 [ x ])))
"gcc/libgfortran/intrinsics/erfc_scaled_inc.c":111:18 -1
(nil))
during RTL pass: vregs
--
Thanks.
-- Max
rtx_code_label *label;
> + if (rtx_equal_p (operands[0], operands[1])
> + || rtx_equal_p (operands[0], operands[2])
> + || ! REG_P (operands[1]) || ! REG_P (operands[2]))
I wonder if these additional conditions are necessary, given that
the operands have the "register_operand" predicates?
--
Thanks.
-- Max
struc-
> tion idioms described in the Xtensa ISA reference manual (p. 600).
> ---
> gcc/config/xtensa/xtensa.md | 52 +
> 1 file changed, 52 insertions(+)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
swapped.
> In addition, replace use of code iterator with new operator
> predicate.
> (*shlrd_const, *shlrd_per_byte):
> Likewise regarding the code iterator.
> ---
> gcc/config/xtensa/predicates.md | 3 ++
> gcc/config/xtensa/xtensa.md | 81 ++++++---
> 2 files changed, 58 insertions(+), 26 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
I can also confirm that the pattern is now used as expected in
the case where I previously had an issue. Thanks for fixing that!
Committed to master.
--
Thanks.
-- Max
o_op1));
> + emit_insn (gen_subsi3 (hi_dest, hi_op0, hi_op1));
> + emit_cmp_and_jump_insns (lo_op0, lo_op1, GEU, const0_rtx,
> + SImode, true, label = gen_label_rtx ());
> + emit_insn (gen_addsi3 (hi_dest, hi_dest, constm1_rtx));
> + emit_label (label);
> + DONE;
> +})
> +
> (define_insn "subsf3"
>[(set (match_operand:SF 0 "register_operand" "=f")
> (minus:SF (match_operand:SF 1 "register_operand" "f")
> --
> 2.30.2
--
Thanks.
-- Max
/20070623-1.c)
when an overflow occurs, e.g. for op0 == INT_MIN, op1 == INT_MAX.
Maybe the dedicated instructions salt / saltu could be used in that pattern?
They don't have their own XCHAL_* macros, but according to the ISA book
they were introduced in RG-2015.0, which I believe could be tested as follows:
#define TARGET_SALT (XTENSA_MARCH_EARLIEST >= 27)
--
Thanks.
-- Max
/config/xtensa/xtensa.md | 4 +-
> 3 files changed, 172 insertions(+), 154 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
ion.
> * config/xtensa/xtensa.md (*subsi3_from_const):
> New insn_and_split pattern.
> ---
> gcc/config/xtensa/constraints.md | 2 +-
> gcc/config/xtensa/xtensa-protos.h | 1 +
> gcc/config/xtensa/xtensa.cc | 7 +++
> gcc/config/xtensa/xtensa.md | 24
> 4 files changed, 33 insertions(+), 1 deletion(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
sn attribute related to TARGET_DENSITY.
> (*extzvsi-1bit_addsubx): Ditto.
> ---
> gcc/config/xtensa/xtensa.md | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master with a more readable subject line.
--
Thanks.
-- Max
ge to also accept '*subx' pattern.
> (*subx): Remove.
> ---
> gcc/config/xtensa/xtensa.md | 31 +--
> 1 file changed, 13 insertions(+), 18 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
On Mon, May 22, 2023 at 10:48 PM Takayuki 'January June' Suwa
wrote:
>
> On 2023/05/23 11:27, Max Filippov wrote:
> > Hi Suwa-san,
>
> Hi!
>
> > This change introduces a bunch of test failures on big endian configuration.
> > I believe that's becau
at do not fit into signed 12 bits in the
> patterns added above.
> ---
> gcc/config/xtensa/predicates.md | 3 ++
> gcc/config/xtensa/xtensa.cc | 3 +-
> gcc/config/xtensa/xtensa.md | 75 +
> 3 files changed, 80 insertions(+), 1 deletion(-)
This change introduces a bunch of test failures on big endian configuration.
I believe that's because the starting bit position for zero_extract is counted
from different ends depending on the endianness.
--
Thanks.
-- Max
xecution test
+FAIL: gcc.dg/torture/pr97812.c -O2 -flto -fno-use-linker-plugin
-flto-partition=none execution test
+FAIL: gcc.dg/torture/pr97812.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects execution test
+FAIL: gcc.dg/tree-ssa/pr84969.c execution test
and some more in the gfortran testsuite.
--
Thanks.
-- Max
gcc/
* config/xtensa/xtensa-opts.h: New header.
* config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
xtensa_strict_align.
* config/xtensa/xtensa.cc (xtensa_option_override): When
-m[no-]strict-align is not specified in the command line set
xtensa_
gcc/
* config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
function.
include/
* xtensa-dynconfig.h (xtensa_config_v4): New struct.
(XCHAL_DATA_WIDTH, XCHAL_UNALIGNED_LOAD_EXCEPTION)
(XCHAL_UNALIGNED_STORE_EXCEPTION, XCHAL_UNALIGNED_LOAD_HW)
IL: c-c++-common/torture/builtin-arith-overflow-p-14.c -O2 execution test
+FAIL: c-c++-common/torture/builtin-arith-overflow-p-14.c -O2 -flto
-fno-use-linker-plugin -flto-partition=none execution test
+FAIL: c-c++-common/torture/builtin-shufflevector-1.c -O2 -flto
-fuse-linker-plugin -fno-fat-lto-objects execution test
--
Thanks.
-- Max
gcc/
* config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
libgcc/
* config/xtensa/crti.S: Add .note.GNU-stack section on linux.
* config/xtensa/crtn.S: Likewise.
* config/xtensa/lib1funcs.S: Likewise.
* config/xtensa/lib2funcs.S: Likewise.
---
gcc/conf
G_OK_STRICT, REG_OK_FOR_INDEX_P,
> REG_OK_FOR_BASE_P): Remove.
> ---
> gcc/config/xtensa/xtensa.h | 11 +--
> 1 file changed, 1 insertion(+), 10 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
gcc/
* config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
function.
include/
* xtensa-dynconfig.h (xtensa_config_v4): New struct.
(XCHAL_DATA_WIDTH, XCHAL_UNALIGNED_LOAD_EXCEPTION)
(XCHAL_UNALIGNED_STORE_EXCEPTION, XCHAL_UNALIGNED_LOAD_HW)
gcc/
* config/xtensa/xtensa.h (STRICT_ALIGNMENT): Make it 0 when the
hardware supports both unaligned loads and stores.
---
gcc/config/xtensa/xtensa.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index
sa/xtensa-protos.h | 1 +
> gcc/config/xtensa/xtensa.cc | 13 +++
> gcc/config/xtensa/xtensa.h| 1 +
> gcc/config/xtensa/xtensa.md | 37 +++
> 4 files changed, 52 insertions(+)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
gcc/
* config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
(xtensa_get_config_v3): New functions.
include/
* xtensa-dynconfig.h (xtensa_config_v3): New struct.
(xtensa_get_config_v3): New declaration.
(XCHAL_HAVE_CLAMPS, XCHAL_HAVE_DEPBITS, XCHAL_HAVE_E
's a chapter "Added instructions" at the end of the xtensa ISA book with
the list of such opcodes.
--
Thanks.
-- Max
gcc/
PR target/108919
* config/xtensa/xtensa-protos.h
(xtensa_prepare_expand_call): Rename to xtensa_expand_call.
* config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
to xtensa_expand_call.
(xtensa_expand_call): Emit the call and add a clob
Hi Suwa-san,
On Sat, Feb 25, 2023 at 3:33 AM Takayuki 'January June' Suwa
wrote:
> On 2023/02/25 19:01, Max Filippov wrote:
> > diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
> > index e52fba082550..babe7f0ebd68 100644
> > --- a/gcc/config
gcc/
PR target/108919
* config/xtensa/xtensa-protos.h
(xtensa_prepare_expand_call): Rename to xtensa_expand_call.
* config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
to xtensa_expand_call.
(xtensa_expand_call): Emit the call and add a clob
gcc/
* config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
and $(POSTCOMPILE) instead of manual dependency listing.
* config/xtensa/xtensa-dynconfig.c: Rename to ...
* config/xtensa/xtensa-dynconfig.cc: ... this.
---
gcc/config/xtensa/t-xtensa
gcc/
* config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
(coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
for the gcc-internal headers.
---
gcc/config/xtensa/xtensa-dynconfig.cc | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
On Thu, Feb 23, 2023 at 1:35 AM Max Filippov wrote:
>
> On Wed, Feb 22, 2023 at 7:42 PM Takayuki 'January June' Suwa
> wrote:
> >
> > In commit b2ef02e8cbbaf95fee98be255f697f47193960ec, the sibling call
> > insn included (use (reg:SI A0_REG)) to fix the
sa/elim_callee_saved.c | 37 +
> 2 files changed, 146 insertions(+), 25 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/xtensa/elim_callee_saved.c
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
+++
> .../gcc.target/xtensa/elim_GP_regmove_0.c | 23 ++
> .../gcc.target/xtensa/elim_GP_regmove_1.c | 10
> 3 files changed, 79 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_0.c
> create mode 100644 gcc/testsuite/gcc.target/xtensa/elim_GP_regmove_1.c
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
es of gcc internal
> headers rather than "" style which is used everywhere else
> in gcc?
No real reason for either. I'll fix it.
Thanks for your review.
-- Max
In commit b2ef02e8cbbaf95fee98be255f697f47193960ec, the sibling call
insn included (use (reg:SI A0_REG)) to fix the problem, which added
a USE chain unconditionally to the data flow of register A0 during
the sibling call.
As a result, df_regs_ever_live_p (A0_REG) returns true, so even if
register
This reverts commit b2ef02e8cbbaf95fee98be255f697f47193960ec.
---
gcc/config/xtensa/xtensa.cc | 2 ++
gcc/config/xtensa/xtensa.md | 20 +++-
2 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index 5c1c713e122d
same place as (return) in the normal call).
> * config/xtensa/xtensa.md
> (sibcall, sibcall_internal, sibcall_value, sibcall_value_internal):
> Revert changes by the previous patch.
> ---
> gcc/config/xtensa/xtensa.cc | 4 +++-
> gcc/config/xtensa/xtensa.md | 20 +++-
> 2 files changed, 10 insertions(+), 14 deletions(-)
I've reverted my fix and committed this fix minus the revert.
--
Thanks.
-- Max
xtensa/xtensa.md | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
gcc/
PR target/108876
* config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
for A0_REG.
* config/xtensa/xtensa.md (sibcall, sibcall_internal)
(sibcall_value, sibcall_value_internal): Add 'use' expression
for A0_REG.
---
gcc/config/xtensa/
clibc, no new regressions.
Committed to master.
--
Thanks.
-- Max
; + int array[1]; /* requires large stack. */
> + foo();
> + asm volatile("" : : "m"(array));
> + return a;
> +}
> +
> +/* register A15 is the reservoir of the stack pointer and cannot be
> eliminated if the frame pointer is needed.
> + other registers still can be, but through the frame pointer rather the
> stack pointer. */
> +int test2(int a) {
> + int* p = __builtin_alloca(16);
> + foo();
> + asm volatile("" : : "r"(p));
> + return a;
> +}
> +
> +/* in -O0 the composite hard registers may still remain unsplitted at
> pro_and_epilogue and must be excluded. */
> +extern double bar(void);
> +int __attribute__((optimize(0))) test3(int a) {
> + return bar() + a;
> +}
> +
> +/* { dg-final { scan-assembler-times "mov\t|mov.n\t" 21 } } */
This test looks quite fragile as the number of movs would vary
when the testsuite is run with additional options.
> +/* { dg-final { scan-assembler-times "a15, 8" 2 } } */
> --
> 2.30.2
--
Thanks.
-- Max
(reg:SI 8 a8 [85]))) "libgcc/libgcov-interface.c":253:20 4 {subsi3}
(expr_list:REG_DEAD (reg:SI 8 a8 [85])
(nil)))
during RTL pass: cprop_hardreg
libgcc/libgcov-interface.c:263:1: internal compiler error: in
extract_constrain_insn, at recog.cc:2692
It also introduces at least one regression in executable tests
in call0 build, I haven't tracked it down yet.
--
Thanks.
-- Max
compiler
error: in final_scan_insn_1, at final.cc:2808
0x6cb090 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
gcc/rtl-error.cc:108
0x639b17 final_scan_insn_1
gcc/final.cc:2808
0xb1817b final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
gcc/final.cc:2887
0xb18266 final_1
gcc/final.cc:1979
0xb18f94 rest_of_handle_final
gcc/final.cc:4240
0xb18f94 execute
gcc/final.cc:4318
--
Thanks.
-- Max
oops detecting references before overwriting in the
> split pattern.
> ---
> gcc/config/xtensa/xtensa.md | 72 +++--
> 1 file changed, 37 insertions(+), 35 deletions(-)
Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master with more human readable subject line.
--
Thanks.
-- Max
On Fri, Jan 20, 2023 at 8:39 PM Takayuki 'January June' Suwa
wrote:
> On 2023/01/21 0:14, Max Filippov wrote:
> > After having this many attempts and getting to the issues that are
> > really hard to detect I wonder if the target backend is the right place
> > for t
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