Ping?
Thanks,
Kugan
> On 2 Nov 2024, at 7:49 pm, Kugan Vivekanandarajah
> wrote:
>
> External email: Use caution opening links or attachments
>
>
> > On 31 Oct 2024, at 7:29 pm, Jakub Jelinek wrote:
> >
> > External email: Use caution opening links or a
> On 31 Oct 2024, at 7:29 pm, Jakub Jelinek wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Thu, Oct 31, 2024 at 08:21:09AM +, Kugan Vivekanandarajah wrote:
>>
>>
>>> On 31 Oct 2024, at 6:18 pm, Jakub Jelinek wrote:
>
This test bb-slp-77.c extracted relies on the completely unrolling of the
inner loop. However, for x86 in gcc.dg/vect/, loop is not unrolled and the
inner loop is vectorized thus not triggering expected BB SLP
Also noticed that the "vectorizing stmts using SLP” count is different when I
for
> On 31 Oct 2024, at 6:18 pm, Jakub Jelinek wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Tue, Oct 29, 2024 at 05:01:40AM +, Kugan Vivekanandarajah wrote:
>> For param_vect_max_version_for_alias_checks of 15, the average code si
Hi Richard,
> On 29 Oct 2024, at 8:33 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Tue, Oct 29, 2024 at 9:24 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>> Thanks for the review.
>>
&
Hi Richard,
Thanks for the review.
> On 28 Oct 2024, at 9:18 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Mon, Oct 28, 2024 at 9:35 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi,
>>
>> When ifcvt
Hi Richard,
Thanks for the review.
> On 25 Oct 2024, at 8:53 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Fri, Oct 25, 2024 at 12:22 AM Kugan Vivekanandarajah
> wrote:
>>
&g
Hi,
When ifcvt version a loop, it sets dont_vectorize to the scalar loop. If the
vector loop is not vectorized and removed, the scalar loop is still left with
dont_vectorize. As a result, BB vectorization will not happen.
This patch adds a new attribute called dont_loop_vectorize (that is differe
Hi,
This patch sets param_vect_max_version_for_alias_checks to 15.
This was causing GCC to miss vectorization opportunities in one internal
application making it slower than LLVM by about ~14%.
I've tested different param_vect_max_version_for_alias_checks such as 15 and 100
and the SPEC2017 resu
Hi,
Fix for PR115258 cases a performance regression in some of the TSVC kernels by
adding additional mov instructions.
This patch fixes this.
i.e., When operands are equal, it is likely that all of them get the same
register similar to:
(insn 19 15 20 3 (set (reg:V2x16QI 62 v30 [117])
Hi Richard,
Thanks for the review.
> On 8 Oct 2024, at 7:15 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Mon, Aug 5, 2024 at 7:05 AM Kugan Vivekanandarajah
> wrote:
>>
>>
>>
>>>
ping?
Thanks,
Kugan
From: Kugan Vivekanandarajah
Sent: Tuesday, 20 August 2024 6:18 PM
To: Jakub Jelinek
Cc: gcc-patches@gcc.gnu.org ;
richard.guent...@gmail.com ;
richard.sandif...@arm.com
Subject: Re: [PR middle-end/114635] Set OMP safelen handling to
Hi,
This patch Fixes absfloat16.c testcase to have the dg-add-options float16 at
the correct order. Due to this mixup, this test is failing for some arm
variants.
Is this OK for trunk?
Thanks,
Kugan
0001-Fix-absfloat16.c-testcase.patch
Description: 0001-Fix-absfloat16.c-testcase.patch
Hi Richard,
> On 17 Sep 2024, at 7:36 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Tue, Sep 17, 2024 at 10:31 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>>> On 10 Sep 2024, at 9:33
Hi Richard,
> On 10 Sep 2024, at 9:33 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Thu, Sep 5, 2024 at 3:19 AM Kugan Vivekanandarajah
> wrote:
>>
>> Thanks for the explanation.
>>
>>
>&g
Thanks for the explanation.
> On 2 Sep 2024, at 9:47 am, Andrew Pinski wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Sun, Sep 1, 2024 at 4:27 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Andrew.
>>
>>>
Hi Andrew.
> On 28 Aug 2024, at 2:23 pm, Andrew Pinski wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Tue, Aug 27, 2024 at 8:54 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the reply.
>&
Hi Richard,
Thanks for the reply.
> On 27 Aug 2024, at 7:05 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Tue, Aug 27, 2024 at 8:23 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>>
Hi Richard,
> On 22 Aug 2024, at 10:34 pm, Richard Biener
> wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Wed, Aug 21, 2024 at 12:08 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>>> On
Hi Richard,
> On 20 Aug 2024, at 6:09 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Fri, Aug 9, 2024 at 2:39 AM Kugan Vivekanandarajah
> wrote:
>>
>> Thanks for the comments.
>>
>>> On 2
ping? Any feedback.
Thanks,
Kugan
From: Kugan Vivekanandarajah
Sent: Monday, 5 August 2024 3:05 PM
To: Jakub Jelinek
Cc: gcc-patches@gcc.gnu.org ;
richard.guent...@gmail.com ;
richard.sandif...@arm.com
Subject: Re: [PR middle-end/114635] Set OMP safelen
Thanks for the comments.
> On 2 Aug 2024, at 8:36 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Fri, Aug 2, 2024 at 11:20 AM Kugan Vivekanandarajah
> wrote:
>>
>>
>>
>>> On 1 A
> On 15 Jul 2024, at 5:18 pm, Jakub Jelinek wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Mon, Jul 15, 2024 at 12:39:22AM +, Kugan Vivekanandarajah wrote:
>> OMP safelen handling is assigning backend provided max as an int even wh
> On 1 Aug 2024, at 10:46 pm, Richard Biener wrote:
>
> External email: Use caution opening links or attachments
>
>
> On Thu, Aug 1, 2024 at 5:31 AM Kugan Vivekanandarajah
> wrote:
>>
>>
>> On Mon, Jul 29, 2024 at 10:11 AM Andrew Pinski wrote:
&g
On Mon, Jul 29, 2024 at 10:11 AM Andrew Pinski wrote:
>
> On Mon, Jul 29, 2024 at 12:57 AM Kugan Vivekanandarajah
> wrote:
> >
> > On Thu, Jul 25, 2024 at 10:19 PM Richard Biener
> > wrote:
> > >
> > > On Thu, Jul 25, 2024 at 4:42 AM Kugan Vivekana
On Thu, Jul 25, 2024 at 10:19 PM Richard Biener
wrote:
>
> On Thu, Jul 25, 2024 at 4:42 AM Kugan Vivekanandarajah
> wrote:
> >
> > On Tue, Jul 23, 2024 at 11:56 PM Richard Biener
> > wrote:
> > >
> > > On Tue, Jul 23, 2024 at 10:27 AM Kugan Vivekana
On Tue, Jul 23, 2024 at 11:56 PM Richard Biener
wrote:
>
> On Tue, Jul 23, 2024 at 10:27 AM Kugan Vivekanandarajah
> wrote:
> >
> > On Tue, Jul 23, 2024 at 10:35 AM Andrew Pinski wrote:
> > >
> > > On Mon, Jul 22, 2024 at 5:26 PM Kugan Vivekanandaraja
On Tue, Jul 23, 2024 at 10:35 AM Andrew Pinski wrote:
>
> On Mon, Jul 22, 2024 at 5:26 PM Kugan Vivekanandarajah
> wrote:
> >
> > Revised based on the comment and moved it into existing patterns as.
> >
> > gcc/ChangeLog:
> >
> > * match.pd: Extend
Vivekanandarajah
Bootstrapped and regression test on aarch64-linux-gnu. Is this OK for trunk?
Thanks,
Kugan
From: Andrew Pinski
Sent: Monday, 15 July 2024 5:30 AM
To: Kugan Vivekanandarajah
Cc: gcc-patches@gcc.gnu.org ;
richard.guent...@gmail.com
Subject: Re
safelen.
gcc/testsuite/ChangeLog:
* c-c++-common/pr114635-1.cpp: New test.
* c-c++-common/pr114635-2.cpp: New test.
Signed-off-by: Kugan Vivekanandarajah
diff --git a/gcc/omp-low.cc b/gcc/omp-low.cc
index 4d003f42098..69feedbde54 100644
--- a/gcc/omp-low.cc
+++ b/gcc/omp-low.cc
ee-ssa/absfloat16.c: New test.
Signed-off-by: Kugan Vivekanandarajah
0001-abs-for-half-float.patch
Description: 0001-abs-for-half-float.patch
Pushing to trunk.
Thanks,
Kugan
Signed-off-by: Kugan Vivekanandarajah
2024-07-11 Kugan Vivekanandarajah
* MAINTAINERS: Update my email address.
diff --git a/MAINTAINERS b/MAINTAINERS
index 762b91256c4..d27640708c5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -704,7 +704,7
Thanks Richard.
Created https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115383
Thanks,
Kugan
On Fri, Jun 7, 2024 at 5:51 PM Richard Biener wrote:
>
> On Fri, 7 Jun 2024, Kugan Vivekanandarajah wrote:
>
> > Hi Richard,
> >
> > This seems to have introduced a regres
Hi Richard,
This seems to have introduced a regression. I am seeing ICE while
building TSVC_2 for AARCH64
with -O3 -flto -mcpu=neoverse-v2 -msve-vector-bits=128
tsvc.c: In function 's331':
tsvc.c:2744:8: internal compiler error: Segmentation fault
2744 | real_t s331(struct args_t * func_args)
Hi Richard,
Thanks for the review.
On Tue, 5 Nov 2019 at 23:08, Richard Biener wrote:
>
> On Tue, Nov 5, 2019 at 12:17 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi,
> > Thanks for the review.
> >
> > On Tue, 5 Nov 2019 at 03:57, H.J. Lu wrote:
> >
Hi,
Thanks for the review.
On Tue, 5 Nov 2019 at 03:57, H.J. Lu wrote:
>
> On Sun, Nov 3, 2019 at 6:45 PM Kugan Vivekanandarajah
> wrote:
> >
> > Thanks for the reviews.
> >
> >
> > On Sat, 2 Nov 2019 at 02:49, H.J. Lu wrote:
> > >
> > &g
Thanks for the reviews.
On Sat, 2 Nov 2019 at 02:49, H.J. Lu wrote:
>
> On Thu, Oct 31, 2019 at 6:33 PM Kugan Vivekanandarajah
> wrote:
> >
> > On Wed, 30 Oct 2019 at 03:11, H.J. Lu wrote:
> > >
> > > On Sun, Oct 27, 2019 at 6:33 PM Kugan Vivekanand
On Wed, 30 Oct 2019 at 03:11, H.J. Lu wrote:
>
> On Sun, Oct 27, 2019 at 6:33 PM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> >
> > Thanks for the review.
> >
> > On Wed, 23 Oct 2019 at 23:07, Richard Biener
> > wrote:
Hi Bernhard,
Thanks for the review.
On Tue, 29 Oct 2019 at 08:52, Bernhard Reutner-Fischer
wrote:
>
> On Mon, 28 Oct 2019 11:53:06 +1100
> Kugan Vivekanandarajah wrote:
>
> > On Wed, 23 Oct 2019 at 23:07, Richard Biener
> > wrote:
>
> > > Did you try this
Hi Richard,
Thanks for the pointers.
On Fri, 11 Oct 2019 at 22:33, Richard Biener wrote:
>
> On Fri, Oct 11, 2019 at 6:15 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> > Thanks for the review.
> >
> > On Wed, 2 Oct 2019 at 20:41, Richard Bien
Hi Richard,
Thanks for the review.
On Wed, 2 Oct 2019 at 20:41, Richard Biener wrote:
>
> On Wed, Oct 2, 2019 at 10:39 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi,
> >
> > As mentioned in the PR, attached patch adds COLLECT_AS_OPTIONS for
> > passing a
As reported in Linaro bug report
(https://bugs.linaro.org/show_bug.cgi?id=4636 ; there is no
reproducible testcase provided), for some applications, we see
(insn 126 125 127 9 (set (reg:DF 189)
(fma:DF (reg:DF 126 [ _74 ])
(reg:DF 190)
(reg:DF 191))) "ops.c":30 -1
Hi,
As mentioned in the PR, attached patch adds COLLECT_AS_OPTIONS for
passing assembler options specified with -Wa, to the link-time driver.
The proposed solution only works for uniform -Wa options across all
TUs. As mentioned by Richard Biener, supporting non-uniform -Wa flags
would require eit
00, Christophe Lyon
> wrote:
> > Committed on Kugan's behalf as rev 205891.
> >
> > On 11 December 2013 13:27, Marcus Shawcroft
> > wrote:
> > > On 10/12/13 20:23, Kugan wrote:
> > >
> > >> gcc/
> > >>
> > >>
Hi Richard,
Thanks for your comments.
On Thu, 16 May 2019 at 18:13, Richard Sandiford
wrote:
>
> kugan.vivekanandara...@linaro.org writes:
> > From: Kugan Vivekanandarajah
> >
> > Inorder to fix this PR.
> > * We need to change the whilelo pattern in backend
&
believe this is the only
way we can have GET_MODE_UNIT_SIZE of 0. Otherwise, we can check for
GET_MODE_UNIT_SIZE of zero.
Bootstrapped and regression tested attached patch on x86_64-linux-gnu
with no new regressions. Is this OK for trunk?
Thanks,
Kugan
gcc/ChangeLog:
2019-06-17 Kugan Vivekanandarajah
Hi Kyrill,
Thanks for the comments. Committed as you suggested.
Thanks,
Kugan
On Wed, 12 Jun 2019 at 18:07, Kyrill Tkachov
wrote:
>
> Hi Kugan,
>
> On 6/12/19 4:59 AM, Kugan Vivekanandarajah wrote:
> > AArch64 comment for ADDSUB iterator is a typo or copy-and-paste error.
AArch64 comment for ADDSUB iterator is a typo or copy-and-paste error.
Attached patch fixes this. I believe this falls under obvious
category. I will commit it after 48hrs unless comments should be
better worded.
Thanks,
Kugan
gcc/ChangeLog:
2019-06-12 Kugan Vivekanandarajah
* config
Hi Richard,
On Thu, 6 Jun 2019 at 22:07, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > Hi Richard,
> >
> > On Thu, 6 Jun 2019 at 19:35, Richard Sandiford
> > wrote:
> >>
> >> Kugan Vivekanandarajah writes:
> >> >
Hi Richard,
On Thu, 6 Jun 2019 at 19:35, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > Hi Richard,
> >
> > Thanks for the review. Attached is the latest patch.
> >
> > For testcase like cond_arith_1.c, with the patch, gcc ICE in fwprop. I
3 Jun 2019 at 19:08, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index b3fae5b..ad838dd 100644
> > --- a/gcc/tree-vect-loop-manip.c
> > +++ b/gcc/tree-vec
Hi Richard,
Thanks for the review,
On Fri, 31 May 2019 at 19:43, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > @@ -609,8 +615,14 @@ vect_set_loop_masks_directly (struct loop *loop,
> > loop_vec_info loop_vinfo,
> >
> >/* Get the mask v
Hi Richard,
Thanks for the review.
On Tue, 28 May 2019 at 20:44, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > [...]
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index b3fae5b..c15b8a2 100644
> > --- a/gcc/tree-v
Hi Richard,
Thanks for the review.
On Sat, 25 May 2019 at 19:41, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c
> > index 77d3dac..d6452a1 100644
> > --- a/gcc/tree-vect-loop-manip.c
Hi Richard,
On Fri, 17 May 2019 at 18:47, Richard Sandiford
wrote:
>
> Kugan Vivekanandarajah writes:
> > [...]
> >> > +{
> >> > + struct mem_address parts = {NULL_TREE, integer_one_node,
> >> > + NULL
4e9837ff9c0c080923f342e83574a6fdba2b3d92 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Tue, 5 Mar 2019 10:01:45 +1100
Subject: [PATCH] pr88838[v2]
As Mentioned in PR88838, this patch avoid the SXTW by using WHILELO on W
registers instead of X registers.
As mentined in PR, vect_verify_full_masking checks which IV widths
Hi,
On Fri, 17 May 2019 at 13:37, wrote:
>
> From: Kewen Lin
>
> Hi,
>
> Previous version link:
> https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00654.html
>
> Comparing with the previous version, I moved the generic
> parts of rs6000 target hook to IVOPTs. But I still kept
> the target hook as
Hi Richard,
On Thu, 16 May 2019 at 21:14, Richard Biener wrote:
>
> On Wed, May 15, 2019 at 4:40 AM wrote:
> >
> > From: Kugan Vivekanandarajah
> >
> > gcc/ChangeLog:
> >
> > 2019-05-15 Kugan Vivekanandarajah
> >
> >
Hi Richard,
On Wed, 15 May 2019 at 16:57, Richard Sandiford
wrote:
>
> Thanks for doing this.
>
> kugan.vivekanandara...@linaro.org writes:
> > From: Kugan Vivekanandarajah
> >
> > gcc/ChangeLog:
> >
> > 2019-05-15 Kugan Vivekanandarajah
> >
Hi Richard,
On Wed, 15 May 2019 at 23:24, Richard Earnshaw (lists)
wrote:
>
> On 15/05/2019 13:48, Richard Earnshaw (lists) wrote:
> > On 15/05/2019 03:39, kugan.vivekanandara...@linaro.org wrote:
> >> From: Kugan Vivekanandarajah
> >>
> >
> > The subje
From: Kugan Vivekanandarajah
This patch changes cse_insn to process parallel rtx one by one such that
any destination rtx in cse list is invalidated before processing the
next.
gcc/ChangeLog:
2019-05-16 Kugan Vivekanandarajah
PR target/88834
* cse.c (safe_hash): Handle
From: Kugan Vivekanandarajah
For aarch64 sve while_ult pattern, Set CC_REGNUM instead of clobbering.
gcc/ChangeLog:
2019-05-16 Kugan Vivekanandarajah
PR target/88834
* config/aarch64/aarch64-sve.md (while_ult): Set CC_REGNUM instead
of clobbering.
Change-Id
From: Kugan Vivekanandarajah
Inorder to fix this PR.
* We need to change the whilelo pattern in backend
* Change RTL CSE such that:
- Add support for VEC_DUPLICATE
- When handling PARALLEL rtx in cse_insn, we kill CSE defined by all the
parallel rtx at the end.
For example, with
From: Kugan Vivekanandarajah
gcc/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
* config/aarch64/aarch64.c (aarch64_classify_address): Relax
allow_reg_index_p.
gcc/testsuite/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
From: Kugan Vivekanandarajah
In PR88834, IVOPT is not selecting the right addressing mode. Inorder to fix
thix,
we need to add support to add IV uses for IFN_MASK_LOAD_LANES and
IFN_MASK_STORE_LANES.
In addition, we also need to add IV candidate with scaled by the element or
access size if
From: Kugan Vivekanandarajah
gcc/ChangeLog:
2019-05-15 Kugan Vivekanandarajah
PR target/88834
* tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
IFN_MASK_LOAD_LANES and IFN_MASK_STORE_LANES.
(find_interesting_uses_stmt): Likewise
Hi Jeff,
[...]
+ "#"
+ "&& 1"
+ [(const_int 0)]
+ "{
+ /* If we do not have an RMW operand, then copy the input
+ to the output before this insn. Also modify the existing
+ insn in-place so we can have make_field_assignment actually
+ generate a suitable extraction. */
+ if (!rtx_eq
Hi All,
LTO bootstrap for ARM fails with the commit
commit 67c18bce7054934528ff5930cca283b4ac967dca
* combine.c (record_dead_and_set_regs_1): Record the source unmodified
for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
It fails with an internal compiler error: in operator+=, at
pr
I have committed attached patch to aarch64/sve-acle-branch branch
which implements svbic.
Thanks,
Kugan
From 182bd15334874844bef5e317f55a6497f77e12ff Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Thu, 24 Jan 2019 20:57:19 +1100
Subject: [PATCH 1/3] svbic
Change-Id
I committed the following patch which implements svdot to
aarch64/sve-acle-branch. branch
Thanks,
Kugan
From b75cd8ba8f911c137380677b85882c22a6467bf6 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Fri, 18 Jan 2019 09:07:10 +1100
Subject: [PATCH] [SVE ACLE] Implements svdot
Change
I committed the following patch which implements svmulh to
aarch64/sve-acle-branch. branch
Thanks,
Kugan
From 33b76de8ef5f370dfacba0addef2fe0b1f2a61db Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Fri, 18 Jan 2019 07:33:26 +1100
Subject: [PATCH] [SVE ACLE] Implements svmulh
Change
I committed the following patch which implements svabs, svnot, svneg
and svsqrt to aarch64/sve-acle-branch. branch
Thanks,
Kugan
From 2af9609a58cf7efbed93f15413224a2552b9696d Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah
Date: Wed, 16 Jan 2019 07:45:52 +1100
Subject: [PATCH] [SVE ACLE
Hi Richard,
Thanks for the review.
On Thu, 8 Nov 2018 at 00:03, Richard Biener wrote:
>
> On Fri, Nov 2, 2018 at 10:02 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard,
> > Thanks for the review.
> > On Tue, 30 Oct 2018 at 01:25, Richard Biener
> >
Hi Richard,
Thanks for the review.
On Tue, 30 Oct 2018 at 01:25, Richard Biener wrote:
>
> On Mon, Oct 29, 2018 at 2:06 AM Kugan Vivekanandarajah
> wrote:
> >
> > Hi Richard and Jeff,
> >
> > Thanks for your comments.
> >
> > On Fri, 26
Hi Richard and Jeff,
Thanks for your comments.
On Fri, 26 Oct 2018 at 19:40, Richard Biener wrote:
>
> On Fri, Oct 26, 2018 at 4:55 AM Jeff Law wrote:
> >
> > On 10/25/18 4:33 PM, Kugan Vivekanandarajah wrote:
> > > Hi,
> > >
> > > PR87528 sho
this OK?
Thanks,
Kugan
gcc/testsuite/ChangeLog:
2018-10-26 Kugan Vivekanandarajah
PR middle-end/87469
* g++.dg/pr87469.C: New test.
gcc/ChangeLog:
2018-10-26 Kugan Vivekanandarajah
PR middle-end/87469
* tree-ssa-loop-niter.c (number_of_iterations_popcount): Fix niter
max
gcc/testsuite/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* gcc.dg/gimplefe-30.c: New test.
* gcc.dg/gimplefe-31.c: New test.
* gcc.dg/gimplefe-32.c: New test.
* gcc.dg/gimplefe-33.c: New test.
gcc/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* doc/generic.texi
2018-10-25 Kugan Vivekanandarajah
* tree-scalar-evolution.c (expression_expensive_p): Make BUILTIN POPCOUNT
as expensive when backend does not define it.
gcc/testsuite/ChangeLog:
2018-10-25 Kugan Vivekanandarajah
* gcc.target/aarch64/popcount4.c: New test.
Hi,
Attached patch implements ACLE svdup, svindex, svqad/qsub, svabd and
svmul built-ins.
Committed to ACLE branch,
Thanks,
Kugan
0001-svdup-svindex-svqad-qsub-svabd-and-svmul.patch.gz
Description: application/gzip
Hi,
On 28 July 2018 at 01:13, Richard Biener wrote:
> On July 27, 2018 3:33:59 PM GMT+02:00, "Martin Liška" wrote:
>>On 07/11/2018 02:31 PM, Richard Biener wrote:
>>> Why not simply make popcountdi available in the kernel? They do have
>>> implementations for other libgcc functions IIRC.
>>
>>C
,
Kugan
gcc/ChangeLog:
2018-07-18 Kugan Vivekanandarajah
PR middle-end/86544
* tree-ssa-phiopt.c (cond_removal_in_popcount_pattern): Handle
comparison with EQ_EXPR
in last stmt.
gcc/testsuite/ChangeLog:
2018-07-18 Kugan Vivekanandarajah
PR middle-end/86544
* g++.dg
Hi Andrew,
On 11 July 2018 at 15:43, Andrew Pinski wrote:
> On Tue, Jul 10, 2018 at 6:35 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Andrew,
>>
>> On 11 July 2018 at 11:19, Andrew Pinski wrote:
>> > On Tue, Jul 10, 2018 at 6:14 PM Kugan Vivekanandarajah
&
Hi Andrew,
On 11 July 2018 at 11:19, Andrew Pinski wrote:
> On Tue, Jul 10, 2018 at 6:14 PM Kugan Vivekanandarajah
> wrote:
>>
>> On 10 July 2018 at 23:17, Richard Biener wrote:
>> > On Tue, Jul 10, 2018 at 3:06 PM Kugan Vivekanandarajah
>> > wrote:
>
On 10 July 2018 at 23:17, Richard Biener wrote:
> On Tue, Jul 10, 2018 at 3:06 PM Kugan Vivekanandarajah
> wrote:
>>
>> Hi,
>>
>> Jeff told me that the recent popcount built-in detection is causing
>> kernel build issues as
>> ERROR: "__popcounts
pcount?
I am testing the attached RFC patch. Is this reasonable?
Thanks,
Kugan
gcc/ChangeLog:
2018-07-10 Kugan Vivekanandarajah
* tree-ssa-loop-niter.c (number_of_iterations_popcount): Check
if libfunc for popcount is available.
diff --git a/gcc/tree-ssa-loop-niter.c b/gcc/tre
Hi Richard,
Thanks for the review.
On 6 July 2018 at 20:17, Richard Biener wrote:
> On Fri, Jul 6, 2018 at 11:45 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> > It was rewrite_to_non_trapping_overflow available in tree.h. Thus
>> > f
gressions.
Thanks,
Kugan
gcc/ChangeLog:
2018-07-06 Kugan Vivekanandarajah
* tree-scalar-evolution.c (final_value_replacement_loop): Use
rewrite_to_non_trapping_overflow instead of rewrite_to_defined_overflow.
From 68a4f232f6cde68751f6785059121fe116363886 Mon Sep 17 00:00:00 2001
Fr
Hi Jeff,
Thanks for looking into it.
On 6 July 2018 at 08:03, Jeff Law wrote:
> On 06/24/2018 08:41 PM, Kugan Vivekanandarajah wrote:
>> Hi Jeff,
>>
>> Thanks for the comments.
>>
>> On 23 June 2018 at 02:06, Jeff Law wrote:
>>> On 06/22/2018 03:11 A
Hi Richard,
Thanks for the review.
On 28 June 2018 at 21:26, Richard Biener wrote:
> On Wed, Jun 27, 2018 at 7:00 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the review.
>>
>> On 25 June 2018 at 20:01, Richard Biener wrote:
&
Hi Richard,
On 29 June 2018 at 18:45, Richard Biener wrote:
> On Wed, Jun 27, 2018 at 7:09 AM Kugan Vivekanandarajah
> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the review,
>>
>> On 25 June 2018 at 20:20, Richard Biener wrote:
>> > On F
convert again.
>
> Where are the testcases?
I have fixed the above and added test-cases.
>
>> Bootstrap and regression testing on x86_64-linux-gnu. Is this OK if no
>> regressions.
>
>
> Does it mean you have run the tests or intend to run them in the future? It
&g
Hi,
This patch adds some of the missing patterns in match.pd for ABSU_EXPR.
Bootstrap and regression testing on x86_64-linux-gnu. Is this OK if no
regressions.
Thanks,
Kugan
gcc/ChangeLog:
2018-06-28 Kugan Vivekanandarajah
* match.pd (absu(x)*absu(x) -> x*x): Handle.
(a
Hi Richard,
Thanks for the review,
On 25 June 2018 at 20:20, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:16 AM Kugan Vivekanandarajah
> wrote:
>>
>> gcc/ChangeLog:
>
> @@ -1516,6 +1521,114 @@ minmax_replacement (basic_block cond_bb,
> basic_block mi
Hi Richard,
Thanks for the review.
On 25 June 2018 at 20:02, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:14 AM Kugan Vivekanandarajah
> wrote:
>>
>> gcc/ChangeLog:
>
> The canonical way is calling simplify_using_initial_conditions on the
> may_be_zero condit
Hi Richard,
Thanks for the review.
On 25 June 2018 at 20:01, Richard Biener wrote:
> On Fri, Jun 22, 2018 at 11:13 AM Kugan Vivekanandarajah
> wrote:
>>
>> [PATCH 1/3][POPCOUNT] Handle COND_EXPR in expression_expensive_p
>
> This says that COND_EXPR itself isn't
Hi Bin,
On 25 June 2018 at 13:56, Bin.Cheng wrote:
> On Mon, Jun 25, 2018 at 11:37 AM, Kugan Vivekanandarajah
> wrote:
>> Hi Bin,
>>
>> Thanks for your comments.
>>
>> On 25 June 2018 at 11:15, Bin.Cheng wrote:
>>> On Fri, Jun 22, 2018 at 5:11 PM,
Hi Bin,
Thanks for your comments.
On 25 June 2018 at 11:15, Bin.Cheng wrote:
> On Fri, Jun 22, 2018 at 5:11 PM, Kugan Vivekanandarajah
> wrote:
>> When we set niter with maybe_zero, currently final_value_relacement
>> will not happen due to expression_expensive_p not handlin
Hi Jeff,
Thanks for the comments.
On 23 June 2018 at 02:06, Jeff Law wrote:
> On 06/22/2018 03:11 AM, Kugan Vivekanandarajah wrote:
>> When we set niter with maybe_zero, currently final_value_relacement
>> will not happen due to expression_expensive_p not handling. Patch
gcc/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* tree-ssa-phiopt.c (cond_removal_in_popcount_pattern): New.
(tree_ssa_phiopt_worker): Call cond_removal_in_popcount_pattern.
gcc/testsuite/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* gcc.dg/tree-ssa/popcount3.c: New test
gcc/ChangeLog:
2018-06-22 Kugan Vivekanandarajah
* tree-ssa-loop-niter.c (number_of_iterations_popcount): If popcount
argument is checked for zero before entering loop, avoid checking again.
From 4f2a6ad5a49eec0a1cae15e033329f889f9137b9 Mon Sep 17 00:00:00 2001
From: Kugan
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