Hi, Fix for PR115258 cases a performance regression in some of the TSVC kernels by adding additional mov instructions. This patch fixes this.
i.e., When operands are equal, it is likely that all of them get the same register similar to: (insn 19 15 20 3 (set (reg:V2x16QI 62 v30 [117]) (unspec:V2x16QI [ (reg:V16QI 62 v30 [orig:102 vect__1.7 ] [102]) (reg:V16QI 62 v30 [orig:102 vect__1.7 ] [102]) ] UNSPEC_CONCAT)) "tsvc.c":11:12 4871 {aarch64_combinev16qi} (nil)) In this case, aarch64_split_combinev16qi would split it with one insm. Hence, when the operands are equal, split after reload. Bootstrapped and recession tested on aarch64-linux-gnu, Is this ok for trunk? Thanks, Kugan
0001-PATCH-AARCH64-PR115258-Fix-excess-moves.patch
Description: 0001-PATCH-AARCH64-PR115258-Fix-excess-moves.patch