ug.cgi?id=78294 .
Thanks,
Andrew Pinski
>
> gcc/
>
> PR c/121318
> * doc/extend.texi: Update the tls_model attribute.
>
> gcc/c-family/
>
> PR c/121318
> * c-attribs.cc (handle_tls_model_attribute): Use the default TLS
>
On Wed, Jul 30, 2025 at 4:18 AM Yury Khrustalev wrote:
>
> This optional header is used to bring in the definition of the
> struct __ifunc_arg_t type. Since it has been added to glibc only
> recently, the previous implementation had to check whether this
> header is present and, if not, it provide
On Wed, Apr 30, 2025 at 6:05 AM Richard Sandiford
wrote:
>
> Wilco Dijkstra writes:
> > Cleanup HWCAP defines - rather than including hwcap.h and then repeating it
> > using
> > #ifndef, just define the HWCAPs we need exactly as in hwcap.h.
> >
> > libgcc:
> > * config/aarch64/cpuinfo.c:
On Sun, Jul 27, 2025 at 11:43 AM Andrew Pinski wrote:
>
> When I added the factor operations to ifcvt, I messed how handling of removing
> the phi nodes. The fix is we need to remove the phi node that was factored out
> as we factored out the operator because otherwise scev can go w
On Wed, Jul 30, 2025 at 1:24 AM Richard Sandiford
wrote:
>
> Andrew Pinski writes:
> > Right now in simplify_subreg, there is code to try to simplify for word_mode
> > with the binary bitwise operators. The unary bitwise operator is not handle,
> > this causes an odd mi
tested on x86_64-linux-gnu.
PR rtl-optimization/121308
gcc/ChangeLog:
* simplify-rtx.cc (simplify_context::simplify_subreg): Handle
subreg of `not` with word_mode to make it symmetric with the
other bitwise operators.
Signed-off-by: Andrew Pinski
---
gcc/simplify
the new result and args.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr121236-1.c: New test.
* gcc.dg/torture/pr121295-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/torture/pr121236-1.c | 20
gcc/testsuite/gcc.dg/torture/pr121295-1.c
-linux-gnu.
gcc/ChangeLog:
* simplify-rtx.cc (simplify_context::simplify_subreg): Use
byte instead of 0 when calling simplify_subreg.
Signed-off-by: Andrew Pinski
---
gcc/simplify-rtx.cc | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/simplify-rtx.cc b
On Tue, Jul 29, 2025 at 7:40 AM Alfie Richards wrote:
>
> Hi All,
>
> Quick fixup for the gating (s/&&/|/) for an error I made.
>
> Only needed for trunk as the intrinsics were only added recently.
>
> Bootstrapped and reg tested on Aatch64.
Ok. Though this seems obvious since AARCH64_FL_SME2 and
On Tue, Jul 29, 2025 at 6:58 AM Stefan Schulze Frielinghaus
wrote:
>
> From: Stefan Schulze Frielinghaus
>
> Targets hppa, m68k, pdp11, rx, sh, vax do not default to LRA. Since old
> reload pass is still used, add option -mlra for those targets.
>
> For hppa, register 0 cannot be used as a gener
On Tue, Jul 29, 2025 at 6:31 AM Richard Sandiford
wrote:
>
> gcc.target/aarch64/saturating_arithmetic_{1,2}.c expect w0 and w1 to
> be duplicated into vectors. The tests expected the duplication of w1
> to happen first, but the other order would be fine too. A later
> simplify-rtx.cc patch happe
ofopt-execute): Call cleanup-after-saved-dg-test
if returning early for the -fauto-profile case failing case.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/lib/profopt.exp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/testsuite/lib/profopt.exp b/gcc/testsuite/lib/profopt.e
On Tue, Jul 29, 2025 at 1:44 AM Tamar Christina wrote:
>
> Hi Yury,
>
> > -Original Message-
> > From: Yury Khrustalev
> > Sent: Wednesday, July 23, 2025 9:45 AM
> > To: gcc-patches@gcc.gnu.org
> > Cc: Andrew Pinski ; Richard Sandiford
> > ;
On Mon, Jul 28, 2025 at 2:13 AM Richard Biener
wrote:
>
> On Sat, Jul 26, 2025 at 8:15 AM Andrew Pinski
> wrote:
> >
> > When I did r16-1067-gaa935ce40a7, I thought it would be
> > enough to mark the decl as mergable to get it to merge on
> > all targets. Tu
memcmp (NULL, NULL, 0)` which is UB.
This is obvious at least to me. Also `memcmp (NULL, NULL, 0)` is not
UB always; C26 makes it well defined. nonnull_if_nonzero is on the
builtins these days but many libc (older glibc included) still uses
nonnull which has priority over it.
Thanks,
Andrew Pinski
236-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/torture/pr121236-1.c | 20
gcc/tree-if-conv.cc | 60 +--
2 files changed, 55 insertions(+), 25 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/torture/pr121236-1.c
On Fri, Jul 25, 2025 at 5:14 AM Jennifer Schmitz wrote:
>
> This patch adds a new tuning model for the NVIDIA Olympus core.
> The values used here are based on the Software Optimization Guide
> that will be published imminently.
>
> Bootstrapped and tested on aarch64-linux-gnu, no regression.
>
>
15.
PR target/120119
gcc/ChangeLog:
* config/aarch64/cortex-a57-fma-steering.cc
(func_fma_steering::analyze):
Skip if renaming fails.
gcc/testsuite/ChangeLog:
* g++.dg/torture/pr120119-1.C: New test.
Signed-off-by: Andrew Pinski
(cherry picked from commit
): Skip if the hardreg which is never
live.
Signed-off-by: Andrew Pinski
(cherry picked from commit 6916639b48357334579cf94717a3e51dd003e940)
---
gcc/gcse.cc | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/gcc/gcse.cc b/gcc/gcse.cc
index 4ae19f28430..8641be1e3db 100644
DECL_MODE to mergeable_constant_section.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/cswtch-7.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/output.h | 3 ++
gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c | 48
gcc/tree-switch-conversion.cc
On Fri, Jul 25, 2025 at 8:50 PM Bill Wendling wrote:
>
> On Thu, Jul 24, 2025 at 3:20 PM Martin Uecker wrote:
> > Am Donnerstag, dem 24.07.2025 um 15:06 -0700 schrieb Bill Wendling:
> > > > constexpr size_t size = 4;
> > > > struct foo {
> > > > char (*buf)[size] __counted_by(size); // two diff
:
* doc/cpp.texi (#ifdef): Correct typo.
Signed-off-by: Andrew Pinski
---
gcc/doc/cpp.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/doc/cpp.texi b/gcc/doc/cpp.texi
index fc607926019..cc1656f4136 100644
--- a/gcc/doc/cpp.texi
+++ b/gcc/doc/cpp.texi
@@ -3252,7 +3252,7
On Wed, Jul 23, 2025 at 10:16 PM wrote:
>
> From: Dhruv Chawla
>
> This patch folds the following patterns:
> - max (a, add (a, b)) -> [sum, ovf] = adds (a, b); !ovf ? sum : a
> - min (a, add (a, b)) -> [sum, ovf] = adds (a, b); !ovf ? a : sum
> - max (a, sub (a, b)) -> [sum, ovf] = subs (a, b);
On Wed, Jul 23, 2025 at 1:37 AM Richard Biener
wrote:
>
> On Wed, Jul 23, 2025 at 10:05 AM Richard Sandiford
> wrote:
> >
> > Andrew Pinski writes:
> > > On Wed, Jul 23, 2025 at 12:03 AM Richard Biener
> > > wrote:
> > >>
> > >&g
On Wed, Jul 23, 2025 at 12:03 AM Richard Biener
wrote:
>
> On Tue, Jul 22, 2025 at 7:57 PM Andrew Pinski
> wrote:
> >
> > The switch conversion code will generate an array with VLA vector constants
> > in it
> > in some cases but this does not work as the leng
/120101
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr81627.c (fn1): Mark as noinline.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/tree-ssa/pr81627.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c
b/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c
On Fri, Apr 18, 2025 at 5:08 PM Andrew Pinski wrote:
>
> This fixes a long standing (since GCC 5) issue where the malloc+memset->calloc
> optimization would happen even if the memset was not always executed.
> This is a varient of Nathan's patch:
> https://inbox.sou
On Tue, Jul 22, 2025 at 12:50 PM Andrew Pinski wrote:
>
> On Thu, Jul 17, 2025 at 10:35 PM wrote:
> >
> > From: Soumya AR
> >
> > This patch adds functionality to dump AArch64 CPU tuning parameters to a
> > JSON
> > file. The new '-fdump-tuning-
RIALIZE_INTEGER_FIELD (alu_obj, "shift_reg", alu.shift_reg);
> + SERIALIZE_INTEGER_FIELD (alu_obj, "arith_shift", alu.arith_shift);
> + SERIALIZE_INTEGER_FIELD (alu_obj, "arith_shift_reg", alu.arith_shift_reg);
> + SERIALIZE_INTEGER_FIELD (alu_ob
On Tue, Jul 22, 2025, 11:05 AM Remi Machet wrote:
>
> On 7/22/25 13:32, Andrew Pinski wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > Regrename can fail in some case and `insn_rr[INSN_UID (insn)].op_info`
> > will be null. The
-conversion.cc (switch_conversion::check_final_bb): Reject
vector types which
have a non-constant number of elements.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/pr121091-1.c: New test.
Signed-off-by: Andrew Pinski
---
.../gcc.target/aarch64/sve/pr121091-1.c | 25
/120119
gcc/ChangeLog:
* config/aarch64/cortex-a57-fma-steering.cc
(func_fma_steering::analyze):
Skip if renaming fails.
gcc/testsuite/ChangeLog:
* g++.dg/torture/pr120119-1.C: New test.
Signed-off-by: Andrew Pinski
---
gcc/config/aarch64/cortex-a57-fma-steering.cc
On Tue, Jul 22, 2025, 6:09 AM Richard Biener wrote:
> With a patch still in development we get NULL STMT_VINFO_VECTYPE.
> One side-effect is that during scalar stmt testing we no longer
> pass a vectype. The following adjusts aarch64_vector_costs::add_stmt_cost
> to check for a non-NULL vectype
On Mon, Jul 21, 2025 at 11:21 PM Arjen Markus wrote:
>
> I am trying to build the branch via WSL on my Windows machine, but configure
> reports that it cannot find the mpc.h include file. It is correct - that is
> lacking, but installing or reinstalling mpc does not help. The program I want
> t
On Mon, Jul 21, 2025 at 4:46 PM Jeff Law wrote:
>
>
>
> On 7/19/25 2:22 PM, Andrew Pinski wrote:
> > When we have an empty function, things can go wrong with
> > cfi_startproc/cfi_endproc and a few other things like exceptions. So if
> > the only thing
On Mon, Jul 21, 2025 at 4:13 AM Tamar Christina wrote:
>
> > -Original Message-
> > From: Kyrylo Tkachov
> > Sent: Monday, July 21, 2025 11:36 AM
> > To: Tamar Christina
> > Cc: GCC Patches ; Richard Sandiford
> > ; Andrew Pinski ; Alex Copl
On Mon, Jul 21, 2025 at 12:07 AM Richard Biener
wrote:
>
> On Mon, Jul 21, 2025 at 1:30 AM Andrew Pinski
> wrote:
> >
> > I have seen this a few places though the testcase from PR 95906
> > is an obvious place where this shows up for sure.
> > This convert `cmp
-optimization/95906
gcc/ChangeLog:
* match.pd (cmp - 1): New pattern.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/cmp-2.c: New test.
* gcc.dg/tree-ssa/max-bitcmp-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/match.pd | 17
/120859
gcc/testsuite/ChangeLog:
* gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-*
commands like what is in afdo-crossmodule-1.c
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/tree-prof/afdo-crossmodule-1b.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/gcc
: New proc.
* g++.dg/missing-return.C: Update testcase for the !trap case.
* gcc.dg/pr109267-1.c: New test.
* gcc.dg/pr109267-2.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/g++.dg/missing-return.C | 4 +++-
gcc/testsuite/gcc.dg/pr109267-1.c
/vect/vect-reduc-cond-1.c: Require vect_condition.
* gcc.dg/vect/vect-reduc-cond-2.c: Likewise.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/vect/vect-reduc-cond-1.c | 1 +
gcc/testsuite/gcc.dg/vect/vect-reduc-cond-2.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc
On Thu, Jul 17, 2025 at 7:39 AM Richard Sandiford
wrote:
>
> Andrew Pinski writes:
> > r15-6789-ge7f98d9603808b added a new RTL pass for hardreg PRE for the hard
> > register
> > of FPM_REGNUM, this pass could get expensive if you have a large number of
> >
On Wed, Jul 16, 2025 at 12:55 PM John Ericson wrote:
>
> This dates back to the creation of top-level `libgcc` in
> fa9585134f6f58fa0d3da3ca4ad5493855aea2dc. I strongly suspect that this
> does nothing.
>
> Andrew Pinksi adds:
>
> > So looking into this further, MACHMODE_H used part of LIBGCC_DEPS
DEFAULT_PIE gcc.cc
gcc.cc:#ifdef ENABLE_DEFAULT_PIE
gcc.cc:#ifdef ENABLE_DEFAULT_PIE
So NAK.
Thanks,
Andrew Pinski
>
> libgcc/ChangeLog:
>
> * Makefile.in: Define NO_PIE_CFLAGS make variable via autoconf
> substitution.
> * configure.ac: New configure check t
never alive.
Signed-off-by: Andrew Pinski
---
gcc/gcse.cc | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/gcc/gcse.cc b/gcc/gcse.cc
index 96aae0e1718..6eddffcdba8 100644
--- a/gcc/gcse.cc
+++ b/gcc/gcse.cc
@@ -4238,8 +4238,15 @@ execute_hardreg_pre (void
On Wed, Jul 16, 2025 at 6:00 AM Richard Sandiford
wrote:
>
> Andrew Pinski writes:
> > r15-6789-ge7f98d9603808b added a new RTL pass for hardreg PRE for the hard
> > register
> > of FPM_REGNUM, but this pass does nothing if there can be any FPM_REGNUM
> > re
On Tue, Jul 15, 2025 at 12:52 AM Rainer Orth
wrote:
>
> commit 4d7baa94a48c27030c8ffcfaf3dd187be09903a9
> Author: Andrew Pinski
> Date: Sun Jul 13 11:56:03 2025 -0700
>
> tree: Add include to tm_p.h to tree.cc [PR120866]
>
> broke SPARC bootstrap:
>
> In
ility of having the FPM register.
Built and tested for aarch64-linux-gnu.
PR target/121095
gcc/ChangeLog:
* config/aarch64/aarch64.h (HARDREG_PRE_REGNOS): Don't include
FPM_REGNUM
if !TARGET_FP8.
Signed-off-by: Andrew Pinski
---
gcc/config/aarch64/aarch64.h | 4 ++
one should be easy I think; just `$CC
-print-sysroot` should print it out ...
NO_PIE_CFLAGS; check if __PIE__ is defined by the compiler and if so
add -fno-PIE to the CFLAGS
Thanks,
Andrew Pinski
> ---
> libgcc/Makefile.in | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git
On Tue, Jul 15, 2025 at 12:18 PM Andrew Pinski wrote:
>
> The switch conversion code asks initializer_constant_valid_p
> if the expression is a valid initializer constant and for
> vector types which have a non-constant elements initializer_constant_valid_p
> would return it is
.
Signed-off-by: Andrew Pinski
---
.../gcc.target/aarch64/sve/pr121091-1.c | 25 +++
gcc/varasm.cc | 5
2 files changed, 30 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr121091-1.c
diff --git a/gcc/testsuite
/ChangeLog:
* bid_binarydecimal.c (__mul_10x256_to_256): Mark c3 as being
used.
Signed-off-by: Andrew Pinski
---
libgcc/config/libbid/bid_binarydecimal.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/libgcc/config/libbid/bid_binarydecimal.c
b/libgcc/config/libbid/bid_binarydecimal.c
index d
On Tue, Jul 15, 2025 at 6:06 AM Jakub Jelinek wrote:
>
> On Tue, Jul 15, 2025 at 08:21:50AM -0400, Jason Merrill wrote:
> > Given the above that seems rather unlikely, but I suppose it's fine if you
> > want to do it that way. The patch is OK either way.
>
> Committed just the v2 patch. I can te
On Sun, Jul 6, 2025 at 2:23 PM Andrew Pinski wrote:
>
> These builtins requires a constant integer for the third argument but
> currently
> there is assert rather than error. This fixes that and updates the
> documentation too.
> Uses the same terms as was being used for the
statement, there is no reason for it being
there. So let's remove it and just use the value from it instead.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-if-conv.cc (combine_blocks): Remove predicated
dynamic array.
Signed-off-by: Andrew Pinski
---
gcc/tr
where we factor
out common code between the 2 sides of the if statement while in if-conv.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-if-conv.cc (fold_build_cond_expr): Return early if lhs and rhs
are the same.
Signed-off-by: Andrew Pinski
---
gcc/tree
-reduc-cond-2.c: New test.
* gcc.dg/vect/vect-reduc-cond-3.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/vect/vect-reduc-cond-1.c | 59 ++
gcc/testsuite/gcc.dg/vect/vect-reduc-cond-2.c | 61 ++
gcc/testsuite/gcc.dg/vect/vect-reduc-cond-3.c | 56 ++
gcc
On Mon, Jul 14, 2025 at 2:10 AM Andrew Pinski wrote:
>
>
>
> On Mon, Jul 14, 2025, 1:28 AM Robin Dapp wrote:
>>
>> For the record, the Linaro CI notified me that this caused regressions:
>>
>> Produces 2 regressions:
>> |
>> | regressions.sum:
On Mon, Jul 14, 2025 at 2:57 AM Claudiu Zissulescu-Ianculescu
wrote:
>
> > I see it now from Richard B.. Also I noticed you missed Richard S.'s
> > suggestion of using a typedef which will definitely help in the future
> > where we could even replace this with an enum class and overload the
> > bi
On Mon, Jul 14, 2025 at 5:32 AM Yury Khrustalev wrote:
>
> This optional header is used to bring in the definition of the
> struct __ifunc_arg_t type. Since it has been added to glibc only
> recently, the previous implementation had to check whether this
> header is present and, if not, it provide
On Mon, Jul 14, 2025, 1:28 AM Robin Dapp wrote:
> For the record, the Linaro CI notified me that this caused regressions:
>
> Produces 2 regressions:
> |
> | regressions.sum:
> | Running gcc:gcc.dg/dg.exp ...
> | FAIL: gcc.dg/pr103248.c (internal compiler error: in
> optab_for_tree_code,
-aix* because those two call a target
specific function to do create the internal label.
Pushed as obvious after a build of gcc for pdp11-aout and x86_64-linux-gnu.
PR middle-end/120866
gcc/ChangeLog:
* tree.cc: Add include to tm_p.h.
Signed-off-by: Andrew Pinski
---
gcc
On Fri, Jul 11, 2025 at 9:59 AM Andi Kleen wrote:
>
> Dimitar Dimitrov writes:
>
> > A few tests started failing recently on pru-unknown-elf because it uses
> > SJLJ implementation for exceptions:
> > FAIL: g++.dg/ext/musttail3.C -std=c++11 (test for excess errors)
> > .../gcc/gcc/testsuite/
stmt could be a split point of a basic block. */
> > for (gimple_stmt_iterator gsi = gsi_start_bb (bb);
> > !gsi_end_p (gsi); gsi_next (&gsi))
> > {
> > gimple *stmt = gsi_stmt (gsi);
> > location_t loc =
On Fri, Jul 11, 2025 at 2:51 AM Claudiu Zissulescu-Ianculescu
wrote:
>
> Hi,
> >
> > Currently, the data type of sanitizer flags is unsigned int, with
> > SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual
> > enumerator for enum sanitize_code. Use 'uint64_t' data type to
On Thu, Jul 10, 2025 at 12:05 PM Nicolas Werner
wrote:
>
> Users might be using a space in their build directory path. To allow
> specifying such a root for the module mapper started by GCC, we need the
> command to allow quotes. Previously quoting a path passed to the module
> mapper was not poss
On Thu, Jul 10, 2025 at 6:22 AM Richard Sandiford
wrote:
>
> LD1Q gathers and ST1Q scatters are unusual in that they operate
> on 128-bit blocks (effectively VNx1TI). However, we don't have
> modes or ACLE types for 128-bit integers, and 128-bit integers
> are not the intended use case. Instead,
On Thu, Jul 10, 2025, 4:12 AM
wrote:
> From: Indu Bhagat
>
> Currently, the data type of sanitizer flags is unsigned int, with
> SANITIZE_SHADOW_CALL_STACK (1UL << 31) being highest individual
> enumerator for enum sanitize_code. Use 'uint64_t' data type to allow
> for more distinct instrumenta
On Wed, Jul 9, 2025 at 7:07 AM Richard Sandiford
wrote:
>
> TARGET_VECTORIZE_VEC_PERM_CONST has code to match the SVE2.1
> "hybrid VLA" DUPQ, EXTQ, UZPQ{1,2}, and ZIPQ{1,2} instructions.
> This matching was conditional on !BYTES_BIG_ENDIAN.
>
> The ACLE code also lowered the associated SVE2.1 intr
On Wed, Jul 9, 2025 at 7:09 AM Richard Sandiford
wrote:
>
> When using SVE INDEX to load an Advanced SIMD vector, we need to
> take account of the different element ordering for big-endian
> targets. For example, when big-endian targets store the V4SI
> constant { 0, 1, 2, 3 } in registers, 0 bec
On Mon, Jul 7, 2025 at 2:56 AM Kyrylo Tkachov wrote:
>
> Hi all,
>
> Similar to the BCAX patch, we can also use EOR3 for 64-bit modes,
> just by adjusting the mode iterator used.
> Thus for input:
>
> uint32x2_t
> bcax_s (uint32x2_t a, uint32x2_t b, uint32x2_t c)
> {
> return EOR3 (a, b, c);
> }
argument
being a constant.
gcc/testsuite/ChangeLog:
* gcc.dg/crc-non-cst-poly-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/builtins.cc | 12 +---
gcc/doc/extend.texi | 4 ++--
gcc/internal-fn.cc
sure the LHS is an
is_gimple_reg.
Signed-off-by: Andrew Pinski
---
gcc/tree-cfg.cc | 13 +
1 file changed, 13 insertions(+)
diff --git a/gcc/tree-cfg.cc b/gcc/tree-cfg.cc
index 72763fd5a55..9a5479a2d38 100644
--- a/gcc/tree-cfg.cc
+++ b/gcc/tree-cfg.cc
@@ -46
the EQ_EXPR seperately.
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr120951-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/gcc.dg/torture/pr120951-1.c | 12
gcc/tree-call-cdce.cc | 17 +++--
2 files changed, 27 insertions(+), 2
On Fri, Jul 4, 2025 at 9:18 AM Richard Sandiford
wrote:
>
> Lowpart subregs are generally disallowed on big-endian SVE vector
> registers, since the first memory element is stored at the least
> significant end of the register, rather than the most significant end.
> (See the comment at the head o
On Fri, Jul 4, 2025 at 9:15 AM Richard Sandiford
wrote:
>
> aarch64_expand_vector_init contains some divide-and-conquer code
> that tries to load the odd and even elements into 64-bit registers
> and then ZIP them together. On big-endian targets, the even elements
> are more significant than the
I didn't realize the white spaces in this file was just spaces
and not tabs. This replaces the 2 tabs that I added for the aarch64
port reviewer to be spaces rather than tabs.
Pushed as obvious.
ChangeLog:
* MAINTAINERS: Replace tabs with spaces.
Signed-off-by: Andrew P
On Thu, Jul 3, 2025, 11:48 PM Richard Biener
wrote:
> On Thu, Jul 3, 2025 at 9:34 PM Andrew Pinski
> wrote:
> >
> > These 2 testcases were originally designed for the default -march= of
> > x86_64 so if you pass -march=native (on a target with AVX512 enabled),
> &g
-avx512 machine with -march=native.
PR testsuite/120643
gcc/testsuite/ChangeLog:
* gcc.target/i386/vect-pragma-target-1.c: Add `-mno-sse3
-mprefer-vector-width=512`
to the options.
* gcc.target/i386/vect-pragma-target-2.c: Likewise.
Signed-off-by: Andrew Pinski
x86_64-linux-gnu.
PR c/118948
gcc/ChangeLog:
* fold-const.cc (tree_expr_nonnegative_warnv_p): Use
error_operand_p instead of checking for error_mark_node directly.
gcc/testsuite/ChangeLog:
* gcc.dg/pr118948-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc
As mentioned in
https://inbox.sourceware.org/gcc/ea828262-8f8f-4362-9ca8-312f7c20e...@nvidia.com/T/#m6e7e8e11656189598c759157d5d49cbd0ac9ba7c.
Adding myself as an aarch64 port reviewer.
ChangeLog:
* MAINTAINERS: Add myself as an aarch64 port reviewer.
Signed-off-by: Andrew Pinski
On Tue, May 20, 2025 at 6:44 PM Andrew Pinski wrote:
>
> This was introduced by r15-1797-gd8fe4f05ef448e . I had missed that
> the LHS of the cabs call could be NULL. This seems to only happen at -O0,
> I tried to produce one that happens at -O1 but needed many different
> options
definition.
gcc/testsuite/ChangeLog:
* g++.dg/opt/tail-call-1.C: New test.
Signed-off-by: Andrew Pinski
---
gcc/testsuite/g++.dg/opt/tail-call-1.C | 19 +
gcc/tree-tailcall.cc | 37 --
2 files changed, 48 insertions(+), 8 deletions
On Sun, Jun 29, 2025, 12:18 PM Jeff Law wrote:
>
>
> On 6/27/25 12:16 AM, Andrew Pinski wrote:
> > Since after a tail call function (even if it is tail called in the end),
> > the current function does not care about the local memory any more so
> > there is no
On Sat, Jun 28, 2025, 1:19 PM Jeff Law wrote:
>
>
> On 6/27/25 12:20 PM, Andrew Pinski wrote:
> >
>
> >
> >
> > I have been trying to most of the phiopt to over to use match and
> > simplify (via match.pd patterns). Is there an issue why this can't
On Fri, Jun 27, 2025, 11:06 AM Raphael Moreira Zinsly <
rzin...@ventanamicro.com> wrote:
> Hi all,
>
> For targets that have expensive shifts this may not get a better
> sequence right now, specially for AVR and MSP430 according to
> our tests.
> Before I start looking for a fix on those targets I
On Fri, Jun 27, 2025, 11:06 AM Raphael Moreira Zinsly <
rzin...@ventanamicro.com> wrote:
> Hi all,
>
> For targets that have expensive shifts this may not get a better
> sequence right now, specially for AVR and MSP430 according to
> our tests.
> Before I start looking for a fix on those targets I
that argument is not an incoming argument.
gcc/testsuite/ChangeLog:
* c-c++-common/pr42909-1.c: New testcase
* c-c++-common/pr42909-2.c: New testcase
* c-c++-common/pr42909-3.c: New testcase
* c-c++-common/pr42909-4.c: New testcase
Signed-off-by: Andrew
-0.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/calls.cc | 25 +
gcc/testsuite/c-c++-common/pr71761-1.c | 17 +
gcc/testsuite/gcc.dg/torture/tail-call-0.c | 42 ++
3 files changed, 77 insertions(+), 7 deletions(-)
create
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Wednesday, June 25, 2025 4:20 PM
> To: Andrew Pinski (QUIC) ; gcc-
> patc...@gcc.gnu.org
> Subject: RE: [PATCH] expand: Allow sibcalling for return
> structures in some cases [PR71761]
>
> > -
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Monday, June 23, 2025 11:39 AM
> To: Andrew Pinski (QUIC) ; gcc-
> patc...@gcc.gnu.org
> Subject: RE: [PATCH] expand: Allow sibcalling for return
> structures in some cases [PR71761]
>
> > -
On Mon, Jun 23, 2025, 6:09 PM Jeff Law wrote:
>
>
> On 6/7/25 1:04 AM, Andrew Pinski wrote:
> > Currently expand_constructor when it comes to BLKmode types, we store out
> > the constructor to memory. But for the zero case, we could just use
> `const_int 0`
> >
> -Original Message-
> From: Andrew Pinski (QUIC)
> Sent: Monday, June 23, 2025 8:01 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Andrew Pinski (QUIC)
> Subject: [PATCH] expand: Allow sibcalling for return structures
> in some cases [PR71761]
>
> In the case of tail
n't reject
"structured" returns if the addr is the same as the current
result decl's memory.
gcc/testsuite/ChangeLog:
* c-c++-common/pr71761-1.c: New test.
Signed-off-by: Andrew Pinski
---
gcc/calls.cc | 23 +--
gcc/te
On Fri, Jun 20, 2025, 4:47 PM Wilco Dijkstra wrote:
>
> TARGET_CONST_ANCHOR appears to trigger too often, even on simple
> immediates.
> It inserts extra ADD/SUB instructions even when a single MOV exists.
> Disable it to improve overall code quality: on SPEC2017 it removes
> 1850 ADD/SUB instruc
On Wed, Jun 18, 2025, 11:11 AM Andrew MacLeod wrote:
>
> On 6/18/25 14:00, Andrew Pinski wrote:
> >
> >
> > +/* { dg-final { scan-tree-dump-not "foo" "evrp" } } */
> >
> > May I suggest this be changed to "foo " (adding a space).
On Tue, Jun 10, 2025, 10:03 AM Andrew MacLeod wrote:
> simplify_switch_using_ranges has never been converted over properly to
> use irange. It still uses get_legacy_range, and as a result, is very
> limited in how it processes cases labels. In particular it is unable to
> remove cases in the mi
On Mon, Jun 16, 2025, 10:57 PM Jakub Jelinek wrote:
> Hi!
>
> The following testcase ICEs, because optimize_crc_loop inserts a call
> statement before labels instead of after labels.
>
> Fixed thusly (plus fixed other issues noticed around it),
> bootstrapped/regtested on x86_64-linux and i686-li
On Wed, Jun 11, 2025, 10:17 PM haochen.jiang
wrote:
> On Linux/x86_64,
>
> dcb9af06212e8bb36e84a1b8498c625c29abeb6f is the first bad commit
> commit dcb9af06212e8bb36e84a1b8498c625c29abeb6f
> Author: Gwenole Beauchesne
> Date: Mon Jun 2 14:44:55 2025 -0700
>
> c/c++: Handle '#pragma GCC ta
On Wed, Jun 11, 2025, 9:24 AM Andrew MacLeod wrote:
>
> On 6/11/25 11:02, Andrew MacLeod wrote:
> >
> > On 6/10/25 17:05, Richard Biener wrote:
> >>
> >>
> >>> Am 10.06.2025 um 22:18 schrieb Andrew MacLeod :
> >>>
> >>>
> >>>
> >>> I had a question asked of me, and now I'm passing the buck.
> >
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