Re: [PATCH 2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB_OS

On Tue, 25 Feb 2025 08:23:27 -0800 (PST), Palmer Dabbelt wrote: > On Fri, 14 Feb 2025 05:04:20 PST (-0800), ji...@linux.alibaba.com wrote: > > According to the definition in gcc/config/riscv/t-linux, after obtaining > > the reused multilib_dir result using TARGET_COMPUTE_MULTILIB, we should > > set

Re: [PATCH] combine: Discard REG_UNUSED note in i2 when register is also referenced in i3 [PR118739]

On Mon, Feb 24, 2025 at 10:46 AM Richard Biener wrote: > > On Wed, Feb 12, 2025 at 1:16 PM Uros Bizjak wrote: > > > > The combine pass is trying to combine: > > > > Trying 16, 22, 21 -> 23: > >16: r104:QI=flags:CCNO>0 > >22: {r120:QI=r104:QI^0x1;clobber flags:CC;} > > REG_UNUSED fla

[PATCH v3] RISC-V: Fix bug for expand_const_vector interleave [PR118931]

From: Pan Li This patch would like to fix one bug when expanding const vector for the interleave case. For example, we have: base1 = 151 step = 121 For vec_series, we will generate vector in format of v[i] = base + i * step. Then the vec_series will have below result for HImode, and we can fin

Re: [pushed][PR115458][LRA]: Run split sub-pass more times

On 2/25/25 1:07 PM, Vladimir Makarov wrote: The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115458 The patch was successfully bootstrapped and tested on x86-64, ppc64le, aarch64. Thanks a ton! jeff

[PATCH 0/4] Fortran: Improve flow of intrinsics/library documentation [PR47928]

This series addresses PR 47928, a Fortran documentation issue filed back in 2011. Quoting from the issue: "IMHO the order of paragraphs in the intrinsics chapter of the manual is a bit illogical. For instance, the description comes before the (strangely named) syntax paragraph, so when the descr

RE: [PATCH v2] RISC-V: Fix bug for expand_const_vector interleave [PR118931]

Thanks Robin. > - IMHO we need to check both series for overflow, if step2 overflows in the > smaller type isn't the result equally wrong? The series2 will shift right before IOR, thus the overflow bits never effect on the final result. For example, the series2 will be similar as below after shi

Re: [committed] d: Increase max parallelism of the D testsuite

On Tue, Feb 25, 2025 at 12:00 PM Iain Buclaw wrote: > > Hi, > > It was noticed that when running the testsuite for gdc and libphobos in > parallel, this was capped at 10 simultaneous jobs each. Increase this > limit to 128, which enables running for example `make check-d -j48` to > complete in ha

Re: [PATCH] libstdc++: implement constexpr memory algorithms

On Tue, 25 Feb 2025 at 22:46, Jonathan Wakely wrote: > > On Thu, 20 Feb 2025 at 16:23, Patrick Palka wrote: > > > > On Sun, 16 Feb 2025, Giuseppe D'Angelo wrote: > > > > > Hello, > > > > > > the attached patch implements the C++26 papers that add `constexpr` to the > > > specialized memory algori

Re: [PATCH] libstdc++: implement constexpr memory algorithms

On Thu, 20 Feb 2025 at 16:23, Patrick Palka wrote: > > On Sun, 16 Feb 2025, Giuseppe D'Angelo wrote: > > > Hello, > > > > the attached patch implements the C++26 papers that add `constexpr` to the > > specialized memory algorithms (the uninitialized_* family). Tested on x86-64 > > Linux. > > > > T

[committed] libstdc++: Fix typo in std::fill SFINAE constraint [PR93059]

The r15-4321-gd8ef4471cb9c9f change incorrectly used __value as the member of the __memcpyable_integer trait, but it should have been __width. That meant this overload was not being used for _Tp != _Up. Also return after doing the loop for the consteval case. The missing return wasn't causing inco

[PATCH] x86: Move TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P to i386.cc

Move the TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P target hook from i386.h to i386.cc. * config/i386/i386.h (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Moved to ... * config/i386/i386.cc (TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P): Here. -- H.J. From c45fb0f96c6bbf5aeea5a022e231346029d4c6c7 Mon Se

Re: [PATCH] i386: Fix pr101950-2.c [PR115028]

On Tue, Feb 25, 2025 at 1:05 AM Jakub Jelinek wrote: > > On Thu, Feb 20, 2025 at 01:11:25PM -0800, Andrew Pinski wrote: > > So what is happening here is that after r15-268-g9dbff9c05520a7, > > a move instruction still exists after combine and the register > > allocator choses different register al

[committed] libphobos: Add script for extracting unittests from phobos

Hi, This patch adds a script to parse all unittests annotated with three slashes (`///') and extracts them into a standalone test case. The intended use is for generating inexpensive tests to be ran for the phobos testsuite. Committed to mainline. Regards, Iain. --- libphobos/ChangeLog:

[committed] libphobos: Organize druntime and phobos tests under common directory

Hi, This patch organizes the druntime and phobos tests to prepare for a future change where tests will be generated within these directories. The druntime and druntime_shared tests are identical, save for one compiled with `-static-libphobos' and the other `-shared-libphobos'. Move them to libpho

[PATCH] Alpha: Fix base block alignment calculation regression

In determination of base block alignment we only examine a COMPONENT_REF tree node at hand without ever checking if its ultimate alignment has been reduced by the combined offset going back to the outermost object. Consequently cases have been observed where quadword accesses have been produce

[pushed] doc: update C++98 bootstrap note

r10-11132 uses C++11 default member initializers, which breaks bootstrapping with a C++98 compiler. gcc/ChangeLog: * doc/install.texi: 10.5 won't bootstrap with C++98. --- gcc/doc/install.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/doc/install.texi b/gcc/

[pushed][PR115458][LRA]: Run split sub-pass more times

The following patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115458 The patch was successfully bootstrapped and tested on x86-64, ppc64le, aarch64. commit 2341f675edadd6370147d2bc55ca7761a7ecfaa1 Author: Vladimir N. Makarov Date: Tue Feb 25 15:01:15 2025 -0500 [PR115458][LRA

RE: [PATCH v2] RISC-V: Fix a typo in zce to zcf implication

Hi Jeff, That check is performed in a lambda function: {"zce", "zcf", [] (const riscv_subset_list *subset_list) -> bool { return subset_list->xlen () == 32 && subset_list->lookup ("f"); }}, The typo was in a rule itself: {"zcf", "f", ... So, with this fix zcf in implied by zce

Re: [PATCH] pru: Fix pru_pragma_ctable_entry diagnostics [PR118991]

On Tue, Feb 25, 2025 at 05:17:10PM +0100, Jakub Jelinek wrote: > Hi! > > HOST_WIDE_INT_PRINT* macros aren't supposed to be used in > gcc-internal-format format strings, we have the w modifier for HOST_WIDE_INT > in that case, the HOST_WIDE_INT_PRINT* macros might not work properly on > some hosts

Re: [PATCH] libstdc++: add support for constexpr stable_sort (P2562R1)

On Wed, 8 Jan 2025 at 10:49, Giuseppe D'Angelo wrote: > > Hello, > > This patch adds constexpr to the stable_sort algorithms, implementing > P2562R1 for C++26. Tested on x86-64 Linux. This one looks good too, so I'll also push this. Thanks!

[committed] libphobos: Add scripts to update Makefile.am after an upstream merge

Hi, These two scripts have been used for updating Makefile.am whenever there's been a file added/removed from either Druntime or Phobos since the start, but never included in the source tree. This patch finally adds them, rather than referencing an outdated gist. Committed to mainline. Regards,

Re: [PATCH v2] libstdc++: add a constexpr macro for C++26

On Wed, 8 Jan 2025 at 12:28, Giuseppe D'Angelo wrote: > > Hi, > > On 08/01/2025 13:06, Jonathan Wakely wrote: > > I agree with using 202400L, for consistency with the actual defined > > value, and because at a quick glance it's unclear whether 202303 is > > the value for C++23 or not. You have to

Re: [Fortran, Patch, PR108233, v1] Prevent SAVE_EXPR on lhs in assign.

On 2/25/25 9:18 AM, Andre Vehreschild wrote: Hi all, for some recreation after all the coarray stuff, I found this pr cc'ed to me. Taking a look at it, I figured that using a SAVE_EXPR on the lhs of the assignment was doing the harm. The data seems to be not written back into the vector shaped d

Re: [PATCH] libstdc++: implement constexpr memory algorithms

Hello, Thanks for the review! On 20/02/2025 17:22, Patrick Palka wrote: On Sun, 16 Feb 2025, Giuseppe D'Angelo wrote: Hello, the attached patch implements the C++26 papers that add `constexpr` to the specialized memory algorithms (the uninitialized_* family). Tested on x86-64 Linux. Thank y

[Fortran, Patch, PR108233, v1] Prevent SAVE_EXPR on lhs in assign.

Hi all, for some recreation after all the coarray stuff, I found this pr cc'ed to me. Taking a look at it, I figured that using a SAVE_EXPR on the lhs of the assignment was doing the harm. The data seems to be not written back into the vector shaped data type (like a complex number in this case).

[committed] d/i386: Add CET TargetInfo key and predefined version [PR118654]

Hi, This patch adds a new i386 d_target_info_spec entry to handle requests for `__traits(getTargetInfo, "CET")', and add predefined target version `GNU_CET' when the option `-fcf-protecton' is used. Both TargetInfo key and predefined version have been added to the D front-end documentation. In t

[committed] d: Increase max parallelism of the D testsuite

Hi, It was noticed that when running the testsuite for gdc and libphobos in parallel, this was capped at 10 simultaneous jobs each. Increase this limit to 128, which enables running for example `make check-d -j48` to complete in half the time. Bootstrapped and regression tested on x86_64-linux-g

Re: [PATCH 2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB_OS

On Fri, 14 Feb 2025 05:04:20 PST (-0800), ji...@linux.alibaba.com wrote: > According to the definition in gcc/config/riscv/t-linux, after obtaining > the reused multilib_dir result using TARGET_COMPUTE_MULTILIB, we should > set multilib_os_dir to its parent directory. > > For example, when building

Re: [PATCH v2] RISC-V: Fix bug for expand_const_vector interleave [PR118931]

> This patch would like to fix one bug when expanding const vector for the > interleave case. For example, we have: > > base1 = 151 > step = 121 > > For vec_series, we will generate vector in format of v[i] = base + i * step. > Then the vec_series will have below result for HImode, and we can find

[PATCH] avr: Fix up avr_print_operand diagnostics [PR118991]

Hi! As can be seen in gcc/po/gcc.pot: #: config/avr/avr.cc:2754 #, c-format msgid "bad I/O address 0x" msgstr "" exgettext couldn't retrieve the whole format string in this case, because it uses a macro in the middle. output_operand_lossage is c-format function though, so we can't use %wx to pri

[PATCH] pru: Fix pru_pragma_ctable_entry diagnostics [PR118991]

Hi! HOST_WIDE_INT_PRINT* macros aren't supposed to be used in gcc-internal-format format strings, we have the w modifier for HOST_WIDE_INT in that case, the HOST_WIDE_INT_PRINT* macros might not work properly on some hosts (e.g. mingw32 has HOST_LONG_LONG_FORMAT "I64" and that is something pretty-

Re: [PATCH] ipa-vr: Handle non-conversion unary ops separately from conversions (PR 118756)

On Tue, Feb 25, 2025 at 04:48:37PM +0100, Martin Jambor wrote: > --- /dev/null > +++ b/gcc/testsuite/g++.dg/lto/pr118785_0.C > @@ -0,0 +1,14 @@ > +// { dg-lto-do link } > +// { dg-require-effective-target fpic }x Not a review, just a nit, what is the x doing above? > +// { dg-lto-options { "-O3 -

[PATCH] ipa-vr: Handle non-conversion unary ops separately from conversions (PR 118756)

Hi, since we construct arithmetic jump functions even when there is a type conversion in between the operation encoded in the jump function and when it is passed in a call argument, the IPA propagation phase must also perform the operation and conversion in two steps. IPA-VR had actually been doi

Re: [PATCH 2/4] c++/modules: Track module purview for deferred instantiations [PR114630]

On Fri, 21 Feb 2025, Nathaniel Shead wrote: > After seeing PR c++/118964 I'm coming back around to this [1] patch > series, since it appears that this can cause errors on otherwise valid > code by instantiations coming into module purview that reference > TU-local entities. > > [1]: https://gcc.g

Re: [PATCH v2] RISC-V: Fix a typo in zce to zcf implication

On 2/24/25 3:22 AM, Yuriy Kolerov wrote: zce must imply zcf but this rule was corrupted after refactoring in 9e12010b5e724277ea. This may be observed ater generating an .s file from any source code file with -mriscv-attribute -march=rv32if_zce -mabi=ilp32 -S options. A full march will be prese

[3/3 PATCH v3]middle-end: delay checking for alignment to load [PR118464]

Hi All, This fixes two PRs on Early break vectorization by delaying the safety checks to vectorizable_load when the VF, VMAT and vectype are all known. This patch does add two new restrictions: 1. On LOAD_LANES targets, where the buffer size is known, we reject uneven group sizes, as they are

[2/3 PATCH][committed] testsuite: Add pragma novector to more tests [PR118464]

Hi All, These loops will now vectorize the entry finding loops. As such we get more failures because they were not expecting to be vectorized. Fixed by adding #pragma GCC novector. Bootstrapped Regtested on aarch64-none-linux-gnu, arm-none-linux-gnueabihf, x86_64-pc-linux-gnu -m32, -m64 and no

[1/3 PATCH]AArch64: add support for partial modes to last extractions [PR118464]

Hi All, The last extraction instructions work full both full and partial SVE vectors, however we currrently only define them for FULL vectors. Early break code for VLA now however requires partial vector support, which relies on extract_last support. I have not added any new testcases as they ov

[PATCH v2] RISC-V: Fix bug for expand_const_vector interleave [PR118931]

From: Pan Li This patch would like to fix one bug when expanding const vector for the interleave case. For example, we have: base1 = 151 step = 121 For vec_series, we will generate vector in format of v[i] = base + i * step. Then the vec_series will have below result for HImode, and we can fin

Re: [WWWDOCS, COMMITTED] gcc-15: Fix HTML validation error

On Wed, 12 Feb 2025, Sandra Loosemore wrote: > It appears that bin/preprocess-html.py introduces HTML errors when an > ... element contains a nested hyperlink. My recent gcc-15 release > note changes passed validation when checked via file upload, but not after > commit via file link. It seems th

Re: [PATCH] LoongArch: Avoid unnecessary zero-initialization using LSX for scalar popcount

On Tue, 2025-02-25 at 20:49 +0800, Lulu Cheng wrote: > > 在 2025/2/22 下午3:34, Xi Ruoyao 写道: > > Now for __builtin_popcountl we are getting things like > > > > vrepli.b$vr0,0 > > vinsgr2vr.d $vr0,$r4,0 > > vpcnt.d $vr0,$vr0 > > vpickve2gr.du $r4,$vr0,0 > > slli.w

Re: [wwwdocs] gcc-15/changes.html: Update AMD GPU (GCN) section for new gfx*

On Fri, 14 Feb 2025, Tobias Burnus wrote: > Update https://gcc.gnu.org/gcc-15/changes.html#amdgcn for the newly added > generic support and the GPUs compatible with the generic devices. + Experimental support for supporting generic devices has been added; ^^

Re: [PATCH] LoongArch: Avoid unnecessary zero-initialization using LSX for scalar popcount

在 2025/2/22 下午3:34, Xi Ruoyao 写道: Now for __builtin_popcountl we are getting things like vrepli.b$vr0,0 vinsgr2vr.d $vr0,$r4,0 vpcnt.d $vr0,$vr0 vpickve2gr.du $r4,$vr0,0 slli.w $r4,$r4,0 jr $r1 The "vrepli.b" instruction is intro

[PATCH] simplify-rtx: Fix up simplify_logical_relational_operation [PR119002]

Hi! The following testcase is miscompiled on powerpc64le-linux starting with r15-6777. That change has the if (HONOR_NANS (GET_MODE (XEXP (op0, 0 all = 15; lines which work fine if the comparisons use MODE_FLOAT or MODE_INT operands (or say MODE_VECTOR* etc.). But on this testcase on ppc64le

Re: [Fortran, Patch, PR107635, 4_v2] Fix class type and descriptor handling for new coarray interface [PR107635]

Hi Harald, thanks for the review. Committed this and the other patch as gcc-15-7694-gaf73228fdb2. Thanks again, Andre On Mon, 24 Feb 2025 20:22:17 +0100 Harald Anlauf wrote: > Hi Andre, > > Am 24.02.25 um 16:44 schrieb Andre Vehreschild: > > Hi Harald, > > > > I have added some comment

Re: [PATCH] i386: Fix pr101950-2.c [PR115028]

On Thu, Feb 20, 2025 at 01:11:25PM -0800, Andrew Pinski wrote: > So what is happening here is that after r15-268-g9dbff9c05520a7, > a move instruction still exists after combine and the register > allocator choses different register allocation order for the xor > and because the input operand of lz

Re: [PATCH][AARCH64][PR115258]Fix excess moves

Hi Richard, I want to follow up on this and see if you have a fix for this. Thanks, Kugan > On 29 Oct 2024, at 9:41 pm, Richard Sandiford > wrote: > > External email: Use caution opening links or attachments > > > Kugan Vivekanandarajah writes: >> Hi, >> >> Fix for PR115258 cases a perfor

New Swedish PO file for 'cpplib' (version 15-b20250216)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'cpplib' has been submitted by the Swedish team of translators. The file is available at: https://translationproject.org/latest/cpplib/sv.po (This file, 'cpplib-15-b20250216

Contents of PO file 'cpplib-15-b20250216.sv.po'

cpplib-15-b20250216.sv.po.gz Description: Binary data The Translation Project robot, in the name of your translation coordinator.

[committed] openmp: Mark OpenMP atomic write expression as read [PR119000]

Hi! The following testcase was emitting false positive warning that the rhs of #pragma omp atomic write was stored but not read, when the atomic actually does read it. The following patch fixes that by calling default_function_array_read_conversion on it, so that it is marked as read as well as c

[committed] openmp: Fix handling of declare target statics with array type which need destruction [PR118876]

Hi! The following testcase ICEs because it attempts to emit the __tcfa function twice, once when handling the host destruction and once when handling nohost destruction. This patch fixes it by using __omp_tcfa function for the nohost case and marks it with the needed "omp declare target" and "