[PATCH] Remove the rest of INCLUDE_MEMORY

I missed these in r15-5603-gb3f1b9e2aa079f8ec73e because they were no in a `.cc` or `.h` file or they were outside of the gcc subdirectory. Bootstrapped and tested on x86_64-linux-gnu. gcc/m2/ChangeLog: * mc/keyc.mod: Don't print `#define INCLUDE_MEMORY`. gcc/ChangeLog: * optc-

Re: [PATCH] md-files: Add a note about escaped quotes in braced strings in md files

On 10/31/24 5:13 PM, Andrew Pinski wrote: While looking into PR 33532, It was noted that \" would be treated still as " for braced strings in the md file. I think that is still the correct thing to do. So let's just a note to the documentation on this behavior and NOT change read-md.cc (read_b

[libgfortran, patch] PR88052 Format contravening constraint C1002 permitted

Hi all, I had originally created this patch in 2018 and we did not get back to it. This results in more restrictive runtime behavior. I will go through the front-end code with another patch to catch this at compile time. Changelog and new test case. See attached patch. OK for trunk Author:

Re: [PATCH v2 0/4] Improve and add VLS slide strategies.

This series patches LGTM. juzhe.zh...@rivai.ai From: Robin Dapp Date: 2024-11-23 02:20 To: gcc-patches CC: palmer; kito.cheng; juzhe.zhong; jeffreyalaw; pan2.li; rdapp.gcc Subject: [PATCH v2 0/4] Improve and add VLS slide strategies. From: Robin Dapp Changes from v1: - Improve function nami

Re: [PATCH] ranger, v2: Handle nonnull_if_nonzero attribute [PR117023]

FYI,  I will shortly be submitting , and presumable committing, this patch as part of a series to improve VRP time for 117467.. So it may be in place by the time you need it Andrew On 11/18/24 09:31, Andrew MacLeod wrote: Attached is a pre-approved patch which adds a range_query to the infe

[PATCH] libsanitizer: Remove -pedantic from AM_CXXFLAGS [PR117732]

Hi! We aren't the master repository for the sanitizers and clearly upstream introduces various extensions in the code. All we care about is whether it builds and works fine with GCC, so -pedantic flag is of no use to us, only maybe to upstream if they cared about it (which they clearly don't). Th

Patch ping - [PATCH] [APX EGPR] Fix indirect call prefix

Hello, I would like to ping the patch https://gcc.gnu.org/pipermail/gcc-patches/2024-November/668105.html please. Also CC'ing someone who is working on APX, sorry if this is frowned upon. Thanks.

Re: [PATCH] Sync top-level configure with binutils

On 11/22/24 12:16 PM, Sam James wrote: This syncs us with binutils/gdb's toplevel configure as of 987db70acefd0b223a8df2240d4e5ca544cc0a91. There's not much notable here, just gprofng (which is in binutils) being disabled for musl and a new target which got added on that side too. The only p

Re: [PATCH] build: Remove INCLUDE_MEMORY [PR117737]

On 11/22/24 3:09 PM, David Malcolm wrote: On Fri, 2024-11-22 at 13:15 -0800, Andrew Pinski wrote: Since diagnostic.h is included in over half of the sources, requiring to `#define INCLUDE_MEMORY` does not make sense. Instead lets unconditionally include memory in system.h. The majority of th

Re: [PATCH] C/C++: add fix-it hints for missing '&' and '*' (v5) [PR87850]

On Fri, 22 Nov 2024, David Malcolm wrote: > Revisiting this patch from 2018 that didn't quite make it; > earlier versions were: > v1: https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00802.html > v2: https://gcc.gnu.org/legacy-ml/gcc-patches/2018-11/msg01408.html > v3: https://gcc.gnu.org/legac

Ping: Re: [PATCH 0/3] Nested diagnostics for g++ [PR116253]

I'd like to ping this patch kit. I've already pushed "[PATCH 1/3] diagnostics: add support for nested diagnostics [PR116253]" but was hoping for review from C++ maintainers for patches 2 and 3: [PATCH 2/3] c++: consolidate location printing in error.cc [PR116253] https://gcc.gnu.org/pipermail/g

Re: [PATCH] build: Remove INCLUDE_MEMORY [PR117737]

On Fri, 2024-11-22 at 13:15 -0800, Andrew Pinski wrote: > Since diagnostic.h is included in over half of the sources, requiring > to `#define INCLUDE_MEMORY` > does not make sense. Instead lets unconditionally include memory in > system.h. > > The majority of this patch is just removing `#define I

Re: [PATCH] c++: give suggestion on misspelled class name [PR116771]

On Fri, Nov 22, 2024 at 04:56:08PM -0500, David Malcolm wrote: > Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. > > OK for trunk? Not an approval, but the patch LGTM -- it follows the usual hint.suggestion() pattern elsewhere in the front end. > gcc/cp/ChangeLog: > PR c++/

[PATCH] c++: give suggestion on misspelled class name [PR116771]

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. OK for trunk? gcc/cp/ChangeLog: PR c++/116771 * parser.cc (cp_parser_name_lookup_error): Provide suggestions for the case of complete failure where there is no scope. gcc/testsuite/ChangeLog: PR c++/11

[PATCH] C/C++: add fix-it hints for missing '&' and '*' (v5) [PR87850]

Revisiting this patch from 2018 that didn't quite make it; earlier versions were: v1: https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00802.html v2: https://gcc.gnu.org/legacy-ml/gcc-patches/2018-11/msg01408.html v3: https://gcc.gnu.org/legacy-ml/gcc-patches/2018-11/msg01658.html v4: https://

[PATCH v2] fold fold_truth_andor field merging into ifcombine

This patch introduces various improvements to the logic that merges field compares, while moving it into ifcombine. Before the patch, we could merge: (a.x1 EQNE b.x1) ANDOR (a.y1 EQNE b.y1) into something like: (((type *)&a)[Na] & MASK) EQNE (((type *)&b)[Nb] & MASK) if both of A's fie

[PUSHED] test-art: Fix comment in types.h

The comment references INCLUDE_MEMORY but the code actually checks INCLUDE_VECTOR. So fix up the comment to mention INCLUDE_VECTROR. Pushed as obvious. gcc/ChangeLog: * text-art/types.h: Fix comment. Signed-off-by: Andrew Pinski --- gcc/text-art/types.h | 2 +- 1 file changed, 1 inser

[patch,avr,applied]: Tabify avr-common.cc

avr-common.cc used spaces for indentation instead of TABs. Applied as obvious. Johann -- AVR: Tabify avr-common.cc according to coding rules. gcc/ * common/config/avr/avr-common.cc: Tabify.AVR: Tabify avr-common.cc according to coding rules. gcc/ * common/config/avr/avr-common

[committed] c: Fix typeof_unqual handling of qualified array types [PR112841]

As reported in bug 112841, typeof_unqual fails to remove qualifiers from qualified array types. In C23 (unlike in previous standard versions), array types are considered to have the qualifiers of the element type, so typeof_unqual should remove such qualifiers (and an example in the standard shows

[PATCH] ifcombine: skip fallback conjunction on noncontiguous blocks

When everything else fails, if enabled by the target or by a parameter, and when other requirements are satisfied, ifcombine generates an AND of both conditions. That may be good for contiguous conditions, but it's unlikely to be an optimization when the blocks are separate. Add contiguity to t

Re: [patch,avr] avr.opt: Refactor Var(avr_*) to Var(avropt_*)

чт, 21 нояб. 2024 г. в 20:39, Georg-Johann Lay : > > This is a no-op refactoring that uses a prefix of avropt_ > (formerly: avr_) for variables defined qua Var() directives > in avr.opt. This makes it easier to spot values that come directly > from avr.opt in the rest of the backend. > > Ok for tr

Re: [patch,avr] PR117726: More tweaks to multi-byte shifts

пт, 22 нояб. 2024 г. в 17:12, Georg-Johann Lay : > > This patch is similar to https://gcc.gnu.org/r15-5569 (tweak ashift:SI) > but for > ashiftrt and lshiftrt codes. It splits constant shift offsets > 16 > into a 3-operand byte shift and a 2-operand residual bit shift. > Moreover, some of the

[PATCH] Sync top-level configure with binutils

This syncs us with binutils/gdb's toplevel configure as of 987db70acefd0b223a8df2240d4e5ca544cc0a91. There's not much notable here, just gprofng (which is in binutils) being disabled for musl and a new target which got added on that side too. The only part which may look interesting is the basear

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/22/24 1:45 PM, Jason Merrill wrote: > On 11/22/24 6:03 PM, Carlos O'Donell wrote: >> On 11/22/24 11:13 AM, Jason Merrill wrote: >>> On 11/21/24 6:04 PM, Carlos O'Donell wrote: Adjust the DCO text to match the broader community usage including the Linux kernel use around "real name

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/22/24 6:03 PM, Carlos O'Donell wrote: On 11/22/24 11:13 AM, Jason Merrill wrote: On 11/21/24 6:04 PM, Carlos O'Donell wrote: Adjust the DCO text to match the broader community usage including the Linux kernel use around "real names." These changes clarify what was meant by "real name" an

[PATCH v2 2/4] RISC-V: Add interleave pattern.

From: Robin Dapp This patch adds efficient handling of interleaving patterns like [0 4 1 5] to vec_perm_const. It is implemented by a slideup and a gather. gcc/ChangeLog: * config/riscv/riscv-v.cc (shuffle_interleave_patterns): New function. (expand_vec_perm_const_1): U

[PATCH v2 3/4] RISC-V: Add even/odd vec_perm_const pattern.

From: Robin Dapp This adds handling for even/odd patterns. gcc/ChangeLog: * config/riscv/riscv-v.cc (shuffle_even_odd_patterns): New function. (expand_vec_perm_const_1): Use new function. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle

[PATCH v2 1/4] RISC-V: Add slide to perm_const strategies.

From: Robin Dapp This patch adds a shuffle_slide_patterns to expand_vec_perm_const. It recognizes permutations like {0, 1, 4, 5} or {2, 3, 6, 7} which can be constructed by a slideup or slidedown of one of the vectors into the other one. gcc/ChangeLog: * config/riscv/riscv-v.cc (s

[PATCH v2 4/4] RISC-V: Improve slide1up pattern.

From: Robin Dapp This patch adds a second variant to implement the extract/slide1up pattern. In order to do a permutation like <3, 4, 5, 6> from vectors <0, 1, 2, 3> and <4, 5, 6, 7> we currently extract <3> from the first vector and re-insert it into the second vector. Unless register-file cro

[PATCH v2 0/4] Improve and add VLS slide strategies.

From: Robin Dapp Changes from v1: - Improve function naming and rephrase comment. The series still causes execution failures due to the previously mentioned bugs. The avlprop one seems to have disappeared on my machine but I'm not convinced. Hopefully this time I'm using git send-email correct

Re: [PING] [contrib] validate_failures.py: fix python 3.12 escape sequence warnings

Jeff Law writes: > On 6/9/24 5:45 AM, Gabi Falk wrote: >> Hi, >> On Sat, Jun 08, 2024 at 03:34:02PM -0600, Jeff Law wrote: >>> On 5/14/24 8:12 AM, Gabi Falk wrote: Hi, This one still needs review: https://inbox.sourceware.org/gcc-patches/20240415233833.104460-1-gabif...@g

Re: [RFC/RFA][PATCH v6 03/12] RISC-V: Add CRC expander to generate faster CRC.

On 11/22/24 10:33 AM, Mariam Arutunian wrote: On Fri, Nov 22, 2024, 20:29 Jeff Law > wrote: On 11/13/24 7:16 AM, Mariam Arutunian wrote: > > > On Tue, Nov 12, 2024 at 2:15 AM Jeff Law mailto:jeffreya...@gmail.com> >

[PATCH] RISC-V: Ensure vtype for full-register moves [PR117544].

Hi, as discussed in PR117544 the VTYPE register is not preserved across function calls. Even though vmv1r-like instructions operate independently of the actual vtype they still require a valid vtype. As we cannot guarantee that the vtype is valid we must make sure to emit a vsetvl between a func

Re: [RFC/RFA][PATCH v6 03/12] RISC-V: Add CRC expander to generate faster CRC.

On Fri, Nov 22, 2024, 20:29 Jeff Law wrote: > > > On 11/13/24 7:16 AM, Mariam Arutunian wrote: > > > > > > On Tue, Nov 12, 2024 at 2:15 AM Jeff Law > > wrote: > > > > > > > \ No newline at end of file > > > diff --git a/gcc/testsuite/gcc.target/riscv/crc-1

Re: [PATCH] inline asm, v3: Add new constraint for symbol definitions

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > On Thu, Nov 21, 2024 at 11:57:13PM +, Joseph Myers wrote: > > On Wed, 6 Nov 2024, Jakub Jelinek wrote: > > > > > + error_at (loc, "%<:%> constraint operand is not address " > > > + "of a function or non-automatic v

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/22/24 11:13 AM, Jason Merrill wrote: > On 11/21/24 6:04 PM, Carlos O'Donell wrote: >> Adjust the DCO text to match the broader community usage including >> the Linux kernel use around "real names." >> >> These changes clarify what was meant by "real name" and that it is >> not required to

Re: [PATCH v2] Add new warning Wmissing-designated-initializers [PR39589]

On Sat, Sep 07, 2024 at 10:17:14PM +0100, Peter Frost wrote: > v2 Patch: > * adds proper changelog text > * fixes typo in c.opt > > Currently the behaviour of Wmissing-field-initializers is inconsistent > between C and C++. The C warning assumes that missing designated > initializers

Re: [RFC/RFA][PATCH v6 03/12] RISC-V: Add CRC expander to generate faster CRC.

On 11/13/24 7:16 AM, Mariam Arutunian wrote: On Tue, Nov 12, 2024 at 2:15 AM Jeff Law > wrote: > + > + > +/* Generate assembly to calculate CRC using clmul instruction. > +   The following code will be generated when the CRC and data si

Ping [PATCH] ada: PR target/117538 Traceback includes load address if executable is PIE.

What I didn’t say before is that, if for example an exception is raised in Ada Language Server and the code uses s-trasym to output a report, what you get on macOS is, for example, ALS.MAIN] in GNATformat Format [ALS.MAIN] raised CONSTRAINT_ERROR : erroneous memory access _ALS.MAIN_ 0x0001058

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

Jason Merrill writes: > On 11/21/24 6:04 PM, Carlos O'Donell wrote: >> Adjust the DCO text to match the broader community usage including >> the Linux kernel use around "real names." >> These changes clarify what was meant by "real name" and that it is >> not required to be a "legal name" or any

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/21/24 6:04 PM, Carlos O'Donell wrote: Adjust the DCO text to match the broader community usage including the Linux kernel use around "real names." These changes clarify what was meant by "real name" and that it is not required to be a "legal name" or any other stronger requirement than a k

Re: [PATCH v1] autoupdate: replace obsolete macros in libiberty

Matthieu Longo writes: > Autoreconf-2.72 warns about obsolete macros. This patch aims at removing > the noise from a future upgrade to autoreconf-2.72 or later. This is in > no a way a complete patch allowing the upgrade to autoreconf-2.72. > > - AC_GNU_SOURCE by AC_USE_SYSTEM_EXTENSIONS > http

Re: [PATCH] c++: Use type_id_in_expr_sentinel in 6 further spots in the parser

On Thu, Sep 19, 2024 at 10:36:01PM +0200, Jakub Jelinek wrote: > Hi! > > The following patch uses type_id_in_expr_sentinel in a few spots which > did it all manually. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Nice cleanup. Patch looks good to me. > 2024-09-19 J

Re: [PATCH][v2] tree-optimization/115825 - improve unroll estimates for volatile accesses

On 11/19/24 5:27 AM, Richard Biener wrote: The loop unrolling code assumes that one third of all volatile accesses can be possibly optimized away which is of course not true. This leads to excessive unrolling in some cases. The following tracks the number of stmts with side-effects as those

Re: [PATCH] tree-optimization/117355: object size for PHI nodes with negative offsets

On 11/20/24 12:54 PM, Siddhesh Poyarekar wrote: When the object size estimate is returned for a PHI node, it is the maximum possible value, which is fine in isolation. When combined with negative offsets however, it may sometimes end up in zero size because the resultant size was larger than

Re: [PATCH] replace atoi with strtol in varasm.cc (decode_reg_name_and_count) [PR114540]

On 11/22/24 7:40 AM, Heiko Eißfeldt wrote: A simple replacement of atoi() with strtol() in varasm.cc:decode_reg_name_and_count(). Parsing now has errno ERANGE checking, eg no undetected overflow. Being new it is difficult for me to come up with a good test case. So I don't see any technical

[to-be-committed][RISC-V][PR target/109s79] Improve RISC-V constant synthesis

This is a small improvement to the constant synthesis code to capture a case appended to PR 109279. The case in question has the property that the high 32 bits have the value one less than the low 32 bits and the highest bit in two low 32 bits is on. The example used in BZ is 0xcc

Re: [PATCH] c-family: Yet another fix for _BitInt & __sync_* builtins [PR117641]

On Fri, Nov 22, 2024 at 09:56:17AM +0100, Jakub Jelinek wrote: > Hi! > > Sorry, the last patch only partially fixed the __sync_* ICEs with > _BitInt(128) on ia32. > Even for !fetch we need to error out and return 0. I was afraid of > APIs like __atomic_exchange/__atomic_compare_exchange, those ob

[PATCH] replace atoi with strtol in varasm.cc (decode_reg_name_and_count) [PR114540]

A simple replacement of atoi() with strtol() in varasm.cc:decode_reg_name_and_count(). Parsing now has errno ERANGE checking, eg no undetected overflow. Being new it is difficult for me to come up with a good test case. --- diff --git a/gcc/varasm.cc b/gcc/varasm.cc index acc4b4a0419..d3c60eaf4

[patch,avr] PR117726: More tweaks to multi-byte shifts

This patch is similar to https://gcc.gnu.org/r15-5569 (tweak ashift:SI) but for ashiftrt and lshiftrt codes. It splits constant shift offsets > 16 into a 3-operand byte shift and a 2-operand residual bit shift. Moreover, some of the constraint alternatives have been promoted to 3-operand alte

[PATCH] [RFC] Add extra 64bit SSE vector epilogue in some cases

Similar to the X86_TUNE_AVX512_TWO_EPILOGUES tuning which enables an extra 128bit SSE vector epilouge when doing 512bit AVX512 vectorization in the main loop the following allows a 64bit SSE vector epilogue to be generated when the previous vector epilogue still had a vectorization factor of 16 or

Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

On 11/22/24 7:00 AM, Sam James wrote: > The key part is the first hunk of the patch I linked where we wanted to > emphasise "established online identity", rather than a throwaway > pseudonym. Thanks, yes, that language is completely neutral from my reading and clarifies that this should be a know

Re: [PATCH] [x86] Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.

On Fri, 22 Nov 2024, liuhongt wrote: > It could cause weired spill in RA when register pressure is high. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. > Ok for trunk? > > BTW, It's difficult to get a decent testcase for the issue since the spill > is not exposed in simple testcas

[PING*2][PATCH 1/1] config: Handle dash in library name for AC_LIB_LINKAGEFLAGS_BODY

Ping for: https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656541.html Thanks & Best Regards Abdul Basit -Original Message- From: Ijaz, Abdul B Sent: Monday, September 23, 2024 10:22 AM To: gcc-patches@gcc.gnu.org Cc: Ijaz, Abdul B Subject: [PING]: [PATCH 1/1] config: Handle dash in

[PATCH] [x86] Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.

It could cause weired spill in RA when register pressure is high. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? BTW, It's difficult to get a decent testcase for the issue since the spill is not exposed in simple testcase. gcc/ChangeLog: PR target/117562

Re: [PATCH] v3: Add -f{, no-}assume-sane-operators-new-delete options [PR110137]

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > On Tue, Nov 19, 2024 at 01:52:06PM +0100, Jan Hubicka wrote: > > > On Tue, Nov 19, 2024 at 11:23:31AM +0100, Jakub Jelinek wrote: > > > > On Tue, Nov 19, 2024 at 10:25:16AM +0100, Richard Biener wrote: > > > > > I think it's pretty clear and easy to desc

[COMMITTED] MAINTAINERS: Add myself to write after approval

ChangeLog: * MAINTAINERS: Add myself to write after approval. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7da332323dc..e432b2a4da9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -570,6 +570,7 @@ Kean Johnston -

Re: [PATCH] inline asm, v3: Add new constraint for symbol definitions

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > On Thu, Nov 21, 2024 at 11:57:13PM +, Joseph Myers wrote: > > On Wed, 6 Nov 2024, Jakub Jelinek wrote: > > > > > + error_at (loc, "%<:%> constraint operand is not address " > > > + "of a function or non-automatic v

Re: [PATCH] inline-asm, v2: Add - constraint modifier support for toplevel extended asm [PR41045]

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > On Fri, Nov 22, 2024 at 12:01:21AM +, Joseph Myers wrote: > > On Mon, 18 Nov 2024, Jakub Jelinek wrote: > > > > > +@smallexample > > > +extern void foo (void), bar (void); > > > +int v; > > > +extern int w; > > > +asm (".globl %cc0, %cc2; .text; %cc

Re: [PATCH] match.pd: Fix up the new simpliofiers using with_possible_nonzero_bits2 [PR117420]

On Fri, 22 Nov 2024, Jakub Jelinek wrote: > Hi! > > The following testcase shows wrong-code caused by incorrect use > of with_possible_nonzero_bits2. > That matcher is defined as > /* Slightly extended version, do not make it recursive to keep it cheap. */ > (match (with_possible_nonzero_bits2 @

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Re: [PATCH] wwwdocs: Align the DCO text for the GNU Toolchain to match community usage.

Carlos O'Donell writes: > On 11/21/24 1:47 PM, Sam James wrote: >> Mark Wielaard writes: >> >>> Hi Carlos, >>> >>> On Thu, 2024-11-21 at 12:04 -0500, Carlos O'Donell wrote: Adjust the DCO text to match the broader community usage including the Linux kernel use around "real names." >>>

[PATCH] Adjust error message for initialized variable in .bss

Hi, if you compile the following Ada package: package Bss1 is I : Integer := 0 with Linker_Section => ".bss"; end Bss1; you get the error: bss1.ads:3:3: error: only zero initializers are allowed in section '.bss' which is quite paradoxical. The reason is that the default setting in Ada is

Re: [PATCH 00/11] Add FP overloads for __atomic_fetch_add etc

Wanted to provide a link to the current patch that Prathamesh has worked on for automatically linking in libatomic (since this patch relies on that for the idea approach). https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669461.html On 11/14/24 13:55, mmalcom...@nvidia.com wrote: From:

Re: [PATCH] libsanitizer: Move language level from gnu++14 to gnu++17

On Thu, Nov 21, 2024 at 05:21:27PM -0800, Andrew Pinski wrote: > While compiling libsanitizer for aarch64-linux-gnu, I noticed the new warning: > ``` > ../../../../libsanitizer/asan/asan_interceptors.cpp: In function ‘char* > ___interceptor_strcpy(char*, const char*)’: > ../../../../libsanitizer/a

[PATCH v2] sibcall: Check partial != 0 for BLKmode argument

On Thu, Nov 21, 2024 at 6:43 AM H.J. Lu wrote: > On Wed, Nov 20, 2024 at 9:55 PM Richard Sandiford < > richard.sandif...@arm.com> wrote: > >> "H.J. Lu" writes: >> > On Wed, Nov 20, 2024 at 2:12 AM Richard Sandiford >> > wrote: >> >> >> >> "H.J. Lu" writes: >> >> > Adjust BLKmode argument size

[Patch] OpenMP: Add 'interop' clause to 'dispatch' for C/C++

This patch depends on 'dispatch' (which is currently in mainline only available for C/C++ but not Fortran) and it depends on the not-yet-committed "[Patch] OpenMP: 'interop' construct - add C/C++ parser support, improve Fortran parsing" https://gcc.gnu.org/pipermail/gcc-patches/2024-November/6687

Re: [PATCH] i386: Make __builtin_ia32_f{nstenv,ldenv,nstsw,fnclex} builtins internal [PR117165]

On Fri, Nov 22, 2024 at 9:50 AM Jakub Jelinek wrote: > > Hi! > > As the comment says, these builtins are meant to be internal for the atomic > support and cause various ICEs when using them directly in various > conditions. > So the following patch makes them internal. > We do have also internal-f

[PATCH] v3: Add -f{,no-}assume-sane-operators-new-delete options [PR110137]

On Tue, Nov 19, 2024 at 01:52:06PM +0100, Jan Hubicka wrote: > > On Tue, Nov 19, 2024 at 11:23:31AM +0100, Jakub Jelinek wrote: > > > On Tue, Nov 19, 2024 at 10:25:16AM +0100, Richard Biener wrote: > > > > I think it's pretty clear and easy to describe to users what "m " and > > > > what "mC" do.

[PATCH] v2: Allow limited extended asm at toplevel [PR41045]

On Thu, Nov 21, 2024 at 09:32:51PM +, Joseph Myers wrote: > On Sat, 2 Nov 2024, Jakub Jelinek wrote: > > > +Extended @code{asm} statements outside of functions may not use any > > +qualifiers, may not specify clobbers, may not use @code{%}, @code{+} or > > +@code{&} modifiers in constraints an

[PATCH v2] testsuite: arm: Check that a far jump is used in thumb1-far-jump-2.c

Changes since v1: - Rewrote the padding instructions in the macro to instead write to volatile memory. This ensures that every expansion of the base macro is exactly 2 bytes. If the `GO()` in f3 is removed, the generated assembly would be reduced to: f3: @ args = 0, pretend = 0, fram

[PATCH] inline asm, v3: Add new constraint for symbol definitions

On Thu, Nov 21, 2024 at 11:57:13PM +, Joseph Myers wrote: > On Wed, 6 Nov 2024, Jakub Jelinek wrote: > > > + error_at (loc, "%<:%> constraint operand is not address " > > +"of a function or non-automatic variable"); > > I think a testcase for this error

[PATCH] inline-asm, v2: Add - constraint modifier support for toplevel extended asm [PR41045]

On Fri, Nov 22, 2024 at 12:01:21AM +, Joseph Myers wrote: > On Mon, 18 Nov 2024, Jakub Jelinek wrote: > > > +@smallexample > > +extern void foo (void), bar (void); > > +int v; > > +extern int w; > > +asm (".globl %cc0, %cc2; .text; %cc0: call %cc1; ret; .data; %cc2: .word > > %cc3" > > +

[PATCH] c-family: Yet another fix for _BitInt & __sync_* builtins [PR117641]

Hi! Sorry, the last patch only partially fixed the __sync_* ICEs with _BitInt(128) on ia32. Even for !fetch we need to error out and return 0. I was afraid of APIs like __atomic_exchange/__atomic_compare_exchange, those obviously need to be supported even on _BitInt(128) on ia32, but they actuall

[PATCH] i386: Make __builtin_ia32_f{nstenv,ldenv,nstsw,fnclex} builtins internal [PR117165]

Hi! As the comment says, these builtins are meant to be internal for the atomic support and cause various ICEs when using them directly in various conditions. So the following patch makes them internal. We do have also internal-fn.*, but those target specific builtins would need to be there in gen

[PATCH] match.pd: Fix up the new simpliofiers using with_possible_nonzero_bits2 [PR117420]

Hi! The following testcase shows wrong-code caused by incorrect use of with_possible_nonzero_bits2. That matcher is defined as /* Slightly extended version, do not make it recursive to keep it cheap. */ (match (with_possible_nonzero_bits2 @0) with_possible_nonzero_bits@0) (match (with_possible_n

[PATCH] testsuite: Fix up various powerpc tests after -std=gnu23 by default switch [PR117663]

Hi! These tests use the K&R function style definitions or pass arguments to () functions. It seemed easiest to just use -std=gnu17 for all of those. Bootstrapped/regtested on powerpc64le-linux and powerpc64-linux (on the latter tested with -m32/-m64), ok for trunk? 2024-11-22 Jakub Jelinek

RE: [PATCH]middle-end: Pass along SLP node when costing vector loads/stores

On Fri, 22 Nov 2024, Tamar Christina wrote: > > -Original Message- > > From: Richard Biener > > Sent: Thursday, November 21, 2024 8:03 AM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd > > Subject: Re: [PATCH]middle-end: Pass along SLP node when costing vector > > loads/sto

[PATCH] i386/testsuite: Correct AVX10.2 FP8 test mask usage

Hi all, Under FP8, we should not use AVX512F_LEN_HALF to get the mask size since it will get 16 instead of 8 and drop into wrong if condition. Correct the usage for vcvtneph2[b,h]f8[,s] runtime test. Tested under sde. Ok for trunk? Thx, Haochen gcc/testsuite/ChangeLog: * gcc.target/i38

[PATCH] Regenerate opt urls for r15-5584.

gcc/ChangeLog: * config/g.opt.urls: Regenerate. * config/i386/nto.opt.urls: Regenerate. * config/riscv/riscv.opt.urls: Regenerate. * config/rx/rx.opt.urls: Regenerate. * config/sol2.opt.urls: Regenerate. --- gcc/config/g.opt.urls | 2 +- gcc/confi

RE: [PATCH]middle-end: Pass along SLP node when costing vector loads/stores

> -Original Message- > From: Richard Biener > Sent: Thursday, November 21, 2024 8:03 AM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd > Subject: Re: [PATCH]middle-end: Pass along SLP node when costing vector > loads/stores > > On Wed, 20 Nov 2024, Tamar Christina wrote: > > >