Re: [PATCH] x86, Darwin: Fix bootstrap for 32b multilibs/hosts.

2024-07-05 Thread Iain Sandoe
> On 5 Jul 2024, at 09:34, Iain Sandoe wrote: > > This is Darwin-local, and I would like to apply it today to restore > bootstrap before my weekend test-runs, tested on x86_64-linux (m32/m64) x86_64-darwin17 (m32/m64) i686-darwin17 (m32/m64) i686-darwin9 (m32/m64) x86_64-darwin21 (m64) pushed

Re: [PATCH, gfortran] libgfortran: implement fpu-macppc for Darwin, support IEEE arithmetic

2024-07-05 Thread FX Coudert
> This part of the patch is quite old, but from the remaining log it looks I > got an error here: > Now on a second thought, this did not require a fix perhaps. We can drop it. I have addressed this: https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656484.html The test should now be run on al

[PATCH, pushed] Fortran: switch test to use issignaling() built-in

2024-07-05 Thread FX Coudert
Pushed after testing on x86_64-unknown-linux-gnu. The macro may not be present in all libc's, but the built-in is always available. See https://gcc.gnu.org/pipermail/gcc-patches/2024-July/656409.html for context. gcc/testsuite/ChangeLog: * gfortran.dg/ieee/signaling_2.f90: Adjust test.

Re: [wwwdocs] [PATCH 0/4] Fix various typos

2024-07-05 Thread Gerald Pfeifer
Hi Pokechu22, On Tue, 22 Mar 2022, Pokechu22 via Gcc-patches wrote: > While working on a separate patch, I found several typos on the website. > I have only looked within the htdocs directory, not its subdirectories. thanks for those patches, and sorry they fell through the cracks originally. I'

ping: [PATCH] libcpp: Support extended characters for #pragma {push,pop}_macro [PR109704]

2024-07-05 Thread Lewis Hyatt
Hello- https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642926.html May I please ping this one again? It's the largest remaining gap in UTF-8 support for libcpp that I know of. Thanks! -Lewis On Tue, May 28, 2024 at 7:46 PM Lewis Hyatt wrote: > > Hello- > > May I please ping this one (no

Re: [Fortran, Patch, PR 96992, V3] Fix Class arrays of different ranks are rejected as storage association argument

2024-07-05 Thread Harald Anlauf
Hi Andre, Am 03.07.24 um 12:58 schrieb Andre Vehreschild: Hi Harald, I am sorry for the long delay, but fixing the negative stride lead from one issue to the next. I finally got a version that does not regress. Please have a look. This patch has two parts: 1. The runtime library part in pr9699

Re: [PATCH] c++, coroutines, contracts: Handle coroutine and void functions [PR110871,PR110872,PR115434].

2024-07-05 Thread Iain Sandoe
> On 17 Jun 2024, at 13:15, Iain Sandoe wrote: > > This patch came out of a discussion on Mattermost about how to deal > with contracts/coroutines integration. Actually, it would also allow > some semantic checking to be deferred until the same spot - at which > time there are no dependent ty

[PATCH] c++: missing SFINAE during alias CTAD [PR115296]

2024-07-05 Thread Patrick Palka
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8 -- During the alias CTAD transformation, if substitution failed for some guide we should just discard the guide silently. We currently do discard the guide, but not silently, which causes us to reject the be

Re: [PATCH] c++, contracts: Fix ICE in create_tmp_var [PR113968]

2024-07-05 Thread Jason Merrill
On 7/5/24 10:25 AM, Nina Dinka Ranns wrote: Certain places in contract parsing currently do not check for errors. This results in contracts with embedded errors which eventually confuse gimplify. Checks for errors added in grok_contract() and cp_parser_contract_attribute_spec() to exit early if a

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Sandiford
Robin Dapp writes: >> FTR, my concern & suggestion was: >> >> I suppose the difficulty is that we might make: >> >> MASK_LOAD (mask, ptr, some-arbitrary-else-value) >> >> seem as cheap as: >> >> MASK_LOAD (mask, ptr, { 0, 0,. ... 0}) >> >> which definitely isn't the case for SVE

[PATCH] c++: normalizing ttp parm constraints [PR115656]

2024-07-05 Thread Patrick Palka
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14 and perhaps 13? Alternatively we can set current_template_parms from weakly_subsumes instead, who has only one caller anyway. -- >8 -- Here we normalize the constraint same_as for the first time during constraint s

Re: [PATCH v3] Arm: Fix ldrd offset range [PR115153]

2024-07-05 Thread Richard Earnshaw (lists)
On 27/06/2024 17:25, Wilco Dijkstra wrote: > Hi Richard, > >> The Linaro CI is reporting an ICE while building libgfortran with this >> change. > > So it looks like Thumb-2 oddly enough restricts the negative range of DFmode > eventhough that is unnecessary and inefficient. The easiest workaroun

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Robin Dapp
> To me this looks like mis-applying of match.pd:6083? > > Applying pattern match.pd:6083, gimple-match-1.cc:45749 > gimple_simplified to iftmp.0_62 = iftmp.0_61 | _219; > new phi replacement stmt > iftmp.0_62 = iftmp.0_61 | _219; > > so originally it wasn't > > iftmp.0_61 = .MASK_LOAD (_260,

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Robin Dapp
> FTR, my concern & suggestion was: > > I suppose the difficulty is that we might make: > > MASK_LOAD (mask, ptr, some-arbitrary-else-value) > > seem as cheap as: > > MASK_LOAD (mask, ptr, { 0, 0,. ... 0}) > > which definitely isn't the case for SVE (and I'm guessing also > for

[pushed] wwwdocs: contribute: Uppercase spelling of Bugzilla

2024-07-05 Thread Gerald Pfeifer
--- htdocs/contribute.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/contribute.html b/htdocs/contribute.html index 24f8d30b..caff1f2a 100644 --- a/htdocs/contribute.html +++ b/htdocs/contribute.html @@ -322,7 +322,7 @@ not be confused with other patches. If y

Re: [PATCH] c++, contracts: Fix ICE in create_tmp_var [PR113968]

2024-07-05 Thread Iain Sandoe
Hi Nina, thanks for the patch! > On 5 Jul 2024, at 15:25, Nina Dinka Ranns wrote: > > Certain places in contract parsing currently do not check for errors. > This results in contracts > with embedded errors which eventually confuse gimplify. Checks for > errors added in > grok_contract() and cp

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Biener
> Am 05.07.2024 um 16:00 schrieb Richard Sandiford : > > Richard Biener writes: >>> On Fri, 5 Jul 2024, Richard Biener wrote: >>> On Fri, 5 Jul 2024, Robin Dapp wrote: >>> Hi, in PR115336 we have the following vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vec

[PATCH] c++, contracts: Fix ICE in create_tmp_var [PR113968]

2024-07-05 Thread Nina Dinka Ranns
Certain places in contract parsing currently do not check for errors. This results in contracts with embedded errors which eventually confuse gimplify. Checks for errors added in grok_contract() and cp_parser_contract_attribute_spec() to exit early if an error is encountered. Tested on x86_64-pc-l

[PATCH v2] Vect: Distribute truncation into .SAT_SUB operands

2024-07-05 Thread pan2 . li
From: Pan Li To get better vectorized code of .SAT_SUB, we would like to avoid the truncated operation for the assignment. For example, as below. unsigned int _1; unsigned int _2; _9 = (unsigned short int).SAT_SUB (_1, _2); If we make sure that the _1 is in the range of unsigned short int. S

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Sandiford
Richard Biener writes: > On Fri, 5 Jul 2024, Richard Biener wrote: > >> On Fri, 5 Jul 2024, Robin Dapp wrote: >> >> > Hi, >> > >> > in PR115336 we have the following >> > >> > vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vect__59, 1, { 0, ... }, { >> > 0, ... }, _482, 0); >> > vect_iftmp.4

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Sandiford
Robin Dapp writes: > Hi, > > in PR115336 we have the following > > vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vect__59, 1, { 0, ... }, { 0, > ... }, _482, 0); > vect_iftmp.44 = vect_patt_391 | { 1, ... }; > .MASK_LEN_STORE (vectp_f.45, 8B, { -1, ... }, _482, 0, vect_iftmp.44); > > which a

[COMMITED] MAINTAINERS: Fix order in DCO

2024-07-05 Thread Filip Kastl
Hi, I've noticed wrong order in the Contributing under the DCO section of the MAINTAINERS file. I'm commiting the fix as obvious. Filip Kastl -- 8< -- ChangeLog: * MAINTAINERS: Fix order in Contributing under the DCO. Signed-off-by: Filip Kastl --- MAINTAINERS | 2 +- 1 file change

[RFC WIP] RAW_DATA_CST for #embed optimization

2024-07-05 Thread Jakub Jelinek
Hi! Just to show what I'm working on on top of the already posted #embed patches. Working on the C FE only for now, the patch emits CPP_EMBED tokens when preprocessing C (but still with the important simplification that CPP_EMBED token is always preceded by {CPP_NUMBER,CPP_EMBED} CPP_COMMA and fol

[PATCH v1] Match: Support form 2 for the .SAT_TRUNC

2024-07-05 Thread pan2 . li
From: Pan Li This patch would like to add form 2 support for the .SAT_TRUNC. Aka: Form 2: #define DEF_SAT_U_TRUC_FMT_2(NT, WT) \ NT __attribute__((noinline)) \ sat_u_truc_##WT##_to_##NT##_fmt_2 (WT x) \ {\ bool overflow = x > (

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Biener
On Fri, 5 Jul 2024, Richard Biener wrote: > On Fri, 5 Jul 2024, Robin Dapp wrote: > > > Hi, > > > > in PR115336 we have the following > > > > vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vect__59, 1, { 0, ... }, { > > 0, ... }, _482, 0); > > vect_iftmp.44 = vect_patt_391 | { 1, ... }; > >

Re: [RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Richard Biener
On Fri, 5 Jul 2024, Robin Dapp wrote: > Hi, > > in PR115336 we have the following > > vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vect__59, 1, { 0, ... }, { 0, > ... }, _482, 0); > vect_iftmp.44 = vect_patt_391 | { 1, ... }; > .MASK_LEN_STORE (vectp_f.45, 8B, { -1, ... }, _482, 0, vect_i

Re: [PATCH] Fix native_encode_vector_part for itype when TYPE_PRECISION (itype) == BITS_PER_UNIT

2024-07-05 Thread Richard Biener
On Fri, Jul 5, 2024 at 11:09 AM Richard Sandiford wrote: > > Richard Sandiford writes: > > Richard Biener writes: > >> On Fri, Jun 28, 2024 at 2:16 PM Richard Biener > >> wrote: > >>> > >>> On Fri, Jun 28, 2024 at 11:06 AM Richard Biener > >>> wrote: > >>> > > >>> > > >>> > > >>> > > Am 28.06.

Re: [PATCH v8 12/12] Mark expand musttail error messages for translation

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:58 PM Andi Kleen wrote: > > The musttail error messages are reported to the user, so must be > translated. OK. > gcc/ChangeLog: > > * calls.cc (initialize_argument_information): Mark messages > for translation. > (can_implement_as_sibling_call_p)

Re: [PATCH v8 11/12] Dump reason for missing tail call into dump file

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 9:01 PM Andi Kleen wrote: > > gcc/ChangeLog: OK. Btw, I wonder if you can squash all error/dump related patches to tree-tailcall.cc > * tree-tailcall.cc (maybe_error_musttail): Print reason to > dump_file. > (find_tail_calls): Print gimple stmt or

Re: [PATCH v8 10/12] Add documentation for musttail attribute

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 9:00 PM Andi Kleen wrote: > > gcc/ChangeLog: OK. > * doc/extend.texi: Document [[musttail]] > --- > gcc/doc/extend.texi | 25 +++-- > 1 file changed, 23 insertions(+), 2 deletions(-) > > diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi >

[RFC] tree-if-conv: Handle nonzero masked elements [PR115336].

2024-07-05 Thread Robin Dapp
Hi, in PR115336 we have the following vect_patt_391 = .MASK_LEN_GATHER_LOAD (_470, vect__59, 1, { 0, ... }, { 0, ... }, _482, 0); vect_iftmp.44 = vect_patt_391 | { 1, ... }; .MASK_LEN_STORE (vectp_f.45, 8B, { -1, ... }, _482, 0, vect_iftmp.44); which assumes that a maskload sets the maske

Re: [PATCH v8 09/12] Delay caller error reporting for musttail

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 9:00 PM Andi Kleen wrote: > > Move the error reporting for caller attributes to be > after the tail call discovery, so that we can give proper > error messages tagged to the calls. Hmm. This all gets a bit awkward. I realize that early checking gets us less compile-time

[committed] libstdc++: Add dg-error for new -Wdelete-incomplete diagnostics [PR115747]

2024-07-05 Thread Jonathan Wakely
These errors only show up when testing with -std=c++26 which isn't done by default. Tested x86_64-linux. Pushed to trunk. -- >8 -- Since r15-1794-gbeb7a418aaef2e the -Wdelete-incomplete diagnostic is a permerror instead of a (suppressed in system headers) warning. Add dg-error directives. libst

Re: [PATCH 1/3] libstdc++: Use RAII in

2024-07-05 Thread Jonathan Wakely
Thanks for the feedback - pushed. On Wed, 3 Jul 2024 at 16:37, Ville Voutilainen wrote: > > On Wed, 3 Jul 2024 at 18:33, Jonathan Wakely wrote: > > > > On Thu, 27 Jun 2024 at 11:52, Jonathan Wakely wrote: > > > > > > This refactoring to use RAII doesn't seem to make any difference in > > > bench

[committed v3] libstdc++: Use memchr to optimize std::find [PR88545]

2024-07-05 Thread Jonathan Wakely
Tested x86_64-linux. Pushed to trunk. Patch v3 adds the in-range check to ranges::find to avoid false positive matches: if (static_cast>(__value) != __value) return __last; -- >8 -- This optimizes std::find to use memchr when searching for an integer in a range of bytes. libstdc++-v3/Cha

[patch, avr, applied] Fix PR87376: Wrong code with __memx and long long addition

2024-07-05 Thread Georg-Johann Lay
The DImode expanders from avr-dimode.md have code like emit_move_insn(acc_a, operands[1]) where acc_a is a hard register and operands[1] may be a mem reference to a non-generic address-space. The latter may require a libcall, and since DImode moves are split into 8 QImode moves, these libcalls m

Re: [PATCH v8 08/12] Give better error messages for musttail

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 9:01 PM Andi Kleen wrote: > > When musttail is set, make tree-tailcall give error messages > when it cannot handle a call. This avoids vague "other reasons" > error messages later at expand time when it sees a musttail > function not marked tail call. > > In various cases t

Re: [PATCH v8 06/12] Add tests for C/C++ musttail attributes

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:59 PM Andi Kleen wrote: > > Some adopted from the existing C musttail plugin tests. Looks good to me. > gcc/testsuite/ChangeLog: > > * c-c++-common/musttail1.c: New test. > * c-c++-common/musttail2.c: New test. > * c-c++-common/musttail3.c: New t

Re: [PATCH v8 03/12] Add a musttail generic attribute to the c-attribs table

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:57 PM Andi Kleen wrote: > > It does nothing currently since statement attributes are handled > directly in the parser. Is this needed at all? a "'musttail' attribute ignored" diagnostic isn't much more helpful than "'foo' attribute directive ignored"? Or does stmt attr

Re: [PATCH v8 02/12] Fix pro_and_epilogue for sibcalls at -O0

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:57 PM Andi Kleen wrote: > > Some of the cfg fixups in pro_and_epilogue for sibcalls were dependent on > "optimize". > Make them check cfun->tail_call_marked instead to handle the -O0 musttail > case. This fixes the musttail test cases on arm targets. > > PR115255

Re: [PATCH v8 01/12] Improve must tail in RTL backend

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:57 PM Andi Kleen wrote: > > - Give error messages for all causes of non sibling call generation > - When giving error messages clear the musttail flag to avoid ICEs > - Error out when tree-tailcall failed to mark a must-tail call > sibcall. In this case it doesn't know th

Re: [PATCH v8 07/12] Enable musttail tail conversion even when not optimizing

2024-07-05 Thread Richard Biener
On Sat, Jun 22, 2024 at 8:59 PM Andi Kleen wrote: > > Enable the tailcall optimization for non optimizing builds, > but in this case only checks calls that have the musttail attribute set. > This makes musttail work without optimization. > > This is done with a new late musttail pass that is only

[r15-1848 Regression] FAIL: gcc.dg/vect/slp-54.c scan-tree-dump vect "vectorizing stmts using SLP" on Linux/x86_64

2024-07-05 Thread haochen.jiang
On Linux/x86_64, 7eb8b65780d9dc3e266056383279b00d5e152bea is the first bad commit commit 7eb8b65780d9dc3e266056383279b00d5e152bea Author: Richard Biener Date: Wed Jul 3 13:50:59 2024 +0200 Support group size of three in SLP store permute lowering caused FAIL: gcc.dg/vect/slp-54.c -flto -

Re: [PATCH v2] middle-end: Add debug functions to dump dominator tree in dot format

2024-07-05 Thread Richard Biener
On Fri, 5 Jul 2024, Alex Coplan wrote: > This is a v2 patch which implements richi's feedback. > > OK if it survives bootstrap on aarch64? OK. Thanks, Richard. > Thanks, > Alex > > -- >8 -- > > This adds debug functions to dump the dominator tree in dot format. > There are two overloads: one

[PATCH 2/2] [RISC-V] c implies zca, and conditionally zcf & zcd

2024-07-05 Thread Fei Gao
According to Zc-1.0.4-3.pdf from https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3 The rule is that: 1. C always implies Zca 2. C+F implies Zcf (RV32 only) 3. C+D implies Zcd gcc/ChangeLog: * common/config/riscv/riscv-common.cc: c implies zca, and con

[PATCH 1/2] [RISC-V] add implied extension repeatly until stable

2024-07-05 Thread Fei Gao
Call handle_implied_ext repeatly until there's no new subset added into the subset list. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_subset_list::riscv_subset_list): init m_subset_num to 0. (riscv_subset_list::add): increase m_subset_num once a subset adde

[PATCH 0/2] [RISC-V] c implies zca, and conditionally zcf & zcd

2024-07-05 Thread Fei Gao
According to Zc-1.0.4-3.pdf from https://github.com/riscvarchive/riscv-code-size-reduction/releases/tag/v1.0.4-3 The rule is that: 1. C always implies Zca 2. C+F implies Zcf (RV32 only) 3. C+D implies Zcd Patch 2 handles this implication. Without Patch 1, Patch 2 triggers an ICE when compiling gc

Re: [PATCH] Fix MinGW option -mcrtdll=

2024-07-05 Thread Pali Rohár
On Monday 24 June 2024 10:03:26 Jonathan Yong wrote: > On 6/23/24 16:40, Pali Rohár wrote: > > Add missing msvcr40* and msvcrtd* cases to CPP_SPEC and > > document missing _UCRT macro and msvcr71* case. > > > > Fixes commit 453cb585f0f8673a5d69d1b420ffd4b3f53aca00. > Thanks, pushed to master branc

[PATCH v2] middle-end: Add debug functions to dump dominator tree in dot format

2024-07-05 Thread Alex Coplan
This is a v2 patch which implements richi's feedback. OK if it survives bootstrap on aarch64? Thanks, Alex -- >8 -- This adds debug functions to dump the dominator tree in dot format. There are two overloads: one which takes a FILE * and another which takes a const char *fname and wraps the fir

[PATCH] [RFC] load and store-lanes with SLP

2024-07-05 Thread Richard Biener
The following is a prototype for how to represent load/store-lanes within SLP. I've for now settled with having a single load node with multiple permute nodes, one for each loaded lane and a single store node plus a single permute node feeding it. For for (int i = 0; i < 1024; ++i) {

Re: [PATCH] Fix native_encode_vector_part for itype when TYPE_PRECISION (itype) == BITS_PER_UNIT

2024-07-05 Thread Richard Sandiford
Richard Sandiford writes: > Richard Biener writes: >> On Fri, Jun 28, 2024 at 2:16 PM Richard Biener >> wrote: >>> >>> On Fri, Jun 28, 2024 at 11:06 AM Richard Biener >>> wrote: >>> > >>> > >>> > >>> > > Am 28.06.2024 um 10:27 schrieb Richard Sandiford >>> > > : >>> > > >>> > > Richard Biener

Re: [PATCH 2/2]AArch64: lower 2 reg TBL permutes with one zero register to 1 reg TBL.

2024-07-05 Thread Richard Sandiford
Tamar Christina writes: >> > +v16qi f3b (v16qi a) >> > +{ >> > + v16qi zeros = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; >> > + return __builtin_shufflevector (a, zeros, 0, 5, 1, 6, 2, 7, 3, 8, 4, 9, >> > 5, 10, 6, 11, >> 7, 12); >> > +} >> > + >> > +/* { dg-final { scan-assembler-times {tbl\tv[0-9]+.

[PATCH] x86, Darwin: Fix bootstrap for 32b multilibs/hosts.

2024-07-05 Thread Iain Sandoe
This is Darwin-local, and I would like to apply it today to restore bootstrap before my weekend test-runs, but would welcome any comments or suggestions. thanks Iain --- 8< --- r15-1735-ge62ea4fb8ffcab06ddd contained changes that altered the codegen for 32b Darwin (whether hosted on 64b or as 3

Re: [PATCH 1/2]AArch64: make aarch64_simd_vec_unpack_lo_/_hi_ consistent.

2024-07-05 Thread Richard Sandiford
Tamar Christina writes: >> > The principle is that, say: >> > >> > (vec_select:V2SI (reg:V2DI R) (parallel [(const_int 0) (const_int 1)])) >> > >> > is (for little-endian) equivalent to: >> > >> > (subreg:V2SI (reg:V2DI R) 0) >> >> Sigh, of course I meant V4SI rather than V2DI in the above :)

RE: [PATCH 2/2]AArch64: lower 2 reg TBL permutes with one zero register to 1 reg TBL.

2024-07-05 Thread Tamar Christina
> > +v16qi f3b (v16qi a) > > +{ > > + v16qi zeros = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; > > + return __builtin_shufflevector (a, zeros, 0, 5, 1, 6, 2, 7, 3, 8, 4, 9, > > 5, 10, 6, 11, > 7, 12); > > +} > > + > > +/* { dg-final { scan-assembler-times {tbl\tv[0-9]+.16b, \{v[0-9]+.16b\}, > > v[0- >

Re: [PATCH] Build/Cross: Look for target headers from include if sys-include doesn't exist

2024-07-05 Thread YunQiang Su
Ping again.

RE: [PATCH 1/2]AArch64: make aarch64_simd_vec_unpack_lo_/_hi_ consistent.

2024-07-05 Thread Tamar Christina
> > The principle is that, say: > > > > (vec_select:V2SI (reg:V2DI R) (parallel [(const_int 0) (const_int 1)])) > > > > is (for little-endian) equivalent to: > > > > (subreg:V2SI (reg:V2DI R) 0) > > Sigh, of course I meant V4SI rather than V2DI in the above :) > > > and similarly for the equi

Re: [PATCH] middle-end: Add debug function to dump dominator tree in dot format

2024-07-05 Thread Alex Coplan
On 05/07/2024 09:59, Richard Biener wrote: > On Fri, 5 Jul 2024, Alex Coplan wrote: > > > Hi, > > > > This adds a debug function to dump the dominator tree in dot/graphviz > > format. The idea is that the function can be called in GDB, the output > > copy/pasted into a .dot file and then rendere

Re: [PATCH v2] i386: Refactor ssedoublemode

2024-07-05 Thread Uros Bizjak
On Fri, Jul 5, 2024 at 9:07 AM Hu, Lin1 wrote: > > I Modified the changelog and comments. > > ssedoublemode's double should mean double type, like SI -> DI. > And we need to refactor some patterns with instead of > . > > BRs, > Lin > > gcc/ChangeLog: > > * config/i386/sse.md (ssedoublemod

Re: [PATCH] middle-end: Add debug function to dump dominator tree in dot format

2024-07-05 Thread Richard Biener
On Fri, 5 Jul 2024, Alex Coplan wrote: > Hi, > > This adds a debug function to dump the dominator tree in dot/graphviz > format. The idea is that the function can be called in GDB, the output > copy/pasted into a .dot file and then rendered using graphviz. > > Bootstrapped/regtested on aarch64-

[PATCH v3] MIPS: Output $0 instead of 0 for conditional trap if one operand is zero

2024-07-05 Thread YunQiang Su
We have done so for MIPSr6, which removes the support of condtional trap with IMM. To be consistent, Let's do so for pre-R6. We also add 2 new tests 1) be sure that $0 is used. 2) be sure we expand the condtional trap compare with constant, instead of leaving it to GAS. We decide to so so for

[PATCH] middle-end: Add debug function to dump dominator tree in dot format

2024-07-05 Thread Alex Coplan
Hi, This adds a debug function to dump the dominator tree in dot/graphviz format. The idea is that the function can be called in GDB, the output copy/pasted into a .dot file and then rendered using graphviz. Bootstrapped/regtested on aarch64-linux-gnu, OK for trunk? Thanks, Alex gcc/ChangeLog:

Re: [RFC/PATCH] libgcc: sh: Use soft-fp for non-hosted SH3/SH4

2024-07-05 Thread Sébastien Michelland
Hi Oleg! I don't understand why this is being limited to SH3 and SH4 only? Almost all SH4 systems out there have an FPU (unless special configurations are used). So I'd say if switching to soft-fp, then for SH-anything, not just SH3/SH4. If it yields some improvements for some users, I'm all f

[PATCH v2] i386: Refactor ssedoublemode

2024-07-05 Thread Hu, Lin1
I Modified the changelog and comments. ssedoublemode's double should mean double type, like SI -> DI. And we need to refactor some patterns with instead of . BRs, Lin gcc/ChangeLog: * config/i386/sse.md (ssedoublemode): Remove mappings to double of elements and mapping vector