Re: [PATCH] Fix wrong cost of MEM when addr is a lea.

2024-06-25 Thread Richard Biener
On Wed, Jun 26, 2024 at 8:09 AM liuhongt wrote: > > 416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0. > The commit adjust rtx_cost of mem to reduce cost of (add op0 disp). > But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea. > It is the case in the PR, the p

Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]

2024-06-25 Thread Richard Sandiford
Alexandre Oliva writes: > On Jun 25, 2024, Richard Sandiford wrote: > >>> Richard (Sandiford), do you happen to recall why the IRC conversation >>> mentioned in the PR trail decided to drop it entirely, even for signed >>> types? > >> In the PR, the original shift was 32768 >> x (x >= 16) on ints

[PATCH] Fix wrong cost of MEM when addr is a lea.

2024-06-25 Thread liuhongt
416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0. The commit adjust rtx_cost of mem to reduce cost of (add op0 disp). But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea. It is the case in the PR, the patch uses lower cost to enable more simplication and fix th

Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]

2024-06-25 Thread Alexandre Oliva
On Jun 25, 2024, Richard Sandiford wrote: >> Richard (Sandiford), do you happen to recall why the IRC conversation >> mentioned in the PR trail decided to drop it entirely, even for signed >> types? > In the PR, the original shift was 32768 >> x (x >= 16) on ints, which the > vectoriser was narr

RE: [PATCH v2] Vect: Support truncate after .SAT_SUB pattern in zip

2024-06-25 Thread Li, Pan2
Thanks Tamer, gimple_ranger works well for that case, will send another patch after this one. Pan -Original Message- From: Li, Pan2 Sent: Tuesday, June 25, 2024 2:26 PM To: Tamar Christina ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.c

[PATCH V3 Committed] [x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31.

2024-06-25 Thread liuhongt
Here's the patch committed. Try to optimize x < 0 ? -1 : 0 into (signed) x >> 31 and x < 0 ? 1 : 0 into (unsigned) x >> 31. Move the optimization did in ix86_expand_int_vcond to match.pd gcc/ChangeLog: PR target/114189 * match.pd: Simplify a < 0 ? -1 : 0 to (signed) >> 31 and a

Re: [PATCH 11/11] Handle subroutine types in CodeView

2024-06-25 Thread Jeff Law
On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates DW_TAG_subroutine_type DIEs into LF_PROCEDURE symbols. gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_procedure and lf_arglist to union. (write_lf_procedure, write

Re: [PATCH 10/11] Handle bitfields for CodeView

2024-06-25 Thread Jeff Law
On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates structure members with DW_AT_data_bit_offset set in DWARF into LF_BITFIELD symbols. gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_bitfield to union. (write_lf_bitfield): New funct

[PATCH v1] Internal-fn: Support new IFN SAT_TRUNC for unsigned scalar int

2024-06-25 Thread pan2 . li
From: Pan Li This patch would like to add the middle-end presentation for the saturation truncation. Aka set the result of truncated value to the max value when overflow. It will take the pattern similar as below. Form 1: #define DEF_SAT_U_TRUC_FMT_1(WT, NT) \ NT __attribute__((noinline))

[pushed] diagnostics: introduce diagnostic-global-context.cc

2024-06-25 Thread David Malcolm
This moves all of the uses of global_dc within diagnostic.cc (including the definition) to a new diagnostic-global-context.cc. My intent is to make clearer those parts of our internal API that implicitly use global_dc, and to perhaps avoid linking global_dc into a future libdiagnostics.so. No fun

[pushed] diagnostics: eliminate various implicit uses of global_dc

2024-06-25 Thread David Malcolm
This patch eliminates all implicit uses of "global_dc" from the path-printing logic and from gcc_rich_location::add_location_if_nearby. No functional change intended. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Successful run of analyzer integration tests on x86_64-pc-linux-gnu

[pushed] testsuite: use check-jsonschema for validating .sarif files [PR109360]

2024-06-25 Thread David Malcolm
As reported here: https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655434.html the schema validation I added for generated .sarif files in r15-1541-ga84fe222029ff2 used the "jsonschema" command line tool, which has been deprecated by more recent versions of the Python 3 "jsonschema" module. T

Re: [PATCH 09/11] Handle arrays for CodeView

2024-06-25 Thread Jeff Law
On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates DW_TAG_array_type DIEs into LF_ARRAY symbols. gcc/ * dwarf2codeview.cc (struct codeview_custom_type): Add lf_array to union. (write_lf_array): New function. (write_custom_types): Call

Re: [PATCH 08/11] Handle unions for CodeView.

2024-06-25 Thread Jeff Law
On 6/17/24 6:17 PM, Mark Harmstone wrote: Translates DW_TAG_union_type DIEs into LF_UNION symbols. gcc/ * dwarf2codeview.cc (write_lf_union): New function. (write_custom_types): Call write_lf_union. (add_struct_forward_def): Handle DW_TAG_union_type

Re: [PATCH] i386: Remove declaration of unused functions

2024-06-25 Thread Iain Sandoe
> On 25 Jun 2024, at 22:59, Evgeny Karpov wrote: > > The patch fixes the issue introduced in > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63512c72df09b43d56ac7680cdfd57a66d40c636 > and reported at > https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655599.html . Trivial patches like this

Re: [PATCH] libstdc++: Simplify std::valarray initialization helpers

2024-06-25 Thread Jonathan Wakely
Pushed to trunk. On Thu, 20 Jun 2024 at 16:34, Jonathan Wakely wrote: > > Tested x86_64-linux. > > -- >8 -- > > Dispatching to partial specializations doesn't really seem to offer much > benefit here. The __is_trivial(T) condition is a compile-time constant > so the untaken branches are dead code

[PATCH] libstdc++: Add script to update docs for a new release branch

2024-06-25 Thread Jonathan Wakely
This script automates some updates that should be made when branching from trunk. Putting them in a script makes it much easier and means I won't forget what should be done. Any suggestions for doing this differently? Anything I've forgotten that should be added here? We could add an entry to th

Re: [committed][gcc-13] libstdc++: Remove confusing text from status tables for release branch

2024-06-25 Thread Jonathan Wakely
On Tue, 25 Jun 2024 at 23:34, Jonathan Wakely wrote: > > Pushed to gcc-13. And the equivalent for gcc-14 too. > > -- >8 -- > > When I tried to make the release branch versions of these docs refer to > the release branch instead of "mainline GCC", for some reason I left the > text "not any parti

[committed][gcc-13] libstdc++: Remove confusing text from status tables for release branch

2024-06-25 Thread Jonathan Wakely
Pushed to gcc-13. -- >8 -- When I tried to make the release branch versions of these docs refer to the release branch instead of "mainline GCC", for some reason I left the text "not any particular release" there. That's just confusing, because the docs are for a particular release, the latest on

[committed][gcc-12] libstdc++: Remove confusing text from status tables for release branch

2024-06-25 Thread Jonathan Wakely
Pushed to gcc-12. -- >8 -- When I tried to make the release branch versions of these docs refer to the release branch instead of "mainline GCC", for some reason I left the text "not any particular release" there. That's just confusing, because the docs are for a particular release, the latest on

[committed][gcc-11] libstdc++: Replace reference to mainline in release branch docs

2024-06-25 Thread Jonathan Wakely
libstdc++-v3/ChangeLog: * doc/xml/manual/status_cxx2023.xml: Change reference from mainline GCC to the release branch. * doc/html/manual/status.html: Regenerate. --- libstdc++-v3/doc/html/manual/status.html | 3 +-- libstdc++-v3/doc/xml/manual/status_cxx2023.xml | 3

[PATCH] RISC-V: Add support for Zabha extension

2024-06-25 Thread Patrick O'Neill
From: Gianluca Guida The Zabha extension adds support for subword Zaamo ops. Extension: https://github.com/riscv/riscv-zabha.git Ratification: https://jira.riscv.org/browse/RVS-1685 gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_subset_list::to_string): Skip zabha

[PATCH] i386: Remove declaration of unused functions

2024-06-25 Thread Evgeny Karpov
The patch fixes the issue introduced in https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63512c72df09b43d56ac7680cdfd57a66d40c636 and reported at https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655599.html . Regards, Evgeny The patch fixes the issue with compilation on x86_64-gnu-linux when war

Re: [PATCH 1/2] Record edge true/false value for gcov

2024-06-25 Thread Jeff Law
On 6/25/24 2:04 AM, Jørgen Kvalsvik wrote: Make gcov aware which edges are the true/false to more accurately reconstruct the CFG. There are plenty of bits left in arc_info and it opens up for richer reporting. gcc/ChangeLog: * gcov-io.h (GCOV_ARC_TRUE): New. (GCOV_ARC_FALSE)

Re: [PATCH 0/3] RISC-V: AMO testsuite cleanup

2024-06-25 Thread Jeff Law
On 6/25/24 3:14 PM, Patrick O'Neill wrote: This is another round of AMO testcase cleanup. Consolidates a lot of testcases and unifies the testcase names. Patrick O'Neill (3): RISC-V: Rename amo testcases RISC-V: Consolidate amo testcase variants RISC-V: Update testcase comments to po

Re: [PATCH] Add param for bb limit to invoke fast_vrp.

2024-06-25 Thread David Malcolm
On Mon, 2024-06-24 at 21:27 -0700, Andrew Pinski wrote: > On Mon, Jun 24, 2024 at 7:35 PM Andrew Pinski > wrote: > > > > On Mon, Jun 24, 2024 at 7:20 PM Andrew MacLeod > > wrote: > > > > > > > > > On 6/22/24 09:15, Richard Biener wrote: > > > > On Fri, Jun 21, 2024 at 3:02 PM Andrew MacLeod >

Re: [PATCH v2 3/3] RISC-V: cmpmem for RISCV with V extension

2024-06-25 Thread Jeff Law
On 12/19/23 2:53 AM, Sergei Lewis wrote: gcc/ChangeLog: * config/riscv/riscv-protos.h (riscv_vector::expand_vec_cmpmem): New function declaration. * config/riscv/riscv-string.cc (riscv_vector::expand_vec_cmpmem): New function; this generates an inline vectorised memory c

Re: [PATCH] c++: decltype of by-ref capture proxy of ref [PR115504]

2024-06-25 Thread Jason Merrill
On 6/25/24 11:45, Patrick Palka wrote: On Tue, 25 Jun 2024, Jason Merrill wrote: On 6/25/24 11:03, Patrick Palka wrote: On Mon, 24 Jun 2024, Jason Merrill wrote: On 6/24/24 21:00, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8

Re: [PATCH][c++ frontend]: check for missing condition for novector [PR115623]

2024-06-25 Thread Jason Merrill
On 6/25/24 12:52, Tamar Christina wrote: The 06/25/2024 17:10, Jason Merrill wrote: On 6/25/24 04:01, Tamar Christina wrote: Hi All, It looks like I forgot to check in the C++ frontend if a condition exist for the loop being adorned with novector. This causes a segfault because cond isn't exp

Re: [PATCH] c++: ICE with __has_unique_object_representations [PR115476]

2024-06-25 Thread Jason Merrill
On 6/25/24 15:07, Marek Polacek wrote: On Tue, Jun 25, 2024 at 06:22:56PM +0100, Jonathan Wakely wrote: On Tue, 25 Jun 2024 at 16:17, Jason Merrill wrote: On 6/25/24 07:15, Jonathan Wakely wrote: On Tue, 25 Jun 2024 at 03:12, Jason Merrill wrote: On 6/18/24 10:31, Marek Polacek wrote: Bo

[PATCH 3/3] RISC-V: Update testcase comments to point to PSABI rather than Table A.6

2024-06-25 Thread Patrick O'Neill
Table A.6 was originally the source of truth for the recommended mappings. Point to the PSABI doc since the memory model mappings have been moved there. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/a-rvwmo-fence.c: Replace A.6 reference with PSABI. * gcc.target/riscv/amo/a-rvw

[PATCH 2/3] RISC-V: Consolidate amo testcase variants

2024-06-25 Thread Patrick O'Neill
Many riscv/amo/ testcases use check-function-bodies. These testcases can be consolidated with related testcases (memory ordering variants) without affecting the assertions. Give functions descriptive names so testsuite failures are obvious from the 'FAIL:' line. gcc/testsuite/ChangeLog:

[PATCH 1/3] RISC-V: Rename amo testcases

2024-06-25 Thread Patrick O'Neill
Rename riscv/amo/ testcases to follow a '{ext}-{model}-{name}-{memory order}.c' naming convention. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/amo-table-a-6-load-2.c: Move to... * gcc.target/riscv/amo/a-rvwmo-load-acquire.c: ...here. * gcc.target/riscv/amo/amo-table-a-

[PATCH 0/3] RISC-V: AMO testsuite cleanup

2024-06-25 Thread Patrick O'Neill
This is another round of AMO testcase cleanup. Consolidates a lot of testcases and unifies the testcase names. Patrick O'Neill (3): RISC-V: Rename amo testcases RISC-V: Consolidate amo testcase variants RISC-V: Update testcase comments to point to PSABI rather than Table A.6 .../gcc.ta

[COMMITTED] Add param for bb limit to invoke fast_vrp.

2024-06-25 Thread Andrew MacLeod
On 6/25/24 00:27, Andrew Pinski wrote: On Mon, Jun 24, 2024 at 7:35 PM Andrew Pinski wrote: This should be: warning (OPT_Wdisabled_optimization, "Using fast VRP algorithm. %d basic blocks" " exceeds %<%--param=vrp-block-limit=d%> limit", n_basic_blocks_for_fn (fun), param_vrp_block_limi

Re: [PATCH] c++: ICE with __has_unique_object_representations [PR115476]

2024-06-25 Thread Marek Polacek
On Tue, Jun 25, 2024 at 06:22:56PM +0100, Jonathan Wakely wrote: > On Tue, 25 Jun 2024 at 16:17, Jason Merrill wrote: > > > > On 6/25/24 07:15, Jonathan Wakely wrote: > > > On Tue, 25 Jun 2024 at 03:12, Jason Merrill wrote: > > >> > > >> On 6/18/24 10:31, Marek Polacek wrote: > > >>> Bootstrapped

Re: [PATCH] Add -finline-functions-aggressive option [PR114531]

2024-06-25 Thread Malladi, Rama
Thanks for the review and the inputs, Richard Biener. The `-finline-as=` option is an interesting. However, this PR specifically aims to make these `-O3` inline params to be available under some `-f` option, similar to some of the existing inline options. On 6/24/24, 6:28 AM, "Richard Biener"

Re: [PATCH v3] [testsuite] [arm] [vect] adjust mve-vshr test [PR113281]

2024-06-25 Thread Richard Sandiford
Alexandre Oliva writes: > On Jun 24, 2024, "Richard Earnshaw (lists)" wrote: > >> A signed shift right on a 16-bit vector element by 15 would still >> yield -1 > > Yeah. Indeed, ISTM that we *could* have retained the clamping > transformation for *signed* shifts, since the clamping would only ma

[committed] Fix fr30-elf newlib build failure with late-combine

2024-06-25 Thread Jeff Law
So the late combine work has exposed a latent bug in the fr30 port. The fr30 "call" instruction is pc-relative with a *very* limited range, 12 bits to be precise. With such a limited range its hard to see how we could ever consistently use it in the compiler, with the possible exception of s

Re: [PATCH] c++: ICE with __has_unique_object_representations [PR115476]

2024-06-25 Thread Jonathan Wakely
On Tue, 25 Jun 2024 at 16:17, Jason Merrill wrote: > > On 6/25/24 07:15, Jonathan Wakely wrote: > > On Tue, 25 Jun 2024 at 03:12, Jason Merrill wrote: > >> > >> On 6/18/24 10:31, Marek Polacek wrote: > >>> Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/14/13? > >> > >> Makes sense to

Re: [PATCH] Add a late-combine pass [PR106594]

2024-06-25 Thread YunQiang Su
Just FYI. This patch does something to gcc.target/mips/madd-8.c, and gcc.target/mips/msub-8.c. -PASS: gcc.target/mips/madd-8.c -O2 scan-assembler \tmul\t -PASS: gcc.target/mips/madd-8.c -O2 scan-assembler-not \tmadd\t -PASS: gcc.target/mips/madd-8.c -O2 scan-assembler-not \tmflo\t -PAS

Re: [PATCH] Hard register asm constraint

2024-06-25 Thread Paul Koning
> On Jun 25, 2024, at 12:04 PM, Stefan Schulze Frielinghaus > wrote: > > On Tue, Jun 25, 2024 at 10:03:34AM -0400, Paul Koning wrote: >> > ... > could be rewritten into > > int test (int x, int y) > { > asm ("foo %0,%1,%2" : "+{r4}" (x) : "{r5}" (y), "d" (y)); >

[Patch, rs6000, middle-end] v5: Add implementation for different targets for pair mem fusion

2024-06-25 Thread Ajit Agarwal
Hello All: This patch addressed cleanup of the code and fix linaro failures. All comments are addressed. Common infrastructure using generic code for pair mem fusion of different targets. rs6000 target specific code implement virtual functions defined by generic code. Target specific code are

Re: [PATCH][c++ frontend]: check for missing condition for novector [PR115623]

2024-06-25 Thread Tamar Christina
The 06/25/2024 17:10, Jason Merrill wrote: > On 6/25/24 04:01, Tamar Christina wrote: > > Hi All, > > > > It looks like I forgot to check in the C++ frontend if a condition exist > > for the > > loop being adorned with novector. This causes a segfault because cond isn't > > expected to be null.

Re: [PATCH] c++: structured bindings and lookup of tuple_size/tuple_element [PR115605]

2024-06-25 Thread Marek Polacek
On Mon, Jun 24, 2024 at 10:00:40PM -0700, Andrew Pinski wrote: > The problem here is even though we pass std namespace to lookup_template_class > as the context, it will look at the current scope for the name too. > The fix is to lookup the qualified name first and then use that > for lookup_templa

Re: [PATCH][c++ frontend]: check for missing condition for novector [PR115623]

2024-06-25 Thread Jason Merrill
On 6/25/24 04:01, Tamar Christina wrote: Hi All, It looks like I forgot to check in the C++ frontend if a condition exist for the loop being adorned with novector. This causes a segfault because cond isn't expected to be null. This fixes it by issuing the same kind of diagnostics we issue for

Re: [PATCH] Hard register asm constraint

2024-06-25 Thread Stefan Schulze Frielinghaus
On Tue, Jun 25, 2024 at 10:03:34AM -0400, Paul Koning wrote: > > > > On Jun 24, 2024, at 1:50 AM, Stefan Schulze Frielinghaus > > wrote: > > > > Ping. > > > > On Mon, Jun 10, 2024 at 07:19:19AM +0200, Stefan Schulze Frielinghaus wrote: > >> Ping. > >> > >> On Fri, May 24, 2024 at 11:13:12AM

Re: [PATCH] c++: decltype of by-ref capture proxy of ref [PR115504]

2024-06-25 Thread Patrick Palka
On Tue, 25 Jun 2024, Jason Merrill wrote: > On 6/25/24 11:03, Patrick Palka wrote: > > On Mon, 24 Jun 2024, Jason Merrill wrote: > > > > > On 6/24/24 21:00, Patrick Palka wrote: > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK > > > > for trunk/14? > > > > > > > > --

Re: [PATCH] c++: alias CTAD and copy deduction guide [PR115198]

2024-06-25 Thread Jason Merrill
On 6/13/24 13:00, Patrick Palka wrote: On Thu, 13 Jun 2024, Jason Merrill wrote: On 6/13/24 11:05, Patrick Palka wrote: On Thu, 23 May 2024, Jason Merrill wrote: On 5/23/24 17:42, Patrick Palka wrote: On Thu, 23 May 2024, Jason Merrill wrote: On 5/23/24 14:06, Patrick Palka wrote: Bootst

Re: [PATCH] c++: decltype of by-ref capture proxy of ref [PR115504]

2024-06-25 Thread Jason Merrill
On 6/25/24 11:03, Patrick Palka wrote: On Mon, 24 Jun 2024, Jason Merrill wrote: On 6/24/24 21:00, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk/14? -- >8 -- The capture proxy handling in finish_decltype_type added in r14-5330 was strippi

Re: [PATCH] c++: ICE with __has_unique_object_representations [PR115476]

2024-06-25 Thread Jason Merrill
On 6/25/24 07:15, Jonathan Wakely wrote: On Tue, 25 Jun 2024 at 03:12, Jason Merrill wrote: On 6/18/24 10:31, Marek Polacek wrote: Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/14/13? Makes sense to me, though probably the [meta.unary.prop] table should be adjusted in the same

Re: [PATCH] arm: make arm_predict_doloop_p reject loops with calls

2024-06-25 Thread Richard Earnshaw (lists)
On 25/06/2024 12:53, Andre Vieira (lists) wrote: > Hi, > > With the introduction of low overhead loops in > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3dfc28dbbd21b1d708aa40064380ef4c42c994d7 > we defined arm_predict_doloop_p, this is meant to be a low-weight check to > rule out loops we are

Re: [PATCH] c++: alias CTAD and copy deduction guide [PR115198]

2024-06-25 Thread Patrick Palka
On Thu, 13 Jun 2024, Patrick Palka wrote: > On Thu, 13 Jun 2024, Jason Merrill wrote: > > > On 6/13/24 11:05, Patrick Palka wrote: > > > On Thu, 23 May 2024, Jason Merrill wrote: > > > > > > > On 5/23/24 17:42, Patrick Palka wrote: > > > > > On Thu, 23 May 2024, Jason Merrill wrote: > > > > > >

Re: [PATCH] c++: decltype of by-ref capture proxy of ref [PR115504]

2024-06-25 Thread Patrick Palka
On Mon, 24 Jun 2024, Jason Merrill wrote: > On 6/24/24 21:00, Patrick Palka wrote: > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK > > for trunk/14? > > > > -- >8 -- > > > > The capture proxy handling in finish_decltype_type added in r14-5330 > > was stripping the refere

Re: [PATCH] Hard register asm constraint

2024-06-25 Thread Maciej W. Rozycki
On Tue, 25 Jun 2024, Paul Koning wrote: > >>> could be rewritten into > >>> > >>> int test (int x, int y) > >>> { > >>> asm ("foo %0,%1,%2" : "+{r4}" (x) : "{r5}" (y), "d" (y)); > >>> return x; > >>> } > > I like this idea but I'm wondering: regular constraints specify what > sort of value is

[PATCH, obvious] Fix PR c/115587, uninitialized variable in c_parser_omp_loop_nest

2024-06-25 Thread Sandra Loosemore
This function had a reference to an uninitialized variable on the error path. The problem was diagnosed by clang but not gcc. It seems the cleanest solution is to initialize all the loop-clause variables at the point of declaration rather than at different places in the code. The C++ front end d

Re: [PATCH] late-combine: Honor targetm.cannot_copy_insn_p

2024-06-25 Thread Jeff Law
On 6/25/24 8:07 AM, Richard Sandiford wrote: late-combine was failing to take targetm.cannot_copy_insn_p into account, which led to multiple definitions of PIC symbols on arm*-*-* targets. Currently bootstrapping & regression testing on arm-linux-gnueabihf and aarch64-linus-gnu. It should fi

[PATCH] tree-optimization/115646 - ICE with pow shrink-wrapping from bitfield

2024-06-25 Thread Richard Biener
The following makes analysis and transform agree on constraints. Bootstrap and regtest pending on x86_64-unknown-linux-gnu. PR tree-optimization/115646 * tree-call-cdce.cc (check_pow): Check for bit_sz values as allowed by transform. * gcc.dg/pr115646.c: New testc

[PATCH] late-combine: Honor targetm.cannot_copy_insn_p

2024-06-25 Thread Richard Sandiford
late-combine was failing to take targetm.cannot_copy_insn_p into account, which led to multiple definitions of PIC symbols on arm*-*-* targets. Currently bootstrapping & regression testing on arm-linux-gnueabihf and aarch64-linus-gnu. It should fix the bootstrap-lto problem reported by Linaro's C

Re: [PATCH] Hard register asm constraint

2024-06-25 Thread Paul Koning
> On Jun 24, 2024, at 1:50 AM, Stefan Schulze Frielinghaus > wrote: > > Ping. > > On Mon, Jun 10, 2024 at 07:19:19AM +0200, Stefan Schulze Frielinghaus wrote: >> Ping. >> >> On Fri, May 24, 2024 at 11:13:12AM +0200, Stefan Schulze Frielinghaus wrote: >>> This implements hard register constr

Re: [PATCH] GORI cleanups

2024-06-25 Thread Andrew MacLeod
On 6/25/24 09:44, Richard Biener wrote: The following replaces conditional is_export_p calls as is_export_p handles a NULL bb itself. Bootstrap running on x86_64-unknown-linux-gnu, OK? Absolutely. Thanks Andrew Thanks, Richard. * gimple-range-gori.cc (gori_compute::may_recompute

Pushed: [PATCH] doc: gccint: Fix typos in jump_table_data description

2024-06-25 Thread Xi Ruoyao
gcc/ChangeLog: * doc/rtl.texi (jump_table_data): Fix typos. --- Pushed as obvious. gcc/doc/rtl.texi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi index c1717ab5f6b..a1ede418c21 100644 --- a/gcc/doc/rtl.texi +++ b/gcc/doc/rtl.

[PATCH] GORI cleanups

2024-06-25 Thread Richard Biener
The following replaces conditional is_export_p calls as is_export_p handles a NULL bb itself. Bootstrap running on x86_64-unknown-linux-gnu, OK? Thanks, Richard. * gimple-range-gori.cc (gori_compute::may_recompute_p): Call is_export_p with NULL bb. --- gcc/gimple-range-gori.cc |

[PATCH] tree-optimization/115629 - missed tail merging

2024-06-25 Thread Richard Biener
The following fixes a missed tail-merging observed for the testcase in PR115629. The issue is that when deps_ok_for_redirect doesn't compute both would be valid prevailing blocks it rejects the merge. The following instead makes sure to record the working block as prevailing. Also stmt comparison

Re: [PATCH 1/3 v4] vect: generate suitable convert insn for int -> int, float -> float and int <-> float.

2024-06-25 Thread Richard Biener
On Tue, 25 Jun 2024, Hu, Lin1 wrote: > Hi, > > This is the current version. > > I haven't made any major changes to the original code, I think it will have > less impact on your code. And I think the current API is sufficient to > support the mode selection you mentioned, if you have any conc

Re: [PATCH] Add param for bb limit to invoke fast_vrp.

2024-06-25 Thread Andrew MacLeod
On 6/24/24 22:35, Andrew Pinski wrote: On Mon, Jun 24, 2024 at 7:20 PM Andrew MacLeod wrote: // Fill ssa-cache R with any outgoing ranges on edge E, using QUERY. bool gori_on_edge (class ssa_cache &r, edge e, range_query *query = NULL); This is what the fast_vrp routines uses. We ca

RE: [PATCH][ivopts]: use affine_tree when comparing IVs during candidate selection [PR114932]

2024-06-25 Thread Richard Biener
On Mon, 24 Jun 2024, Tamar Christina wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Thursday, June 20, 2024 8:49 AM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; bin.ch...@linux.alibaba.com > > Subject: RE: [PATCH][ivopts]: use affine_tree when com

Re: [PATCH V2] [x86] Optimize a < 0 ? -1 : 0 to (signed)a >> 31.

2024-06-25 Thread Richard Biener
On Mon, Jun 24, 2024 at 1:28 AM liuhongt wrote: > > > I think the check for TYPE_UNSIGNED should be of TREE_TYPE (@0) rather > > than type here. > > Changed > > > Or maybe you need `types_match (type, TREE_TYPE (@0))` too. > And use tree_nop_conversion_p (type, TREE_TYPE (@0)) and add view_convert

Re: [PATCH][v2] Support single def-use cycle optimization for SLP reduction vectorization

2024-06-25 Thread Richard Biener
On Tue, 25 Jun 2024, Thomas Schwinge wrote: > Hi! > > On 2024-06-14T11:08:15+0200, Richard Biener wrote: > > We can at least mimic single def-use cycle optimization when doing > > single-lane SLP reductions and that's required to avoid regressing > > compared to non-SLP. > > > > Bootstrapped and

Re: [PATCH] libstdc++: Fix --disable-libstdcxx-verbose abi break [PR115585]

2024-06-25 Thread Jonathan Wakely
Please read https://gcc.gnu.org/contribute.html#patches and ensure you've included everything, for example ... On 22/06/24 17:11 -0400, Shengdun Wang wrote: __glibcxx_assert_fail is not defined when we disable the libstdcxx-verbose. This causes ABI break when a binary is compiled with verbose en

[PATCH v1] RISC-V: Add testcases for vector truncate after .SAT_SUB

2024-06-25 Thread pan2 . li
From: Pan Li This patch would like to add the test cases of the vector truncate after .SAT_SUB. Aka: #define DEF_VEC_SAT_U_SUB_TRUNC_FMT_1(OUT_T, IN_T) \ void __attribute__((noinline)) \ vec_sat_u_sub_trunc_##OUT_T##_fmt_1 (OUT_T *ou

[PATCH] libstdc++: Replace viewcvs links in docs with cgit links

2024-06-25 Thread Jonathan Wakely
Gerald noticed these stale viewcvs links. I'll push this to trunk later this week, and backport too. -- >8 -- libstdc++-v3/ChangeLog: * doc/xml/faq.xml: Replace viewcvs links with cgit links. * doc/xml/manual/allocator.xml: Likewise. * doc/xml/manual/mt_allocator.xml: Lik

Ping^4: [PATCH 0/2] Fix two test failures with --enable-default-pie [PR70150]

2024-06-25 Thread Xi Ruoyao
Ping^4 https://gcc.gnu.org/pipermail/gcc-patches/2024-May/650763.html On Mon, 2024-05-06 at 12:45 +0800, Xi Ruoyao wrote: > In GCC 14.1-rc1, there are two new (comparing to GCC 13) failures if > the build is configured --enable-default-pie.  Let's fix them. > > Tested on x86_64-linux-gnu.  Ok for

[PATCH]middle-end: Implement conditonal store vectorizer pattern [PR115531]

2024-06-25 Thread Tamar Christina
Hi All, This adds a conditional store optimization for the vectorizer as a pattern. The vectorizer already supports modifying memory accesses because of the pattern based gather/scatter recognition. Doing it in the vectorizer allows us to still keep the ability to vectorize such loops for archite

[pushed] Add a debug counter for late-combine

2024-06-25 Thread Richard Sandiford
This should help to diagnose problems like PR115631. Bootstrapped & regression-tested on aarch64-linux-gnu, pushed as obvious. Richard gcc/ * dbgcnt.def (late_combine): New debug counter. * late-combine.cc (insn_combination::run): Use it. --- gcc/dbgcnt.def | 1 + gcc/late

[PATCH] arm: make arm_predict_doloop_p reject loops with calls

2024-06-25 Thread Andre Vieira (lists)
Hi, With the introduction of low overhead loops in https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3dfc28dbbd21b1d708aa40064380ef4c42c994d7 we defined arm_predict_doloop_p, this is meant to be a low-weight check to rule out loops we are not considering for doloop optimization and it is used by

Re: [PATCH] c++: ICE with __has_unique_object_representations [PR115476]

2024-06-25 Thread Jonathan Wakely
On Tue, 25 Jun 2024 at 03:12, Jason Merrill wrote: > > On 6/18/24 10:31, Marek Polacek wrote: > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk/14/13? > > Makes sense to me, though probably the [meta.unary.prop] table should be > adjusted in the same way. Jonathan, what do you think

Re: [PATCH][v2] Support single def-use cycle optimization for SLP reduction vectorization

2024-06-25 Thread Thomas Schwinge
Hi! On 2024-06-14T11:08:15+0200, Richard Biener wrote: > We can at least mimic single def-use cycle optimization when doing > single-lane SLP reductions and that's required to avoid regressing > compared to non-SLP. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. > > * tree

x86_64-gnu-linux bootstrap fail (was: [PATCH v2 2/6] Extract ix86 dllimport implementation to mingw)

2024-06-25 Thread Evgeny Karpov
Tuesday, June 25, 2024 12:03 PM Tobias Burnus wrote: > > Hi Evgeny, > > I am not sure whether I have chosen the right email in the thread but: > a x86-64 GNU Linux build currently fails as follows. > > At a glance, it seems to be sufficient to remove the prototype > declaration in i386.cc. > >

Re: [PATCH 3/3] Use the term MC/DC in help for gcov --conditions

2024-06-25 Thread Jørgen Kvalsvik
On 6/25/24 12:25, Jan Hubicka wrote: Without key terms like "masking" and "MC/DC" it is not at all obvious what --conditions actually reports on, and there is no easy path for the user to figure out. By at least including the two key terms MC/DC and masking users have something to search for. gc

Re: [PATCH 1/3] Release structures on function return

2024-06-25 Thread Jørgen Kvalsvik
On 6/25/24 12:23, Jan Hubicka wrote: The value vec objects are destroyed on exit, but release still needs to be called explicitly. gcc/ChangeLog: * tree-profile.cc (find_conditions): Release vectors before return. I wonder if you turn hash_map, vec> exprs; to hash_m

Re: [PATCH] Add a late-combine pass [PR106594]

2024-06-25 Thread Richard Biener
On Mon, Jun 24, 2024 at 9:38 PM Segher Boessenkool wrote: > > I didn't see this before. Sigh. > > On Tue, Jan 02, 2024 at 09:47:11AM +, Richard Sandiford wrote: > > Segher Boessenkool writes: > > > On Tue, Oct 24, 2023 at 07:49:10PM +0100, Richard Sandiford wrote: > > >> This patch adds a c

Re: [PATCH 7/8] vect: Support multiple lane-reducing operations for loop reduction [PR114440]

2024-06-25 Thread Richard Biener
On Tue, Jun 25, 2024 at 11:32 AM Feng Xue OS wrote: > > >> > >> >> - if (slp_node) > >> >> + if (slp_node && SLP_TREE_LANES (slp_node) > 1) > >> > > >> > Hmm, that looks wrong. It looks like SLP_TREE_NUMBER_OF_VEC_STMTS is off > >> > instead, which is bad. > >> > > >> >> nvector

Re: [PATCH 3/3] Use the term MC/DC in help for gcov --conditions

2024-06-25 Thread Jan Hubicka
> Without key terms like "masking" and "MC/DC" it is not at all obvious > what --conditions actually reports on, and there is no easy path for the > user to figure out. By at least including the two key terms MC/DC and > masking users have something to search for. > > gcc/ChangeLog: > > *

Re: [PATCH 2/3] Add section on MC/DC in gcov manual

2024-06-25 Thread Jan Hubicka
> gcc/ChangeLog: > > * doc/gcov.texi: Add MC/DC section. OK, thanks! Honza > --- > gcc/doc/gcov.texi | 72 +++ > 1 file changed, 72 insertions(+) > > diff --git a/gcc/doc/gcov.texi b/gcc/doc/gcov.texi > index dc79bccb8cf..a9221738cce 100644 > ---

Re: [PATCH 1/3] Release structures on function return

2024-06-25 Thread Jan Hubicka
> The value vec objects are destroyed on exit, but release still needs to > be called explicitly. > > gcc/ChangeLog: > > * tree-profile.cc (find_conditions): Release vectors before > return. I wonder if you turn hash_map, vec> exprs; to hash_map, auto_vec> exprs; Won't hash_

x86_64-gnu-linux bootstrap fail (was: [PATCH v2 2/6] Extract ix86 dllimport implementation to mingw)

2024-06-25 Thread Tobias Burnus
Hi Evgeny, I am not sure whether I have chosen the right email in the thread but: a x86-64 GNU Linux build currently fails as follows. At a glance, it seems to be sufficient to remove the prototype declaration in i386.cc. Namely: gcc/config/i386/i386.cc:107:12: error: 'rtx_def* legitimize_d

Re: [PATCH ver3] rs6000, altivec-1-runnable.c update the, require-effective-target

2024-06-25 Thread Kewen.Lin
Hi, on 2024/6/25 03:00, Carl Love wrote: > GCC maintainers: > > version 3, rebased on current mainline tree. Version 2 of the patch was out > of sync. Retested the patch on > Power 10 with no regressions. > > version 2, update the dg options per the feedback. Retested the patch on > Power 1

[SPARC] Fix PR target/115608

2024-06-25 Thread Eric Botcazou
This passes -m32 when -mv8plus is specified on Linux (like on Solaris). Applied to mainline and 14 branch. 2024-06-25 Eric Botcazou PR target/115608 * config/sparc/linux64.h (CC1_SPEC): Pass -m32 for -mv8plus. -- Eric Botcazoudiff --git a/gcc/config/sparc/linux64.h b/gcc/c

[PING][PATCH] rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759]

2024-06-25 Thread Peter Bergner
Ping.[Message-ID: <1a420e3e-3285-4e0b-87bd-6714fedc0...@linux.ibm.com>] Peter On 6/19/24 4:14 PM, Peter Bergner wrote: > We currently only emit the ROP-protect hash* insns for Power10, where the > insns were added to the architecture. We want to emit them for earlier > cpus (where they oper

Re: [PATCH 7/8] vect: Support multiple lane-reducing operations for loop reduction [PR114440]

2024-06-25 Thread Feng Xue OS
>> >> >> - if (slp_node) >> >> + if (slp_node && SLP_TREE_LANES (slp_node) > 1) >> > >> > Hmm, that looks wrong. It looks like SLP_TREE_NUMBER_OF_VEC_STMTS is off >> > instead, which is bad. >> > >> >> nvectors = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); >> >>else >> >>

Re: rs6000: Properly default-disable late-combine passes [PR106594, PR115622, PR115633]

2024-06-25 Thread Richard Sandiford
Thomas Schwinge writes: > Hi! > > On 2024-06-25T10:07:47+0100, Richard Sandiford > wrote: >> Thomas Schwinge writes: >>> On 2024-06-20T14:34:18+0100, Richard Sandiford >>> wrote: This patch adds a combine pass that runs late in the pipeline. [...] >>> >>> Nice! >>> The patch [.

rs6000: Properly default-disable late-combine passes [PR106594, PR115622, PR115633] (was: [PATCH 6/6] Add a late-combine pass [PR106594])

2024-06-25 Thread Thomas Schwinge
Hi! On 2024-06-25T10:07:47+0100, Richard Sandiford wrote: > Thomas Schwinge writes: >> On 2024-06-20T14:34:18+0100, Richard Sandiford >> wrote: >>> This patch adds a combine pass that runs late in the pipeline. >>> [...] >> >> Nice! >> >>> The patch [...] disables the pass by default on i386,

Re: [PATCH 6/6] Add a late-combine pass [PR106594]

2024-06-25 Thread Richard Sandiford
Thomas Schwinge writes: > Hi! > > On 2024-06-20T14:34:18+0100, Richard Sandiford > wrote: >> This patch adds a combine pass that runs late in the pipeline. >> [...] > > Nice! > >> The patch [...] disables the pass by default on i386, rs6000 >> and xtensa. > > Like here: > >> --- a/gcc/config/i38

Re: [PATCH 6/6] Add a late-combine pass [PR106594]

2024-06-25 Thread Thomas Schwinge
Hi! On 2024-06-20T14:34:18+0100, Richard Sandiford wrote: > This patch adds a combine pass that runs late in the pipeline. > [...] Nice! > The patch [...] disables the pass by default on i386, rs6000 > and xtensa. Like here: > --- a/gcc/config/i386/i386-options.cc > +++ b/gcc/config/i386/i38

Re: [PATCH 3/8] Make more use of force_subreg

2024-06-25 Thread Richard Sandiford
Jeff Law writes: > On 6/17/24 3:53 AM, Richard Sandiford wrote: >> This patch makes target-independent code use force_subreg instead >> of simplify_gen_subreg in some places. The criteria were: >> >> (1) The code is obviously specific to expand (where new pseudos >> can be created), or at l

Re: [PATCH 09/52 v2] Replace {FLOAT, {, LONG_}DOUBLE}_TYPE_SIZE with new hook mode_for_floating_type

2024-06-25 Thread Kewen.Lin
Hi all, I just pushed this 09/52 v2 with its following target changes as r15-1594, thanks a lot for your comments/reviews/approvals! BR, Kewen > Subject: [PATCH 09/52] Replace {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE with new hook > mode_for_floating_type > > Currently how we determine which mode will

Re: [PATCH version 2] rs6000, altivec-1-runnable.c update the, require-effective-target

2024-06-25 Thread Carl Love
Kewen: On 6/23/24 19:41, Kewen.Lin wrote: > Hi, > > on 2024/6/22 00:15, Carl Love wrote: >> GCC maintainers: >> >> version 2, update the dg options per the feedback. Retested the patch on >> Power 10 with no regressions. >> >> This patch updates the dg options. >> >> The patch has been tested o

Re: [PATCH 04/52] go: Replace uses of {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE

2024-06-25 Thread Kewen.Lin
on 2024/6/12 20:32, Ian Lance Taylor wrote: > "Kewen.Lin" writes: > >> Hi, >> >> Gentle ping: >> >> https://gcc.gnu.org/pipermail/gcc-patches/2024-June/653387.html >> >> BR, >> Kewen >> >> on 2024/6/3 11:00, Kewen Lin wrote: >>> Joseph pointed out "floating types should have their mode, >>> not a

[PATCH ver3] rs6000, altivec-1-runnable.c update the, require-effective-target

2024-06-25 Thread Carl Love
GCC maintainers: version 3, rebased on current mainline tree. Version 2 of the patch was out of sync. Retested the patch on Power 10 with no regressions. version 2, update the dg options per the feedback. Retested the patch on Power 10 with no regressions. This patch updates the dg options.

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