Hi, Richard.
>> slp_op and mask_vectype are only initialised when mask_index >= 0.
>>Shouldn't this code be under mask_index >= 0 too?
>>Also, when do we encounter mismatched mask_vectypes? Presumably the SLP
>>node has a known vectype by this point. I think a comment would be useful.
Address
This patch fixes this following FAILs in RISC-V regression:
FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects scan-tree-dump vect
"Loop contains only SLP stmts"
FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only SLP
stmts"
FAIL: gcc.dg/vect/vect-gather-3.c -flto -
The following addresses a missed DECL_NOT_GIMPLE_REG_P setting of
a volatile declared parameter which causes inlining to substitute
a constant parameter into a context where its address is required.
The main issue is in update_address_taken which clears
DECL_NOT_GIMPLE_REG_P from the parameter but
Robin Dapp writes:
> Hi,
>
> the attached v2 includes Tamar's suggestion of keeping the current
> stdout behavior. When no output files are passed (via -O) the output
> is written to stdout as before.
>
> Tamar also mentioned off-list that, similar to match.pd, it might make
> sense to balance
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ready push to trunk.
gcc/ChangeLog:
* config/i386/mmx.md (fma4): New expander.
(fms4): Ditto.
(fnma4): Ditto.
(fnms4): Ditto.
(vec_fmaddsubv4hf4): Ditto.
(vec_fmsubaddv4hf4): Ditto.
gcc/test
Ping
On 03/10/23 3:53 pm, Surya Kumari Jangala wrote:
> Ping
>
> On 20/09/23 7:31 am, Surya Kumari Jangala wrote:
>> Ping
>>
>> On 10/09/23 10:58 pm, Surya Kumari Jangala wrote:
>>> swap: Fix incorrect lane extraction by vec_extract() [PR106770]
>>>
>>> In the routine rs6000_analyze_swaps(), spec
On 9/28/23 15:43, Vineet Gupta wrote:
RISC-V suffers from extraneous sign extensions, despite/given the ABI
guarantee that 32-bit quantities are sign-extended into 64-bit registers,
meaning incoming SI function args need not be explicitly sign extended
(so do SI return values as most ALU insns
Hi Jeff,
Can you replace riscv_vector with riscv_v? That way this will still
work after Joern commits his change to standardize on the riscv_v target
selector.
OK with that change, no need to wait for a review on V2, just go ahead
and blast it in.
No problem, I'll tweak it later and submi
OK, I'll split it as Juzhe suggested. Thanks.
On 2023/10/17 6:24, 钟居哲 wrote:
Yeah. The refactor and rename stuff make the patch difference so messy.
It's not easy to read.
So, I suggest this patch split into these following sub-patch (each
sub-patch not necessary compilable):
1. Refactor an
Hi,
on 2023/10/10 16:18, HAO CHEN GUI wrote:
> Hi David,
>
> Thanks for your review comments.
>
> 在 2023/10/9 23:42, David Edelsohn 写道:
>> #define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8)
>> #define MAX_MOVE_MAX 8
>> +#define MOVE_MAX_PIECES (!TARGET_POWERPC64 ? 4 : 16)
>> +#def
Hi,
on 2023/10/11 19:50, jeevitha wrote:
> Hi All,
>
> The following patch has been bootstrapped and regtested on powerpc64le-linux.
>
> PR106907 has a few warnings spotted from cppcheck. These warnings
> are related to the need of precedence clarification. Instead of using xor,
> it has been ch
Pushed to r14-4674.
在 2023/10/12 下午3:00, Lulu Cheng 写道:
There are two reasons for removing this macro definition:
1. The default in the assembler is to use the nop instruction for filling.
2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]]
The third expression it is the ma
Pushed to r14-4675.
在 2023/10/11 下午4:41, Chenghui Pan 写道:
Following test code triggers unrecognized insn ICE on LoongArch target
with "-O3 -mlasx":
void
foo (unsigned char *dst, unsigned char *src)
{
for (int y = 0; y < 16; y++)
{
for (int x = 0; x < 16; x++)
dst[x] = sr
On Mon, Oct 16, 2023 at 7:58 PM Andrew Pinski wrote:
>
>
>
> On Mon, Oct 16, 2023, 16:39 Eric Gallager wrote:
>>
>> Currently there is an unofficial mirror of GCC on GitHub that people
>> sometimes submit pull requests to:
>> https://github.com/gcc-mirror/gcc
>> However, this is not the proper wa
Hi, Richard.
>> Does IFN_COND_LEN make conceptual sense on RVV? If so, would defining
>> it solve some of these problems?
Yes, IFN_COND_LEN make sense to RVV. We have vmerge instruction which depending
on VL/AVL.
I must say my internal RVV GCC has IFN_LEN_VCOND_MASK which simplify
COND_LEN_ADD
On Sat, Oct 14, 2023 at 01:13:22AM -0400, Jason Merrill wrote:
> On 10/13/23 14:53, Marek Polacek wrote:
> > On Thu, Oct 12, 2023 at 09:41:43PM -0400, Jason Merrill wrote:
> > > On 10/12/23 17:04, Marek Polacek wrote:
> > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
> > > >
> >
On 10/16/23 12:11 PM, Harald Anlauf wrote:
Dear All,
the attached patch fixes a dependency check in frontend optimzation
for nested implied-do IO. The problem appeared for >= 3 loops only
as the check considered dependencies to be only of band form instead
of triangular form.
Regtested on x86_
Hi,
This code fails to link:
import core.math;
real function(real) fn = &sin;
However, when called directly, the D intrinsic `sin()' is expanded by
the front-end into the GCC built-in `__builtin_sin()'. This has been
fixed to now also expand the function when a reference is taken.
As t
On Mon, Oct 16, 2023, 16:39 Eric Gallager wrote:
> Currently there is an unofficial mirror of GCC on GitHub that people
> sometimes submit pull requests to:
> https://github.com/gcc-mirror/gcc
> However, this is not the proper way to contribute to GCC, so that means
> that someone (usually Jonath
Currently there is an unofficial mirror of GCC on GitHub that people
sometimes submit pull requests to:
https://github.com/gcc-mirror/gcc
However, this is not the proper way to contribute to GCC, so that means
that someone (usually Jonathan Wakely) has to go through the PRs and
manually tell people
>> Doesn't this match several cases more than before i.e set the range
>> start to zero fairly often? I mean if it works fine with me and
>> the code is easier to read.
Yes.
>> Please split off the search for the non-contiguous load/stores into
>> a separate function still. With that change it's
Consider this following case:
int
bar (int *x, int a, int b, int n)
{
x = __builtin_assume_aligned (x, __BIGGEST_ALIGNMENT__);
int sum1 = 0;
int sum2 = 0;
for (int i = 0; i < n; ++i)
{
sum1 += x[2*i] - a;
sum1 += x[2*i+1] * b;
sum2 += x[2*i] - b;
sum2 += x[2*i+1]
probe_stack_range has an assert to capture the possibility that that
expand_binop might not construct its result in the provided target
(TEST_ADDR in this case).
We triggered that internally a little while ago. I'm pretty sure it was
in the testsuite, so no new testcase. The fix is easy, c
In the LWN discussion of the "ASCII" art in GCC 14
https://lwn.net/Articles/946733/#Comments
there was some concern about the use of non-ASCII characters in the
output.
Currently -fdiagnostics-text-art-charset defaults to "emoji".
To better handle older terminals by default, this patch special-c
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-4668-gf8644b678285cf.
gcc/ChangeLog:
* diagnostic.cc (diagnostic_initialize): Ensure
context->extra_output_kind is initialized.
---
gcc/diagnostic.cc | 2 +-
1 file changed, 1 insertion(+), 1 del
Robin Dapp writes:
>> Why are the contents of this if statement wrong for COND_LEN?
>> If the "else" value doesn't matter, then the masked form can use
>> the "then" value for all elements. I would have expected the same
>> thing to be true of COND_LEN.
>
> Right, that one was overly pessimistic.
Thanks for the update. The comments below are mostly asking for
cosmetic changes.
HAO CHEN GUI writes:
> Hi,
> Vector mode instructions are efficient for compare on some targets.
> This patch enables vector mode for compare_by_pieces. Currently,
> vector mode is enabled for compare, set and cl
On Mon, Oct 16, 2023 at 9:58 PM Fangrui Song wrote:
>
> On Mon, Oct 16, 2023 at 12:10 PM Uros Bizjak wrote:
> >
> > On Mon, Oct 16, 2023 at 8:24 PM Fangrui Song wrote:
> > >
> > > On 2023-10-16, Uros Bizjak wrote:
> > > >On Tue, Aug 1, 2023 at 9:51 PM Fangrui Song wrote:
> > > >>
> > > >> When
On Sat, Oct 14, 2023 at 06:16:47PM -0700, Andrew Pinski wrote:
> This is a simple error recovery issue when c_safe_arg_type_equiv_p
> was added in r8-5312-gc65e18d3331aa999. The issue is that after
> an error, an argument type (of a function type) might turn
> into an error mark node and c_safe_arg
On Sat, 14 Oct 2023, Andrew Pinski wrote:
> This is a simple error recovery issue when c_safe_arg_type_equiv_p
> was added in r8-5312-gc65e18d3331aa999. The issue is that after
> an error, an argument type (of a function type) might turn
> into an error mark node and c_safe_arg_type_equiv_p was no
On Sat, 14 Oct 2023, Andrew Pinski wrote:
> When checking to see if we have a function declaration has a conflict due to
> promotations, there is no test to see if the type was an error mark and then
> calls
> c_type_promotes_to. c_type_promotes_to is not ready for error_mark and causes
> an
> I
Juzhe-Zhong writes:
> This patch fixes this following FAILs in RISC-V regression:
>
> FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects scan-tree-dump
> vect "Loop contains only SLP stmts"
> FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only SLP
> stmts"
> FAIL: g
On Sat, 14 Oct 2023, Martin Uecker wrote:
> + if (!initialized
> + && storage_class != csc_static
> + && storage_class != csc_auto
> + && current_scope != file_scope)
I think it would be better to use TREE_PUBLIC (decl) in place of
storage_class != csc_static && stora
On Mon, Oct 16, 2023 at 2:12 PM Patrick Palka wrote:
>
> On Mon, 16 Oct 2023, Ken Matsui wrote:
>
> > On Mon, Oct 16, 2023 at 8:17 AM Patrick Palka wrote:
> > >
> > > On Sun, 15 Oct 2023, Ken Matsui wrote:
> > >
> > > > This patch sorts built-in traits alphabetically for better code
> > > > reada
On Mon, Oct 16, 2023 at 2:06 PM Patrick Palka wrote:
>
> On Mon, 16 Oct 2023, Ken Matsui wrote:
>
> > On Mon, Oct 16, 2023 at 7:55 AM Patrick Palka wrote:
> > >
> > > On Sun, 15 Oct 2023, Ken Matsui wrote:
> > >
> > > > Since RID_MAX soon reaches 255 and all built-in traits are used
> > > > appr
On Mon, 16 Oct 2023, Ken Matsui wrote:
> On Mon, Oct 16, 2023 at 8:17 AM Patrick Palka wrote:
> >
> > On Sun, 15 Oct 2023, Ken Matsui wrote:
> >
> > > This patch sorts built-in traits alphabetically for better code
> > > readability.
> >
> > Hmm, I'm not sure if we still want/need this change wit
Prathamesh Kulkarni writes:
> On Wed, 11 Oct 2023 at 16:57, Prathamesh Kulkarni
> wrote:
>>
>> On Wed, 11 Oct 2023 at 16:42, Prathamesh Kulkarni
>> wrote:
>> >
>> > On Mon, 9 Oct 2023 at 17:05, Richard Sandiford
>> > wrote:
>> > >
>> > > Prathamesh Kulkarni writes:
>> > > > Hi,
>> > > > The at
On Mon, 16 Oct 2023, Ken Matsui wrote:
> On Mon, Oct 16, 2023 at 7:55 AM Patrick Palka wrote:
> >
> > On Sun, 15 Oct 2023, Ken Matsui wrote:
> >
> > > Since RID_MAX soon reaches 255 and all built-in traits are used
> > > approximately
> > > once in a C++ translation unit, this patch removes all
On Mon, Oct 16, 2023 at 11:04 AM Patrick Palka wrote:
>
> On Sun, 15 Oct 2023, Ken Matsui wrote:
>
> > This patch optimizes the performance of the is_object trait by dispatching
> > to
> > the new __is_function and __is_reference built-in traits.
> >
> > libstdc++-v3/ChangeLog:
> > * includ
On Mon, Oct 16, 2023 at 10:16 AM Patrick Palka wrote:
>
> On Sun, 15 Oct 2023, Ken Matsui wrote:
>
> > This patch implements built-in trait for std::is_arithmetic.
> >
> > gcc/cp/ChangeLog:
> >
> > * cp-trait.def: Define __is_arithmetic.
> > * constraint.cc (diagnose_trait_expr): Handl
> + if (live_range && flow_bb_inside_loop_p (loop, e->src))
> + {
Doesn't this match several cases more than before i.e set the range
start to zero fairly often? I mean if it works fine with me and
the code is easier to read.
Please split off the search for the non-contiguo
On Mon, Oct 16, 2023 at 9:36 AM Patrick Palka wrote:
>
> On Sun, 15 Oct 2023, Ken Matsui wrote:
>
> > This patch optimizes the performance of the is_pointer trait by dispatching
> > to
> > the new __is_pointer built-in trait.
> >
> > libstdc++-v3/ChangeLog:
> >
> > * include/bits/cpp_type_t
On Mon, Oct 16, 2023 at 8:17 AM Patrick Palka wrote:
>
> On Sun, 15 Oct 2023, Ken Matsui wrote:
>
> > This patch sorts built-in traits alphabetically for better code
> > readability.
>
> Hmm, I'm not sure if we still want/need this change with this current
> approach. IIUC gperf would sort the tr
This just moves a few functions out of riscv.cc into riscv-string.cc in
an attempt to keep riscv.cc manageable. This was originally Christoph's
code and I'm just pushing it on his behalf.
Full disclosure: I built rv64gc after changing to verify everything
still builds. Given it was just li
On Mon, Oct 16, 2023 at 12:10 PM Uros Bizjak wrote:
>
> On Mon, Oct 16, 2023 at 8:24 PM Fangrui Song wrote:
> >
> > On 2023-10-16, Uros Bizjak wrote:
> > >On Tue, Aug 1, 2023 at 9:51 PM Fangrui Song wrote:
> > >>
> > >> When using -mcmodel=medium, large data objects larger than the
> > >> -mlarg
On Mon, Oct 16, 2023 at 7:55 AM Patrick Palka wrote:
>
> On Sun, 15 Oct 2023, Ken Matsui wrote:
>
> > Since RID_MAX soon reaches 255 and all built-in traits are used
> > approximately
> > once in a C++ translation unit, this patch removes all RID values for
> > built-in
> > traits and uses the i
A bunch of FP tests expecting specific FP asm output fail when built
with zfa because different insns are generated. And this happens
because those tests don't have an explicit -march and the default
used to configure gcc could end up with zfa causing the false fails.
Fix that by adding the -march
On 10/15/23 03:49, Roger Sayle wrote:
Hi Jeff,
Thanks for the speedy review(s).
From: Jeff Law
Sent: 15 October 2023 00:03
To: Roger Sayle ; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in
make_compound_operation.
On 10/14/23 16:14, Roger Sayle w
On 10/15/23 12:16, Vineet Gupta wrote:
A bunch of FP tests expecting specific FP asm output fail when built
with zfa because different insns are generated. And this happens
because those tests don't have an explicit -march and the default
used to configure gcc could end up with zfa causing the
Dear All,
the attached patch fixes a dependency check in frontend optimzation
for nested implied-do IO. The problem appeared for >= 3 loops only
as the check considered dependencies to be only of band form instead
of triangular form.
Regtested on x86_64-pc-linux-gnu. OK for mainline?
As this f
On 10/16/23 12:01, Manolis Tsamis wrote:
This is a new RTL pass that tries to optimize memory offset calculations
by moving them from add immediate instructions to the memory loads/stores.
For example it can transform this:
addi t4,sp,16
add t2,a6,t4
shl t3,t2,1
ld a2,0(t3)
On Mon, Oct 16, 2023 at 8:24 PM Fangrui Song wrote:
>
> On 2023-10-16, Uros Bizjak wrote:
> >On Tue, Aug 1, 2023 at 9:51 PM Fangrui Song wrote:
> >>
> >> When using -mcmodel=medium, large data objects larger than the
> >> -mlarge-data-threshold threshold are placed into large data sections
> >> (
On Mon, Oct 16, 2023 at 08:31:20PM +0200, Harald Anlauf wrote:
>
> Am 16.10.23 um 19:11 schrieb Tobias Burnus:
> > Yesterday, someone was confused because the signal handler did not work.
> >
> > It turned out that the created Fortran procedure used as handler used
> > pass by reference - and 'si
Hi Tobias,
Am 16.10.23 um 19:11 schrieb Tobias Burnus:
Yesterday, someone was confused because the signal handler did not work.
It turned out that the created Fortran procedure used as handler used
pass by reference - and 'signal' passed the it by value.
This patch adds the 'passed by value' t
On 2023-10-16, Uros Bizjak wrote:
On Tue, Aug 1, 2023 at 9:51 PM Fangrui Song wrote:
When using -mcmodel=medium, large data objects larger than the
-mlarge-data-threshold threshold are placed into large data sections
(.lrodata, .ldata, .lbss and some variants). GNU ld and ld.lld 17 place
.l*
When using -mcmodel=medium, large data objects larger than the
-mlarge-data-threshold threshold are placed into large data sections
(.lrodata, .ldata, .lbss and some variants). GNU ld and ld.lld 17 place
.l* sections into separate output sections. If small and medium code
model object files are m
This version has been bootstrapped and tested to cause no regressions
in both x86 and Aarch64.
Manolis
On Mon, Oct 16, 2023 at 9:01 PM Manolis Tsamis wrote:
>
> This is a new RTL pass that tries to optimize memory offset calculations
> by moving them from add immediate instructions to the memory
On Tue, Oct 10, 2023 at 5:15 PM Jeff Law wrote:
>
>
>
> On 10/10/23 05:59, Manolis Tsamis wrote:
>
> >> It's a code quality issue as long as we don't transform the code into
> >> movl $0, -18874240, at which point it would become a correctness issue.
> >>
> > Ok, thanks for pointing that out as I
On Sun, 15 Oct 2023, Ken Matsui wrote:
> This patch optimizes the performance of the is_object trait by dispatching to
> the new __is_function and __is_reference built-in traits.
>
> libstdc++-v3/ChangeLog:
> * include/std/type_traits (is_object): Use __is_function and
> __is_referenc
This is a new RTL pass that tries to optimize memory offset calculations
by moving them from add immediate instructions to the memory loads/stores.
For example it can transform this:
addi t4,sp,16
add t2,a6,t4
shl t3,t2,1
ld a2,0(t3)
addi a2,1
sd a2,8(t2)
into the following (one
Hi,
This patch merges the D front-end and run-time library with upstream dmd
4c18eed967, and standard library with phobos d945686a4.
Synchronizing with the upstream development branch as of 2023-10-16.
D front-end changes:
- Import latest fixes to mainline.
D runtime changes:
On 10/15/23 02:12, Roger Sayle wrote:
This patch adds a pre-reload splitter to arc.md, to use the bset (set
specific bit instruction) to implement 1
On Sun, 15 Oct 2023, Ken Matsui wrote:
> This patch implements built-in trait for std::is_arithmetic.
>
> gcc/cp/ChangeLog:
>
> * cp-trait.def: Define __is_arithmetic.
> * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_ARITHMETIC.
> * semantics.cc (trait_expr_value): Likew
On Tue, Aug 1, 2023 at 9:51 PM Fangrui Song wrote:
>
> When using -mcmodel=medium, large data objects larger than the
> -mlarge-data-threshold threshold are placed into large data sections
> (.lrodata, .ldata, .lbss and some variants). GNU ld and ld.lld 17 place
> .l* sections into separate outpu
Yesterday, someone was confused because the signal handler did not work.
It turned out that the created Fortran procedure used as handler used
pass by reference - and 'signal' passed the it by value.
This patch adds the 'passed by value' to the wording:
"@var{HANDLER} to be executed with a sing
On Sun, 15 Oct 2023, Ken Matsui wrote:
> This patch optimizes the performance of the is_pointer trait by dispatching to
> the new __is_pointer built-in trait.
>
> libstdc++-v3/ChangeLog:
>
> * include/bits/cpp_type_traits.h (__is_pointer): Use __is_pointer
> built-in trait.
> *
On Sun, 15 Oct 2023, Ken Matsui wrote:
> This patch sorts built-in traits alphabetically for better code
> readability.
Hmm, I'm not sure if we still want/need this change with this current
approach. IIUC gperf would sort the trait names when generating the
hash table code, and so we wanted a mo
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
I want to distinguish between constraint && and fold-expressions there of
written by the user and those implied by template parameter
type-constraints; to that end, let's improve our EXPR_LOCATION for an
explicit fold-expression.
The fold3.
Hey,
Just a minor update to the patch, I had missed the libgomp testsuite, so
had to make some adjustments there too.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (lane_size): New function.
(aarch64_simd_clone_compute_vecsize_and_simdlen): Determine
simdlen according to NDS rul
Ping?
Best,
Arthur
On 9/8/23 16:59, Arthur Cohen wrote:
From: Raiki Tamura
Fixed to include the enum's name which I had forgotten to commit.
Thanks
This commit adds a new function intended for checking the XID properties
of a possibly unicode character, as well as the accompanying en
On Sun, 15 Oct 2023, Ken Matsui wrote:
> This patch accepts the use of built-in trait identifiers when they are
> actually not used as traits. Specifically, we check if the subsequent token
> is '(' for ordinary built-in traits or is '<' only for the special
> __type_pack_element built-in trait.
Hi Ramana,
> I remember this to be the previous discussions and common understanding.
>
> https://gcc.gnu.org/legacy-ml/gcc/2016-06/msg00017.html
>
> and here
>
> https://gcc.gnu.org/legacy-ml/gcc-patches/2017-02/msg00168.html
>
> Can you point any discussion recently that shows this has changed
On Sun, 15 Oct 2023, Ken Matsui wrote:
> Since RID_MAX soon reaches 255 and all built-in traits are used approximately
> once in a C++ translation unit, this patch removes all RID values for built-in
> traits and uses the identifier node to look up the specific trait. Rather
> than holding traits
On 12 October 2023 14:35:36 CEST, Ajit Agarwal wrote:
>This patch improves code sinking pass to sink statements before call to reduce
>register pressure.
>Review comments are incorporated.
Typo: "block block"
And spurious whitespace changes.
>> So we're inserting a dummy vect_perm element (that's live from the start?).
>> Would it make sense to instead increase the number of needed registers for
>> a load/store and handle this similarly to compute_nregs_for_mode?
>> Maybe also do it directly in compute_local_live_ranges and extend live
Consider this following case:
int
bar (int *x, int a, int b, int n)
{
x = __builtin_assume_aligned (x, __BIGGEST_ALIGNMENT__);
int sum1 = 0;
int sum2 = 0;
for (int i = 0; i < n; ++i)
{
sum1 += x[2*i] - a;
sum1 += x[2*i+1] * b;
sum2 += x[2*i] - b;
sum2 += x[2*i+1]
The description of the second Value function (returning Duration) (ARM
9.6.1(87)
doesn't place any limitation on the Elapsed_Time parameter's value, beyond
"Constraint_Error is raised if the string is not formatted as described for
Image, or
the function cannot interpret the given string as a
On 10/15/23 02:14, Roger Sayle wrote:
I’ve done it again. ENOPATCH.
*From:*Roger Sayle
*Sent:* 15 October 2023 09:13
*To:* 'gcc-patches@gcc.gnu.org'
*Cc:* 'Claudiu Zissulescu'
*Subject:* [ARC PATCH] Split asl dst,1,src into bset dst,0,src to
implement 1<
This patch adds a pre-reload spli
ping
__sync_val_compare_and_swap may be used on 128-bit types and either calls the
outline atomic code or uses an inline loop. On AArch64 LDXP is only atomic if
the value is stored successfully using STXP, but the current implementations
do not perform the store if the comparison fails. In thi
ping
From: Wilco Dijkstra
Sent: 04 August 2023 16:05
To: GCC Patches ; Richard Sandiford
Cc: Kyrylo Tkachov
Subject: [PATCH] libatomic: Improve ifunc selection on AArch64
Add support for ifunc selection based on CPUID register. Neoverse N1 supports
atomic 128-bit load/store, so use the
ping
From: Wilco Dijkstra
Sent: 02 June 2023 18:28
To: GCC Patches
Cc: Richard Sandiford ; Kyrylo Tkachov
Subject: [PATCH] libatomic: Enable lock-free 128-bit atomics on AArch64
[PR110061]
Enable lock-free 128-bit atomics on AArch64. This is backwards compatible with
existing binaries,
ping
v2: Use UINTVAL, rename max_mops_size.
The cpymemdi/setmemdi implementation doesn't fully support strict alignment.
Block the expansion if the alignment is less than 16 with STRICT_ALIGNMENT.
Clean up the condition when to use MOPS.
Passes regress/bootstrap, OK for commit?
gcc/Cha
Hi Juzhe,
> +/* Get STORE value. */
> +static tree
> +get_store_value (gimple *stmt)
> +{
> + if (is_gimple_call (stmt) && gimple_call_internal_p (stmt))
> +{
> + if (gimple_call_internal_fn (stmt) == IFN_MASK_STORE)
> + return gimple_call_arg (stmt, 3);
> + else
> + gcc_un
v2: further cleanups, improved comments
Add support for inline memmove expansions. The generated code is identical
as for memcpy, except that all loads are emitted before stores rather than
being interleaved. The maximum size is 256 bytes which requires at most 16
registers.
Passes regress/boot
Hi Roger,
Indeed, I was missing the patch file.
Approved.
Thank you for your contribution,
Claudiu
On Sun, Oct 15, 2023 at 11:14 AM Roger Sayle wrote:
>
> I’ve done it again. ENOPATCH.
>
>
>
> From: Roger Sayle
> Sent: 15 October 2023 09:13
> To: 'gcc-patches@gcc.gnu.org'
> Cc: 'Claudiu Zis
V2: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/633120.html
with some bug fix.
juzhe.zh...@rivai.ai
From: Juzhe-Zhong
Date: 2023-10-16 11:57
To: gcc-patches
CC: kito.cheng; kito.cheng; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH] RISC-V: Fix unexpected big LMUL choosing in d
Consider this following case:
int
bar (int *x, int a, int b, int n)
{
x = __builtin_assume_aligned (x, __BIGGEST_ALIGNMENT__);
int sum1 = 0;
int sum2 = 0;
for (int i = 0; i < n; ++i)
{
sum1 += x[2*i] - a;
sum1 += x[2*i+1] * b;
sum2 += x[2*i] - b;
sum2 += x[2*i+1]
On 10/16/23 13:20, Stefan Schulze Frielinghaus wrote:
> The normal form of a CONST_INT which represents an integer of a mode
> with fewer bits than in HOST_WIDE_INT is sign extended. This even holds
> for unsigned integers.
>
> This fixes an ICE during cse1 where we bail out at rtl.h:2297 since
>
The normal form of a CONST_INT which represents an integer of a mode
with fewer bits than in HOST_WIDE_INT is sign extended. This even holds
for unsigned integers.
This fixes an ICE during cse1 where we bail out at rtl.h:2297 since
INTVAL (x.first) == sext_hwi (INTVAL (x.first), precision) does n
The following addresses build_reconstructed_reference failing to
build references with a different offset than the models and thus
the caller conditional being off. This manifests when attempting
to build a ref with offset 160 from the model BIT_FIELD_REF
onto the same base l_4827 but the models
Robin Dapp writes:
> Hi,
>
> the attached v2 includes Tamar's suggestion of keeping the current
> stdout behavior. When no output files are passed (via -O) the output
> is written to stdout as before.
>
> Tamar also mentioned off-list that, similar to match.pd, it might make
> sense to balance
Hi,
the attached v2 includes Tamar's suggestion of keeping the current
stdout behavior. When no output files are passed (via -O) the output
is written to stdout as before.
Tamar also mentioned off-list that, similar to match.pd, it might make
sense to balance the partitions in a better way than
On Mon, Oct 16, 2023 at 4:34 AM Andrew Pinski wrote:
>
> Currently we able to simplify `~a CMP ~b` to `b CMP a` but we should allow a
> nop
> conversion in between the `~` and the `a` which can show up. A similarly
> thing should
> be done for `~a CMP CST`.
>
> I had originally submitted the `~a
On Mon, Oct 16, 2023 at 2:02 AM Andrew Pinski wrote:
>
> In the case of a NOP conversion (precisions of the 2 types are equal),
> factoring out the conversion can be done even if int_fits_type_p returns
> false and even when the conversion is defined by a statement inside the
> conditional. Since
As from commit 9df1ba9a35b8 ("libbacktrace: support zstd decompression")
GCC for the `vax-netbsdelf' target fails to complete building, with an
ICE:
during RTL pass: final
.../libbacktrace/elf.c: In function 'elf_zstd_decompress':
.../libbacktrace/elf.c:5006:1: internal compiler error: in
print
Thanks Robin.
Committed.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-10-16 17:12
To: Juzhe-Zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Use VLS modes if the NITERS is known and smaller
than VLS mode elements.
Hi Juzhe,
this LGTM.
While mkoffload ensures that there is always a -march=, nvptx's
cc1 can also be run directly.
In my case, I wanted to know which target-specific #define are
available; hence, I did run:
accel/nvptx-none/cc1 -E -dM < /dev/null
which gave an ICE. After some debugging, the reasons was
clear (missi
On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote:
>
>
> > On Oct 16, 2023, at 17:55, Richard Biener wrote:
> >
> > On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote:
> >
> >>
> >>
> >>> On Oct 16, 2023, at 17:39, Richard Biener wrote:
> >>>
> >>> On Mon, 16 Oct 2023, Tatsuyuki Ishi wrote:
> >>>
>
Hi Juzhe,
this LGTM. I was first concerned whether we would want to
stop e.g. at LMUL = 1 and only continue with a specific flag but
actually this should be done via the costs. If an implementation
wants to penalize or incentivize some behavior it can always
adjust the costs which should be suff
On Mon, Oct 16, 2023 at 12:00 AM Andrew Pinski wrote:
>
> This improves the `A CMP 0 ? A : -A` set of match patterns to use
> bitwise_equal_p which allows an nop cast between signed and unsigned.
> This allows catching a few extra cases which were not being caught before.
>
> OK? Bootstrapped and
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