[RFC] RISC-V: Support risc-v bfloat16 This patch support bfloat16 in riscv like x86_64 and arm.

hi, Are there any new developments about Zfb? Are there any plans to implement the Zvfbfmin and Zvfbfwma expansion? I see that Zfb is being reviewed in llvm, maybe we should do the same on gcc. Ref: https://reviews.llvm.org/D151313 https://reviews.llvm.org/D150929

Re: Re: [PATCH 1/1] [V2] [RISC-V] support cm.push cm.pop cm.popret in zcmp

On 2023-05-31 18:13  Kito Cheng wrote: > >> >[1] >> >https://patchwork.sourceware.org/project/gcc/patch/20230406062118.47431-5-jia...@iscas.ac.cn/ >> Thanks for your review. >> >> The md file looks verbose with bunch of *_offset_operand and >> stack_push_up_to_*_operand, but it significantly >>

Re: PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.

On Thu, 1 Jun 2023 10:53:02 +0530 Ajit Agarwal via Gcc-patches wrote: > Hello All: > > This new version of patch 4 use improve ree pass for rs6000 target using > defined ABI interfaces. > Bootstrapped and regtested on power64-linux-gnu. > > Review comments incorporated. Not a review: /scratc

[PATCH 2/3 v3] xtensa: Add 'adddi3' and 'subdi3' insn patterns

On 2023/05/31 15:02, Max Filippov wrote: Hi! > On Tue, May 30, 2023 at 2:50 AM Takayuki 'January June' Suwa > wrote: >> >> Resubmitting the correct one due to a mistake in merging order of fixes. >> --- >> More optimized than the default RTL generation. >> >> gcc/ChangeLog: >> >> * config

Re: [PATCH] Optimized "(X - N * M) / N + M" to "X / N" if valid

Hi, Jiufu Guo via Gcc-patches writes: > Hi, > > Richard Biener writes: > >> On Wed, 17 May 2023, Jiufu Guo wrote: >> >>> Hi, >>> >>> This patch tries to optimize "(X - N * M) / N + M" to "X / N". >> >> But if that's valid why not make the transform simpler and transform >> (X - N * M) / N to

Re: [PATCH V3] VECT: Change flow of decrement IV

Hi, on 2023/6/1 13:00, juzhe.zh...@rivai.ai wrote: > This patch is no difference from V2. I support this patch based on the testing and SPEC2017 evaluation results on Power (see my comments on patch v2). > Just add PR tree-optimization/109971 as Kewen's suggested. Thanks for adding that, I was

PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces.

Hello All: This new version of patch 4 use improve ree pass for rs6000 target using defined ABI interfaces. Bootstrapped and regtested on power64-linux-gnu. Review comments incorporated. Thanks & Regards Ajit Improve ree pass for rs6000 target using defined abi interfaces For rs6000 target we

Re: [PATCH V3] VECT: Change flow of decrement IV

This patch is no difference from V2. Just add PR tree-optimization/109971 as Kewen's suggested. Already bootstrapped and Regression on X86 no difference. Ok for trunk ? juzhe.zh...@rivai.ai From: juzhe.zhong Date: 2023-06-01 12:36 To: gcc-patches CC: richard.sandiford; rguenther; linkw; Ju-Zh

Re: Re: [PATCH V2] VECT: Change flow of decrement IV

Thanks kewen. I have send V3 patch. Could you comment that ? I want to make sure you do support that patch. Thanks. juzhe.zh...@rivai.ai From: Kewen.Lin Date: 2023-06-01 12:32 To: juzhe.zh...@rivai.ai CC: richard.sandiford; rguenther; gcc-patches Subject: Re: [PATCH V2] VECT: Change flow of de

[PATCH V3] VECT: Change flow of decrement IV

From: Ju-Zhe Zhong Follow Richi's suggestion, I change current decrement IV flow from: do { remain -= MIN (vf, remain); } while (remain != 0); into: do { old_remain = remain; len = MIN (vf, remain); remain -= vf; } while (old_remain >= vf); to enhance SCEV. Include fixes from kew

Re: [PATCH V2] VECT: Change flow of decrement IV

Hi Juzhe, on 2023/6/1 08:31, juzhe.zh...@rivai.ai wrote: > Bootstrapped and Regression on X86 no surprise different. > > Looking forward Kewen's test report for this patch. > This patch can be bootstrapped and regress-tested on powerpc64-linux-gnu P9 and powerpc64le-linux-gnu P9/P10. Also SPEC

[PATCH v5] MIPS: Add speculation_barrier support

speculation_barrier for MIPS needs sync+jr.hb (r2+), so we implement __speculation_barrier in libgcc, like arm32 does. gcc/ChangeLog: * config/mips/mips-protos.h (mips_emit_speculation_barrier): New prototype. * config/mips/mips.cc (speculation_barrier_libfunc): New static

Re: Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

> From: Jonathan Wakely > Date: Wed, 31 May 2023 21:06:16 +0100 > On Wed, 31 May 2023 at 16:32, Jonathan Wakely wrote: > > On Wed, 31 May 2023 at 16:29, Hans-Peter Nilsson via Libstdc++ < > > libstd...@gcc.gnu.org> wrote: > > > >> Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I > >>

[r14-1452 Regression] FAIL: g++.dg/pr104547.C -std=gnu++17 scan-tree-dump-not vrp2 "_M_default_append" on Linux/x86_64

On Linux/x86_64, fb409a15d9babc78fe1d9957afcbaf1102cce58f is the first bad commit commit fb409a15d9babc78fe1d9957afcbaf1102cce58f Author: Jonathan Wakely Date: Thu May 25 09:57:46 2023 +0100 libstdc++: Express std::vector's size() <= capacity() invariant in code caused FAIL: g++.dg/pr104

[PATCH] RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering optimization

From: Juzhe-Zhong 1. This patch optimize the codegen of the following auto-vectorization codes: void foo (int32_t * __restrict a, int64_t * __restrict b, int64_t * __restrict c, int n) { for (int i = 0; i < n; i++) c[i] = (int64_t)a[i] + b[i]; } Combine instruction from: ... vsext.v

[PATCH] doc: improve docs for -pedantic{,-errors}

Tested by looking at the makeinfo output. OK for trunk? -- 8< -- Recent discussion of -Wimplicit led me to want to clarify this section of the documentation, and mark which diagnostics other than -Wpedantic are affected by -pedantic-errors. gcc/ChangeLog: * doc/invoke.texi (-Wpedantic)

[pushed] c++: make -fpermissive avoid -Werror=narrowing

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- Currently we make -Wnarrowing an error by default by forcing pedantic_errors on, but for consistency -fpermissive should prevent that. In general I'm inclined to move away from using permerror in favor of this kind of model, with specific f

[PATCH] libstdc++: optimize EH phase 2

Tested x86_64-pc-linux-gnu, OK for trunk? -- 8< -- In the ABI's two-phase EH model, first we walk the stack looking for a handler, then we walk the stack running cleanups until we reach that handler. In the cleanup phase, we shouldn't redundantly check the handlers along the way, e.g. when walki

[PATCH V2] RISC-V: Support RVV permutation auto-vectorization

From: Juzhe-Zhong This patch supports vector permutation for VLS only by vec_perm pattern. We will support TARGET_VECTORIZE_VEC_PERM_CONST to support VLA permutation in the future. Fixed following comments from Robin. Ok for trunk? gcc/ChangeLog: * config/riscv/autovec.md (vec_perm): N

Re: [PATCH V2] VECT: Change flow of decrement IV

Bootstrapped and Regression on X86 no surprise different. Looking forward Kewen's test report for this patch. Thanks. juzhe.zh...@rivai.ai From: juzhe.zhong Date: 2023-05-31 23:08 To: gcc-patches CC: richard.sandiford; rguenther; linkw; Ju-Zhe Zhong Subject: [PATCH V2] VECT: Change flow of de

RE: [PATCH] RISC-V: Add RVV FRM enum for floating-point rounding mode intriniscs

Committed as the doc updated, thanks Jeff. Pan -Original Message- From: Jeff Law Sent: Tuesday, May 30, 2023 1:03 AM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp@gmail.com; Li, Pan2

Re: [PATCH v4] tree-ssa-sink: Improve code sinking pass

This is not a review of the patch itself, but... On 5/31/23 2:01 AM, Ajit Agarwal wrote: > tree-ssa-sink: Improve code sinking pass > > Code Sinking sinks the blocks after call.This increases register pressure > for callee-saved registers. Improves code sinking before call in the use > blocks or

Re: [PATCH] Fix PR 110042: ifcvt regression due to paradoxical subregs

On Wed, May 31, 2023 at 12:29 AM Richard Biener via Gcc-patches wrote: > > On Wed, May 31, 2023 at 6:34 AM Andrew Pinski via Gcc-patches > wrote: > > > > After r14-1014-gc5df248509b489364c573e8, GCC started to emit > > directly a zero_extract for `(t1&0x8)!=0`. This introduced > > a small regress

[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]

Tested x86_64-linux. Pushed to trunk. -- >8 -- This should make it possible to use openlibm with djgpp (and other targets with missing C99 functions). The from openlibm provides all the functions, but not the float_t and double_t typedefs. By separating the autoconf checks for the functionsand

[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in

Tested x86_64-linux. Pushed to trunk. -- >8 -- Similar to the three commits r14-908, r14-909 and r14-910, the _GLIBCXX_USE_C99_MATH_TR1 macro is misleading when it is also used for , not only for headers. It is also wrong, because the configure checks for TR1 use -std=c++98 and a target might de

[committed] libstdc++: Express std::vector's size() <= capacity() invariant in code

Tested x86_64-linux. Pushed to trunk. -- >8 -- This adds optimizer hints so that GCC knows that size() <= capacity() is always true. This allows the compiler to optimize away re-allocating paths when assigning new values to the vector without resizing it, e.g., vec.assign(vec.size(), new_val). l

Re: Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

On Wed, 31 May 2023 at 16:32, Jonathan Wakely wrote: > > > On Wed, 31 May 2023 at 16:29, Hans-Peter Nilsson via Libstdc++ < > libstd...@gcc.gnu.org> wrote: > >> Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I >> thought I'd better notify the author (I have written authors >> if there

[committed] libstdc++: Fix build for targets without _Float128 [PR109921]

Tested x86_64-linux. Built msp430-elf and cris-elf. Pushed to trunk. -- >8 -- My r14-1431-g7037e7b6e4ac41 change caused the _Float128 overload to be compiled unconditionally, by moving the USE_STRTOF128_FOR_FROM_CHARS check into the function body. That function should still only be compiled if th

[committed] libstdc++: Fix configure test for 32-bit targets

Tested x86_64-linux. Built msp430-elf and cris-elf. Pushed to trunk. -- >8 -- The -mlarge model for msp430-elf uses 20-bit pointers, which means that sizeof(void*) == 4 and so the r14-1432-g51cf0b3949b88b change gives the wrong answer. Check __INTPTR_WIDTH__ >= 32 instead. libstdc++-v3/ChangeLog

Re: [PATCH] RISC-V: Support RVV permutation auto-vectorization

Hi Juzhe, thanks looks pretty comprehensive already. > +(define_expand "vec_perm" > + [(match_operand:V 0 "register_operand") > + (match_operand:V 1 "register_operand") > + (match_operand:V 2 "register_operand") > + (match_operand: 3 "vector_perm_operand")] > + "TARGET_VECTOR && GET_MODE_

Re: [PATCH] jump: Change return type of predicate functions from int to bool

On Wed, 31 May 2023 09:40:24 +0200 Uros Bizjak via Gcc-patches wrote: > On Wed, May 31, 2023 at 9:17 AM Richard Biener > wrote: > > Do we have a diagnostic that would point out places we > > assign the bool result to an integer variable? Do we want > > to change those places as well (did you i

[Patch] OpenMP/Fortran: Permit pure directives inside PURE

I intent to commit the attached patch soon. However, I want to give anyone the chance to comment on any aspect before committing. Comments after the commit are welcome as well :-) OpenMP 5.2 now uses properties to clauses and "pure" is among those properties. Note that pure-2.f90 contains also

Re: [PATCH v4] tree-ssa-sink: Improve code sinking pass

Hi! On Wed, 31 May 2023 12:31:35 +0530 Ajit Agarwal via Gcc-patches wrote: > Hello All: > > This patch improves code sinking pass to sink statements before call to reduce > register pressure. > Review comments are incorporated. > > For example : > > void bar(); > int j; > void foo(int a, int

Re: [PATCH] PR52665 do not let .ident confuse assembler scan tests

On Wed, 5 Sep 2018 17:32:04 +0200 Bernhard Reutner-Fischer wrote: > On Tue, 21 Jun 2016 at 00:19, Jeff Law wrote: > > > > On 06/18/2016 01:31 PM, Bernhard Reutner-Fischer wrote: > > > gcc/testsuite/ChangeLog > > > > > > 2016-06-18 Bernhard Reutner-Fischer > > > > > > PR testsuite/526

Re: [PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

On 5/31/23 11:13, Iain Sandoe wrote: I do have a multilib problem [with libgomp] on Darwin (which has been noticed :https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109951) but it is not obvious how the fix proposed would solve this - unless it’s some subtle change in global content for the mult

Re: [PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

On 5/31/23 10:57, Jeff Law wrote: On 5/31/23 10:25, Vineet Gupta wrote: Multilib testing on trunk is currently busted (and surprisingly this affects any/all targets but it seems nobody cares). We currently get the following splat: I wouldn't say that nobody cares, it just hasn't bubbled up

Re: [PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

> On 31 May 2023, at 18:57, Jeff Law via Gcc-patches > wrote: > > > > On 5/31/23 10:25, Vineet Gupta wrote: >> Multilib testing on trunk is currently busted (and surprisingly this >> affects any/all targets but it seems nobody cares). We currently get the >> following splat: > I wouldn't sa

[PATCH 0/3] Add diagram support to gcc diagnostics

Existing diagnostic text output in GCC has to be implemented by writing sequentially to a pretty_printer instance. This makes it hard to implement some kinds of diagnostic output (see e.g. diagnostic-show-locus.cc, which is reaching the limits of maintainability). I've posted various experimental

[PATCH 1/3] testsuite: move handle-multiline-outputs to before check for blank lines

I have followup patches that require checking for multiline patterns that have blank lines within them, so this moves the handling of multiline patterns before the check for blank lines, allowing for such multiline patterns. Doing so uncovers some issues with existing multiline directives, which t

Re: [PATCH] rs6000: Fix __builtin_vec_xst_trunc definition

On 5/22/23 4:04 AM, Kewen.Lin wrote: > on 2023/5/11 02:06, Carl Love via Gcc-patches wrote: >> @@ -3161,12 +3161,15 @@ >>void __builtin_altivec_tr_stxvrbx (vsq, signed long, signed char *); >> TR_STXVRBX vsx_stxvrbx {stvec} >> >> - void __builtin_altivec_tr_stxvrhx (vsq, signed long, si

Re: [PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

On 5/31/23 10:25, Vineet Gupta wrote: Multilib testing on trunk is currently busted (and surprisingly this affects any/all targets but it seems nobody cares). We currently get the following splat: I wouldn't say that nobody cares, it just hasn't bubbled up on anyone's priority list yet (most

Re: [PATCH] Move std::search into algobase.h

On Wed, 31 May 2023 at 18:39, François Dumont via Libstdc++ < libstd...@gcc.gnu.org> wrote: > libstdc++: Reduce inclusion to > > > Move the std::search definition from stl_algo.h to stl_algobase.h and use > the later in . > > For consistency also move std::__parallel::search and associated helpe

[PATCH] Move std::search into algobase.h

libstdc++: Reduce inclusion to Move the std::search definition from stl_algo.h to stl_algobase.h and use the later in . For consistency also move std::__parallel::search and associated helpers from to so that std::__parallel::search is accessible along with std::search. libstdc++-v3/Cha

Re: [PATCH] libgcc: Use initarray section type for .init_stack

On Wed, May 31, 2023 at 12:41 AM Kewen.Lin via Gcc-patches wrote: > > >> libgcc/ChangeLog: > >> > >> * config/i386/morestack.S: Use @init_array rather than > >> @progbits for section type of section .init_array. > >> * config/rs6000/morestack.S: Likewise. > >> * config/s390/mor

[PATCH][committed] aarch64: PR target/99195 Annotate dot-product patterns for vec-concat-zero

Hi all, This straightforward patch annotates the dotproduct instructions, including the i8mm ones. Tests included. Nothing unexpected here. Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf. Pushing to trunk. Thanks, Kyrill gcc/ChangeLog: PR target/99195

[PATCH][committed] aarch64: PR target/99195 Annotate saturating mult patterns for vec-concat-zero

Hi all, This patch goes through the various alphabet soup saturating multiplication patterns, including those in TARGET_RDMA and annotates them with . Many other patterns are widening and always write the full 128-bit vectors so this annotation doesn't apply to them. Nothing out of the ordinary

Re: [PATCH] RISC-V: Add missing torture-init and torture-finish for rvv.exp

On 5/30/23 11:43, Vineet Gupta wrote: On 5/26/23 16:38, Vineet Gupta wrote: On 5/25/23 13:26, Thomas Schwinge wrote: I'm pasting a snippet of gcc.log. Issue is indeed triggered by rvv.exp which needs some love. I'd intentionally asked to "see a complete 'gcc.log' file where the ERRORs are

[PATCH 3/3] testsuite: print any leaking torture options for debugging

This was helpful when debugging the recent multilib testsuite failure. gcc/testsuite: * lib/torture-options.exp: print the value of non-empty options: torture_without_loops, torture_with_loops, LTO_TORTURE_OPTIONS. Signed-off-by: Vineet Gupta --- gcc/testsuite/lib/torture-option

[PATCH 2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp

From: Kito Cheng This is in line with recent test harness expectations and is a preventive change as it doesn't actually fix any errors. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Add torture-init and torture-finish. Signed-off-by: Vineet Gupta --- gcc/testsuite

[PATCH 1/3] testsuite: Unbork multilib testing on RISC-V (and any target really)

Multilib testing on trunk is currently busted (and surprisingly this affects any/all targets but it seems nobody cares). We currently get the following splat: | ERROR: tcl error code NONE | ERROR: torture-init: torture_without_loops is not empty as expected And this takes down pretty much all of

[PATCH 0/3] Unbork testsuite for multlib setups

Hi, This fixes the current broken multilib testing on trunk. 1/3 is th actual fix 2/3 is preventive and 3/3 is debug aid in case this bites someone else in future. Thx, -Vineet Kito Cheng (1): RISC-V: Add missing torture-init and torture-finish for rvv.exp Vineet Gupta (2): testsuite: Unbor

Re: [PATCH 1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS

Hello, On Wed, May 31 2023, Richard Biener wrote: > On Tue, May 30, 2023 at 4:21 PM Jan Hubicka wrote: >> >> > On Mon, May 29, 2023 at 6:20 PM Martin Jambor wrote: >> > > >> > > Hi, >> > > >> > > there have been concerns that linear searches through DECL_ARGUMENTS >> > > that are often necessary

Re: [PATCH v2] rs6000: Add buildin for mffscrn instructions

Kewen: On Wed, 2023-05-31 at 17:11 +0800, Kewen.Lin wrote: > > So, there is no need for the builtin to have to determine if the > > user > > is storing the result of the __builtin_set_fpscr_rn. The RN bits > > will > > always be updated by the __builtin_set_fpscr_rn builtin and the > > existing f

Re: Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

On Wed, 31 May 2023 at 16:29, Hans-Peter Nilsson via Libstdc++ < libstd...@gcc.gnu.org> wrote: > Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I > thought I'd better notify the author (I have written authors > if there was more than one ;-) of suspect commits in the > range r14-1425-g

Re: [PATCH V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

On 5/31/23 09:08, shiyul...@iscas.ac.cn wrote: From: yulong I find fail of the xtheadcondmov-indirect-rv64.c test case and provide a way to solve it. In this patch, I take Kito's advice that I modify the form of the function bodies.It likes *[a-x0-9]. gcc/testsuite/ChangeLog: *

Build-break in libstdc++-v3 at r14-1442-ge1240bda3e0bb1 for non-float128 targets

Since I don't see a quick fix at r14-1444-g3f4853a5f00fab, I thought I'd better notify the author (I have written authors if there was more than one ;-) of suspect commits in the range r14-1425-g80ee7d02e8db48..e1240bda3e0b for the build-break at r14-1442-ge1240bda3e0bb1 for cris-elf, where I get:

[PATCH] reload_cse_move2add: Handle trivial single_set:s

Tested cris-elf, bootstrapped & checked native x86_64-pc-linux-gnu for good measure. Ok to commit? If it wasn't for there already being an auto_inc_dec pass, this looks like a good place to put it, considering the framework data. (BTW, current auto-inc-dec generation is so poor that you can repl

[PATCH V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c

From: yulong I find fail of the xtheadcondmov-indirect-rv64.c test case and provide a way to solve it. In this patch, I take Kito's advice that I modify the form of the function bodies.It likes *[a-x0-9]. gcc/testsuite/ChangeLog: * gcc.target/riscv/xtheadcondmov-indirect-rv32.c:Modify

[PATCH V2] VECT: Change flow of decrement IV

From: Ju-Zhe Zhong Follow Richi's suggestion, I change current decrement IV flow from: do { remain -= MIN (vf, remain); } while (remain != 0); into: do { old_remain = remain; len = MIN (vf, remain); remain -= vf; } while (old_remain >= vf); to enhance SCEV. Include fixes from kew

Re: [committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

On Wed, May 31, 2023 at 03:04:03PM +0100, Jonathan Wakely via Gcc-patches wrote: > On Wed, 31 May 2023 at 13:23, Jonathan Wakely via Libstdc++ < > libstd...@gcc.gnu.org> wrote: > > > Tested powerpc64le-linux. Pushed to trunk. > > > > -- >8 -- > > > > As suggested by Jakub in the PR, this just hard

RE: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

Committed with that change, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of ??? Sent: Wednesday, May 31, 2023 9:24 PM To: Jeff Law ; rdapp.gcc ; gcc-patches Cc: kito.cheng ; kito.cheng ; palmer ; palmer Subject: Re: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmuls

Re: [committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

On Wed, 31 May 2023 at 13:23, Jonathan Wakely via Libstdc++ < libstd...@gcc.gnu.org> wrote: > Tested powerpc64le-linux. Pushed to trunk. > > -- >8 -- > > As suggested by Jakub in the PR, this just hardcodes the constants with > a Q suffix, since the properties of __float128 are not going to change

Re: [PATCH 1/2] Implementation of new RISCV optimizations pass: fold-mem-offsets.

On 5/31/23 06:19, Manolis Tsamis wrote: On Tue, May 30, 2023 at 2:30 AM Jeff Law wrote: On 5/25/23 08:02, Manolis Tsamis wrote: On Thu, May 25, 2023 at 4:53 PM Richard Biener via Gcc-patches wrote: On Thu, May 25, 2023 at 3:32 PM Jeff Law via Gcc-patches wrote: On 5/25/23 07:01,

RE: [PATCH] RISC-V: Add testcase for vrsub.vi auto-vectorization

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:07 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

RE: [PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:03 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

On 5/31/23 07:23, 钟居哲 wrote: I have sent V2 withing adding commen: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620243.html Could you take a look at it? I'd probably remove "PASS" from that comment. I don't think you nee

RE: [PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:01 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

RE: [PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Wednesday, May 31, 2023 9:02 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp

Re: ping^^: [PATCH] rs6000: Enable const_anchor for 'addi'

On Tue, May 30, 2023 at 11:00 PM Jiufu Guo wrote: > > Gentle ping... > > Jiufu Guo via Gcc-patches writes: > > > Gentle ping... > > > > Jiufu Guo via Gcc-patches writes: > > > >> Hi, > >> > >> I'm thinking that we may enable this patch for stage1, so ping it. > >> https://gcc.gnu.org/pipermail/

Re: Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

I have sent V2 withing adding commen: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620243.html Could you take a look at it? juzhe.zh...@rivai.ai From: Jeff Law Date: 2023-05-31 20:58 To: Robin Dapp; juzhe.zhong; gcc-patches CC: kito.cheng; kito.cheng; palmer; palmer Subject: Re: [PATCH

[PATCH V2] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

From: Juzhe-Zhong Base on V1 patch, adding comment: ;; Use define_insn_and_split to define vsext.vf2/vzext.vf2 will help combine PASS ;; to combine instructions as below: ;; vsext.vf2 + vsext.vf2 + vadd.vv ==> vwadd.vv gcc/ChangeLog: * config/riscv/autovec.md (2): Change expand into

Re: [PATCH v2] aarch64: Add pattern for bswap + rotate [PR 110039]

Christophe Lyon writes: > After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a > pattern to match the new GIMPLE form. > > With this patch, gcc.target/aarch64/rev16_2.c passes again. > > 2023-05-31 Christophe Lyon > > PR target/110039 > gcc/ > * config/aarch64/

Re: [PATCH] Add COMPLEX_VECTOR_INT modes

Richard Biener via Gcc-patches writes: > On Fri, May 26, 2023 at 4:35 PM Andrew Stubbs wrote: >> >> Hi all, >> >> I want to implement a vector DIVMOD libfunc for amdgcn, but I can't just >> do it because the GCC middle-end models DIVMOD's return value as >> "complex int" type, and there are no ve

[PATCH v2] aarch64: Add pattern for bswap + rotate [PR 110039]

After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a pattern to match the new GIMPLE form. With this patch, gcc.target/aarch64/rev16_2.c passes again. 2023-05-31 Christophe Lyon PR target/110039 gcc/ * config/aarch64/aarch64.md (aarch64_rev16si2_alt3):

Re: [PATCH] RISC-V: Add testcase for vrsub.vi auto-vectorization

On 5/31/23 04:23, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Apparently, we are missing vrsub.vi tests. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/vsub-run.c: Add vsub.vi. * gcc.target/riscv/rvv/autovec/binop/vsub-rv32gcv.c: Ditto. * gcc.tar

Re: [PATCH] alias: Change return type of predicate functions from int to bool

On 5/31/23 01:51, Uros Bizjak via Gcc-patches wrote: Also remove a bunch of unneeded forward declarations. gcc/ChangeLog: * rtl.h (true_dependence): Change return type from int to bool. (canon_true_dependence): Ditto. (read_dependence): Ditto. (anti_dependence): Ditto.

Re: [PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

On 5/31/23 04:35, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. O

Re: [PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

On 5/31/23 04:47, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Apparently, vfncvt.rod rounding mode is encoded, so we don't need FRM. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. OK jeff

Re: [PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

On 5/31/23 04:43, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt.f.x.v doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove F

Re: [PATCH] emit-rtl: Change return type of predicate functions from int to bool

On 5/31/23 05:06, Uros Bizjak via Gcc-patches wrote: Also fix some stalled comments. gcc/ChangeLog: * rtl.h (subreg_lowpart_p): Change return type from int to bool. (active_insn_p): Ditto. (in_sequence_p): Ditto. (unshare_all_rtl): Change return type from int to void.

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

On 5/31/23 05:55, Robin Dapp wrote: Hi Juzhe, The approach is quite simple and obvious, changing extension pattern into define_insn_and_split will make combine PASS combine into widen operations naturally. looks good to me. Tiny nit: I would add a comment above the patterns to clarify why

[committed] libstdc++: Fix preprocessor conditions for std::from_chars [PR109921]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- We use the from_chars_strtod function with __strtof128 to read a _Float128 value, but from_chars_strtod is not defined unless uselocale is available. This can lead to compilation failures for some targets, because we try to define the _Flaot128

[committed] libstdc++: Deprecate std::setfill for std::basic_istream [PR109922]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- Prior to N0966 (July 1996) the std::setfill manipulator was specified to work with both input and output streams. In the final C++98 standard it is only specified to work with output streams. We have always supported it for input streams, despi

[committed] libstdc++: Add std::numeric_limits<__float128> specialization [PR104772]

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- As suggested by Jakub in the PR, this just hardcodes the constants with a Q suffix, since the properties of __float128 are not going to change. We can only define it for non-strict modes because the suffix gives an error otherwise, even in syst

[committed] libstdc++: Do not include in

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- We previously needed in for the std::lock_error exception class, but that was moved out of in 2009 when it was removed from the C++0x draft. We can stop including now. Move the include for to where it's actually used, and only include in

[committed] libstdc++: Replace obsolete shell syntax in configure.ac

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- The current POSIX standard says that the -a and -o operators to the 'test' utility are obsolete, and the shell operators && and || should be used instead. libstdc++-v3/ChangeLog: * configure.ac: Replace use of -o operator for test.

[committed] libstdc++: Add missing noexcept to std::scoped_allocator_adaptor

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- The standard requires these constructors and accessors to be noexcept. libstdc++-v3/ChangeLog: * include/std/scoped_allocator (scoped_allocator_adaptor): Add noexcept to all constructors except the default constructor.

[committed] libstdc++: Disable embedded tzdata for all 16-bit targets

Tested powerpc64le-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * acinclude.m4 (GLIBCXX_ZONEINFO_DIR): Extend logic for avr and msp430 to all 16-bit targets. * configure: Regenerate. --- libstdc++-v3/acinclude.m4 | 15 +-- libstdc++-v3/configure

Re: [PATCH 1/2] Implementation of new RISCV optimizations pass: fold-mem-offsets.

On Tue, May 30, 2023 at 2:30 AM Jeff Law wrote: > > > > On 5/25/23 08:02, Manolis Tsamis wrote: > > On Thu, May 25, 2023 at 4:53 PM Richard Biener via Gcc-patches > > wrote: > >> > >> On Thu, May 25, 2023 at 3:32 PM Jeff Law via Gcc-patches > >> wrote: > >>> > >>> > >>> > >>> On 5/25/23 07:01, R

Re: Re: [PATCH] VECT: Change flow of decrement IV

Sure. I will repost it with kewen's fix. Previously, this patch I tested on X86 and apply to upstream RVV gcc tested on upstream RVV testsuite. Since the upstream RVV GCC is not ready and fragile, we can't use it compile big program. I will apply this patch on my downstream GCC and do my downstre

Re: [PATCH 2/2] cprop_hardreg: Enable propagation of the stack pointer if possible.

On Thu, May 25, 2023 at 4:38 PM Jeff Law wrote: > > > > On 5/25/23 06:35, Manolis Tsamis wrote: > > Propagation of the stack pointer in cprop_hardreg is currenty forbidden > > in all cases, due to maybe_mode_change returning NULL. Relax this > > restriction and allow propagation when no mode chang

Re: [PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

Hi Juzhe, > The approach is quite simple and obvious, changing extension pattern > into define_insn_and_split will make combine PASS combine into widen > operations naturally. looks good to me. Tiny nit: I would add a comment above the patterns to clarify why insn_and_split instead of expand. S

[PATCH] RISC-V: Add vwadd/vwsub/vwmul/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization

From: Juzhe-Zhong The approach is quite simple and obvious, changing extension pattern into define_insn_and_split will make combine PASS combine into widen operations naturally. gcc/ChangeLog: * config/riscv/autovec.md (2): Change expand into define_insn_and_split. gcc/testsuite/Chan

[PATCH] ipa/109983 - (IPA) PTA speedup

This improves the edge avoidance heuristic by re-ordering the topological sort of the graph to make sure the component with the ESCAPED node is processed first. This improves the number of created edges which directly correlates with the number of bitmap_ior_into calls from 141447426 to 239596 and

[PATCH] IPA PTA stats enhancement and non-details dump slimming

The following keeps track of the number of edges we avoid to create because they redundandly feed ESCAPED. It also avoids printing a header for -details when not using -details. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. * tree-ssa-structalias.cc (constraint_stats::num_

[PATCH] emit-rtl: Change return type of predicate functions from int to bool

Also fix some stalled comments. gcc/ChangeLog: * rtl.h (subreg_lowpart_p): Change return type from int to bool. (active_insn_p): Ditto. (in_sequence_p): Ditto. (unshare_all_rtl): Change return type from int to void. * emit-rtl.h (mem_expr_equal_p): Change return type from int

Re: Re: [PATCH] VECT: Change flow of decrement IV

On Wed, 31 May 2023, juzhe.zh...@rivai.ai wrote: > Thanks Richard. > Seems that this patch's approach is ok to trunk? > Maybe the only thing we should do is to wait Kewen's testing feedback, am I > right ? Can you repost the patch with Kevens fix and state how you tested it? Thanks, Richard.

[PATCH] RISC-V: Remove FRM for vfncvt.rod instruction

From: Juzhe-Zhong Apparently, vfncvt.rod rounding mode is encoded, so we don't need FRM. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/r

[PATCH] RISC-V: Remove FRM for vfwcvt.f.x.v (RVV integer to float widening conversion)

From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt.f.x.v doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 fil

[PATCH] RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)

From: Juzhe-Zhong Base on the discussion here: https://github.com/riscv/riscv-v-spec/issues/884 vfwcvt doesn't depend on FRM. So remove FRM preparing for mode switching support. gcc/ChangeLog: * config/riscv/vector.md: Remove FRM. --- gcc/config/riscv/vector.md | 4 +--- 1 file chan

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