Re: [PATCH V7] VECT: Add decrement IV support in Loop Vectorizer

"juzhe.zh...@rivai.ai" writes: >>> The examples are good, but this one made me wonder: why is the >>> adjustment made to the limit (namely 16, the gap between _39 and _41) >>> different from the limits imposed by the MIN_EXPR (32)? And I think >>> the answer is that: > >>> - _47 counts the number

[PATCH] RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests

From: Pan Li This patch would like to align the stdint.h to the stdint-gcc.h for all the RVV test files. Aka: stdint.h => stdint-gcc.h Signed-off-by: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h: Replace stdint.h with stdint-gcc

[PATCH] s390: Implement TARGET_ATOMIC_ALIGN_FOR_MODE

So far atomic objects are aligned according to their default alignment. For 128 bit scalar types like int128 or long double this results in an 8 byte alignment which is wrong and must be 16 byte. libstdc++ already computes a correct alignment, though, still adding a test case in order to make sure

[PATCH v5 1/4] rs6000: Enable REE pass by default

Hello All: This patch enable ree pass as a default pass for rs6000 target. Bootstrapped and regtested for powerpc64-linux-gnu. Thanks & Regards Ajit rs6000: Enable REE pass by default Add ree pass as a default pass for rs6000 target for O2 and above. 2023-05-16

Re: [Testsuite] Skip -fdelete-null-pointer-check tests if target keeps_null_pointer_checks

On 5/14/23 23:06, SenthilKumar.Selvaraj--- via Gcc-patches wrote: Hi, When running regression tests related to https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616772.html, I noticed a bunch of failures because some tests explicitly pass in -fdelete-null-pointer-checks, even if the targe

Re: Re: [PATCH V7] VECT: Add decrement IV support in Loop Vectorizer

>> The examples are good, but this one made me wonder: why is the >> adjustment made to the limit (namely 16, the gap between _39 and _41) >> different from the limits imposed by the MIN_EXPR (32)? And I think >> the answer is that: >> - _47 counts the number of elements processed by the loop in

Re: [gcc13 backport] RISCV: Inline subword atomic ops

On 5/9/23 10:01, Patrick O'Neill wrote: Ping. OK for backporting. Sorry for the delay. jeff

Re: [PATCH] riscv: Add autovectorization tests for binary integer

On 5/15/23 03:15, juzhe.zh...@rivai.ai wrote: I think it is the issue of include file. Kito may know the better the solution instead of changing stdint.h into stdint-gcc.h. I think that's the only solution right now. I'm not keen to open up the multilib can of worms. Consider a patch tha

Re: [PATCH v9] RISC-V: Add the 'zfa' extension, version 0.2

On 5/15/23 07:16, Jin Ma wrote: This patch adds the 'Zfa' extension for riscv, which is based on: https://github.com/riscv/riscv-isa-manual/commits/zfb The binutils-gdb for 'Zfa' extension: https://sourceware.org/pipermail/binutils/2023-April/127060.html What needs special explanation is: 1,

Re: [PATCH v9] RISC-V: Add the 'zfa' extension, version 0.2

On 5/15/23 07:30, jinma wrote: According to Jeff's review feedback, the issues regarding UNSPEC's implementation of round, ceil, nearbyint, etc. still need to be determined: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/617706.html source: https://github.com/majin2020/gcc-mirror/commit/

Re: [PATCH v8] RISC-V: Add the 'zfa' extension, version 0.2.

On 5/6/23 06:53, jinma wrote: diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md index 9b767038452..c81b08e3cc5 100644 --- a/gcc/config/riscv/iterators.md +++ b/gcc/config/riscv/iterators.md @@ -288,3 +288,8 @@ (define_int_iterator QUIET_COMPARISON [UNSPEC_FLT_QUIET UN

Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

On 5/15/23 07:54, 钟居哲 wrote: I don't know why we should not add frm vfsqrt.v since I saw topper (LLVM maintainer) said we should not add frm into vsqrt.v. Maybe kito knows the reason ? I'm pretty sure this is referring to the estimator. The documentation is very clear that the sqrt estimat

RE: [PATCH V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Tuesday, May 16, 2023 11:27 AM To: juzhe.zh...@rivai.ai; gcc-patches Cc: Kito.cheng ; palmer ; Robin Dapp Subject: Re: [PATCH V2] RISC-V: Add FRM and rounding mode operand int

Re: [PATCH V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics

On 5/15/23 19:02, juzhe.zh...@rivai.ai wrote: Ping。 Is it Ok for trunk ? I have double checked the floating-point instructions needed FRM. Yes, this is OK for the trunk. Thanks, jeff

Re: [PATCH] MATCH: [PR109424] Simplify min/max of boolean arguments

On 5/15/23 19:36, Andrew Pinski via Gcc-patches wrote: This is version 2 of https://gcc.gnu.org/pipermail/gcc-patches/2021-August/577394.html which does not depend on adding gimple_truth_valued_p at this point. Instead will use zero_one_valued_p which is already used for mult simplifications

[PATCH] MATCH: [PR109424] Simplify min/max of boolean arguments

This is version 2 of https://gcc.gnu.org/pipermail/gcc-patches/2021-August/577394.html which does not depend on adding gimple_truth_valued_p at this point. Instead will use zero_one_valued_p which is already used for mult simplifications to make sure that we only have [0,1] rather having the mist

RE: [PATCH v3] Machine_Mode: Extend machine_mode from 8 to 16 bits

Kindly ping for this PATCH v3. Pan -Original Message- From: Li, Pan2 Sent: Saturday, May 13, 2023 9:13 PM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Li, Pan2 ; Wang, Yanzhang ; jeffreya...@gmail.com; rguent...@suse.de; richard.sandif...@arm.com Subjec

RE: [PATCH] RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t

Kindly ping for this PATCH, 😉. Pan From: Li, Pan2 Sent: Monday, May 15, 2023 11:25 AM To: juzhe.zh...@rivai.ai; gcc-patches Cc: Kito.cheng ; Wang, Yanzhang Subject: RE: [PATCH] RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_t Thanks Juzhe. Let’s wait kito’s suggestion. Pan From:

Re: [PATCH V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics

Ping。 Is it Ok for trunk ? I have double checked the floating-point instructions needed FRM. Thanks. juzhe.zh...@rivai.ai From: juzhe.zhong Date: 2023-05-15 22:53 To: gcc-patches CC: kito.cheng; palmer; rdapp.gcc; jeffreyalaw; Juzhe-Zhong Subject: [PATCH V2] RISC-V: Add FRM and rounding mode

[committed] c: Ignore _Atomic on function return type for C2x

For C2x it was decided that _Atomic would be completely ignored on function return types (just as was done for qualifiers in C11 DR#423), to eliminate the potential for an rvalue returned by a function having _Atomic-qualified type when an rvalue resulting from lvalue-to-rvalue conversion could not

[committed] c: Update __has_c_attribute values for C2x

WG14 decided that __has_c_attribute should return the same value (equal to the intended __STDC_VERSION__ value) for all standard attributes in C2x, with values associated with when an attribute was added to the working draft (or had semantics added or changed in the working draft) only being used i

Re: Re: [PATCH V7] VECT: Add decrement IV support in Loop Vectorizer

Hi, Richard. >> Easier to read as: >> _41 = _40 - 16 >> (which might not be valid gimple, but pseudocode is good enough). OK. >> The difficulty with this is that the len_load* and len_store* >>optabs currently say that the behaviour is undefined if the >>length argument is greater than the

[PATCH V9] VECT: Add decrement IV support in Loop Vectorizer

From: Ju-Zhe Zhong his patch implement decrement IV for length approach in loop control. Address comment from kewen that incorporate the implementation inside "vect_set_loop_controls_directly" instead of a standalone function. Address comment from Richard using MIN_EXPR to handle these 3 follow

Re: [PATCH] Turn on LRA on all targets

"Maciej W. Rozycki" writes: > On Sun, 23 Apr 2023, Segher Boessenkool wrote: > >> > There are extra ICEs in regression testing and code quality is poor; cf. >> > . >> >> Do you have something you can show for this? Maybe i

Re: [PATCH] Turn on LRA on all targets

On Sun, 23 Apr 2023, Segher Boessenkool wrote: > > There are extra ICEs in regression testing and code quality is poor; cf. > > . > > Do you have something you can show for this? Maybe in a PR? I have filed no PRs as I did

Re: [PATCH 0/3] Refactor memory block operations

On 5/15/23 09:17, Stefan Schulze Frielinghaus wrote: > Bootstrapped and regtested. Ok for mainline? > > Stefan Schulze Frielinghaus (3): > s390: Refactor block operation cpymem > s390: Add block operation movmem > s390: Refactor block operation setmem > > gcc/config/s390/s390-protos.h

Re: [PATCH] aarch64: Add SVE instruction types

Hi, Kyrill. I wasn’t aware of your previous patch. Could you clarify why you considered creating an SVE specific type attribute instead of reusing the common one? I really liked the iterators that you created; I’d like to use them. Do you have specific examples which you might want to mention

Re: [PATCH] aarch64: Add SVE instruction types

Hi, Richard. My criteria were very much (a). In some cases though, a particular instruction could have variations that others in its natural group didn’t, when if seemed sensible to create a specific description for this instruction, even if its base form shares resources with other instructio

Re: [PATCH v2] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer

On Thu, May 11, 2023 at 1:52 PM Jonathan Wakely wrote: > On Thu, 11 May 2023 at 13:42, Jonathan Wakely wrote: > >> >> >> On Thu, 11 May 2023 at 13:19, Mike Crowe wrote: >> >>> However, ... >>> >>> > > diff --git a/libstdc++-v3/acinclude.m4 b/libstdc++-v3/acinclude.m4 >>> > > index 89e7f5f5f45..

Re: [PATCH V7] VECT: Add decrement IV support in Loop Vectorizer

juzhe.zh...@rivai.ai writes: > From: Juzhe-Zhong > > This patch implement decrement IV for length approach in loop control. > > Address comment from kewen that incorporate the implementation inside > "vect_set_loop_controls_directly" instead of a standalone function. > > Address comment from Richa

Back to requiring "Perl version 5.6.1 (or later)" [PR82856] (was: Update GCC to autoconf 2.69, automake 1.15.1)

Hi! On 2018-10-31T17:04:46+, Joseph Myers wrote: > On Wed, 31 Oct 2018, Thomas Koenig wrote: >> Am 31.10.18 um 04:26 schrieb Joseph Myers: >> > This patch (diffs to generated files omitted below) updates GCC to use >> > autoconf 2.69 and automake 1.15.1. >> >> I think this should fix PR 82856

Re: [aarch64] Code-gen for vector initialization involving constants

Prathamesh Kulkarni writes: > Hi Richard, > After committing the interleave+zip1 patch for vector initialization, > it seems to regress the s32 case for this patch: > > int32x4_t f_s32(int32_t x) > { > return (int32x4_t) { x, x, x, 1 }; > } > > code-gen: > f_s32: > moviv30.2s, 0x1 >

Ping: [PATCH V5] PR target/105325: Fix constraint issue with power10 fusion

Ping both patches: Patch #1, rewrite genfusion.pl's code for load and compare immediate fusion to be more readable. This patch produces the same output as the current sources. | Date: Wed, 10 May 2023 11:38:55 -0400 | Subject: Re: [PATCH V5, 1/2] PR target/105325: Rewrite genfusion.pl's gen_ld_

Re: Question on patch -fprofile-partial-training

> On May 11, 2023, at 12:08 PM, Qing Zhao via Gcc-patches > wrote: > > > >> On May 10, 2023, at 9:15 AM, Jan Hubicka wrote: >> >>> Honza, Main motivation for this was profiling programs that contain specific code paths for different CPUs (such as graphics library in Firefox or Li

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On 5/15/23 17:07, Aldy Hernandez wrote: On 5/15/23 12:42, Jakub Jelinek wrote: On Mon, May 15, 2023 at 12:35:23PM +0200, Aldy Hernandez wrote: gcc/ChangeLog: PR tree-optimization/109695 * value-range.cc (irange::operator=): Resize range. (irange::union_): Same. (irange::inter

[patch,avr] Fix PR109650 wrong code

This patch fixes a wrong-code bug in the wake of PR92729, the transition that turned the AVR backend from cc0 to CCmode. In cc0, the insn that uses cc0 like a conditional branch always follows the cc0 setter, which is no more the case with CCmode where set and use of REG_CC might be in different

Re: [COMMITTED] Remove deprecated range_fold_{unary, binary}_expr uses from ipa-*.

On 5/5/23 17:10, Martin Jambor wrote: Hello, On Wed, Apr 26 2023, Aldy Hernandez via Gcc-patches wrote: gcc/ChangeLog: * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API. (ipa_value_range_from_jfunc): Same. (propagate_vr_across_jump_function): Sam

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On Mon, May 15, 2023 at 5:03 PM Aldy Hernandez wrote: > > > > On 5/15/23 13:08, Richard Biener wrote: > > On Mon, May 15, 2023 at 12:35 PM Aldy Hernandez wrote: > >> > >> > >> We can now have int_range for automatically > >> resizable ranges. int_range_max is now int_range<3, true> > >> for a 6

Re: For GCC, newlib combined tree, newlib build-tree testing, use standard search paths

Sounds fine Thomas. Thanks. -- Jeff J. On Mon, May 15, 2023 at 4:01 AM Thomas Schwinge wrote: > Hi! > > On 2023-05-08T21:50:56+0200, I wrote: > > Ping: OK to push to newlib main branch the attached > > "For GCC, newlib combined tree, newlib build-tree testing, use standard > search paths"? > >

Re: [PATCH] c++: add feature-test macro for auto(x)

On Mon, May 15, 2023 at 11:43 AM Jakub Jelinek wrote: > > On Mon, May 15, 2023 at 11:41:46AM -0400, Jason Merrill via Gcc-patches wrote: > > On 5/15/23 11:24, Patrick Palka wrote: > > > This adds the feature-test macro for PR0849R8, as per > > > https://github.com/cplusplus/CWG/issues/281. > > > >

Re: [PATCH] c++: add feature-test macro for auto(x)

On Mon, May 15, 2023 at 11:41:46AM -0400, Jason Merrill via Gcc-patches wrote: > On 5/15/23 11:24, Patrick Palka wrote: > > This adds the feature-test macro for PR0849R8, as per > > https://github.com/cplusplus/CWG/issues/281. > > > > Tested on x86_64-pc-linux-gnu, does this look OK for trunk/13?

Re: [PATCH] c++: add feature-test macro for auto(x)

On 5/15/23 11:24, Patrick Palka wrote: This adds the feature-test macro for PR0849R8, as per https://github.com/cplusplus/CWG/issues/281. Tested on x86_64-pc-linux-gnu, does this look OK for trunk/13? OK. gcc/c-family/ChangeLog: * c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_au

[PATCH] c++: add feature-test macro for auto(x)

This adds the feature-test macro for PR0849R8, as per https://github.com/cplusplus/CWG/issues/281. Tested on x86_64-pc-linux-gnu, does this look OK for trunk/13? gcc/c-family/ChangeLog: * c-cppbuiltin.cc (c_cpp_builtins): Predefine __cpp_auto_cast for C++23. gcc/testsuite/Change

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On 5/15/23 12:42, Jakub Jelinek wrote: On Mon, May 15, 2023 at 12:35:23PM +0200, Aldy Hernandez wrote: gcc/ChangeLog: PR tree-optimization/109695 * value-range.cc (irange::operator=): Resize range. (irange::union_): Same. (irange::intersect): Same. (ir

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On 5/15/23 13:08, Richard Biener wrote: On Mon, May 15, 2023 at 12:35 PM Aldy Hernandez wrote: We can now have int_range for automatically resizable ranges. int_range_max is now int_range<3, true> for a 69X reduction in size from current trunk, and 6.9X reduction from GCC12. This incurs a

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

Thanks. https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618614.html here is the V2 patch. I have description about instructions are adding FRM or not. Would you mind check it again now? juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:41 To: 钟居哲 CC: Jeff Law; gcc-patches; kito.che

[PATCH V2] RISC-V: Add FRM and rounding mode operand into floating point intrinsics

From: Juzhe-Zhong This patch is adding rounding mode operand and FRM_REGNUM dependency into floating-point instructions. The floating-point instructions we added FRM and rounding mode operand: 1. vfadd/vfsub 2. vfwadd/vfwsub 3. vfmul 4. vfdiv 5. vfwmul 6. vfwmacc/vfwnmacc/vfwmsac/vfwnmsac 7. vfs

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

all sign injection operations (vfsgnjn/ vfsgnj/vfsgnjx and its friends) didn't involve rounding in the operation, so vfneg.v and vfabs.v don't need FRM. On Mon, May 15, 2023 at 10:38 PM 钟居哲 wrote: > > And what about vfabs ? I guess it also need FRM ? > vfneg/vfabs/vfsgnj/vfsgnj/vfsgnjx > vfneg.v

Re: [pushed] c++: fix TTP level reduction cache

On Wed, 3 May 2023, Jason Merrill via Gcc-patches wrote: > Tested x86_64-pc-linux-gnu, applying to trunk. > > -- 8< -- > > We try to cache the result of reduce_template_parm_level so that when we > reduce the same parm multiple times we get the same result, but this wasn't > working for template

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

And what about vfabs ? I guess it also need FRM ? vfneg/vfabs/vfsgnj/vfsgnj/vfsgnjx vfneg.v vd,vs = vfsgnjn.vv vd,vs,vs vfabs.v vd,vs = vfsgnjx.vv vd,vs,vs That's all questions I have, plz double check for me. Thanks. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:22 To: 钟居哲 CC: Jef

Re: [PATCH 2/2] ivopts: Revert register pressure cost when there are enough registers.

Hi Richard, I had pinged the community about this problem back in March, and I will be taking Dimitrije's place, considering he isn't working on these patches anymore. Your solution for 2/2 seems reasonable, I don't exactly know why target_reg_cost hasn't been accounted for in the first case, no

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

The reason I ask vfsgnjn since according to RVV ISA: vfneg.v vd,vs = vfsgnjn.vv vd,vs,vs. It's really confusing here that document has FRM in vfneg but no FRM in vfsgnjn ? It's really odd here. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:22 To: 钟居哲 CC: Jeff Law; gcc-patches; kit

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On 5/15/23 16:24, Bernhard Reutner-Fischer wrote: On Mon, 15 May 2023 12:35:23 +0200 Aldy Hernandez via Gcc-patches wrote: +// For resizable ranges, resize the range up to HARD_MAX_RANGES if the +// NEEDED pairs is greater than the current capacity of the range. + +inline void +irange::mayb

RE: [PATCH V3] RISC-V: Add rounding mode operand for fixed-point patterns

Committed, thanks Jeff. Pan -Original Message- From: Gcc-patches On Behalf Of Jeff Law via Gcc-patches Sent: Monday, May 15, 2023 9:42 PM To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com; pal...@rivosinc.com; rdapp...

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On Mon, 15 May 2023 12:35:23 +0200 Aldy Hernandez via Gcc-patches wrote: > +// For resizable ranges, resize the range up to HARD_MAX_RANGES if the > +// NEEDED pairs is greater than the current capacity of the range. > + > +inline void > +irange::maybe_resize (int needed) > +{ > + if (!m_resizab

Re: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics

Kyrylo Tkachov writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Monday, May 15, 2023 3:18 PM >> To: Kyrylo Tkachov >> Cc: gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics >> >> Kyrylo Tkachov writes: >> > Hi Richar

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

What about vfsnjn ? Do they have FRM ? I want to double check it since I don't trust document. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:22 To: 钟居哲 CC: Jeff Law; gcc-patches; kito.cheng; palmer; palmer; rdapp.gcc Subject: Re: Re: [PATCH] RISC-V: Add rounding mode operand for f

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

> Oh, do you mean vfsqrt7/vfrec7 doesn't have frm, but vfsqrt/vfneg should have > frm. > Is that rigth? If yes, I am gonna send a patch to fix it immediately. Yes, and I also double checked spike implementation :P and it seems like you're not committed yet, so let's send V2 :) On Mon, May 15, 2

RE: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics

> -Original Message- > From: Richard Sandiford > Sent: Monday, May 15, 2023 3:18 PM > To: Kyrylo Tkachov > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics > > Kyrylo Tkachov writes: > > Hi Richard, > > > >> -Original Mess

Re: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics

Kyrylo Tkachov writes: > Hi Richard, > >> -Original Message- >> From: Gcc-patches > bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Richard >> Sandiford via Gcc-patches >> Sent: Tuesday, May 9, 2023 7:48 AM >> To: gcc-patches@gcc.gnu.org >> Cc: Richard Sandiford >> Subject: [PATC

RE: [PATCH] OPTABS: Extend the number of expanding instructions pattern.

Committed, thanks Richard. Pan -Original Message- From: Gcc-patches On Behalf Of Richard Biener via Gcc-patches Sent: Monday, May 15, 2023 8:52 PM To: Juzhe-Zhong Cc: gcc-patches@gcc.gnu.org; richard.guent...@gmail.com Subject: Re: [PATCH] OPTABS: Extend the number of expanding instruc

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

Oh, do you mean vfsqrt7/vfrec7 doesn't have frm, but vfsqrt/vfneg should have frm. Is that rigth? If yes, I am gonna send a patch to fix it immediately. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:07 To: 钟居哲 CC: Jeff Law; gcc-patches; kito.cheng; palmer; palmer; rdapp.gcc Subjec

Re: [aarch64] Code-gen for vector initialization involving constants

On Fri, 12 May 2023 at 00:45, Richard Sandiford wrote: > > Prathamesh Kulkarni writes: > > > On Tue, 2 May 2023 at 18:22, Richard Sandiford > > wrote: > >> > >> Prathamesh Kulkarni writes: > >> > On Tue, 2 May 2023 at 17:32, Richard Sandiford > >> > wrote: > >> >> > >> >> Prathamesh Kulkarni

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

So, you mean I also need to add frm into vsqrt? If yes, I am now send another patch to add it. juzhe.zh...@rivai.ai From: Kito Cheng Date: 2023-05-15 22:07 To: 钟居哲 CC: Jeff Law; gcc-patches; kito.cheng; palmer; palmer; rdapp.gcc Subject: Re: Re: [PATCH] RISC-V: Add rounding mode operand for f

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

Oh, Craig says vfrsqrt7.v not have frm but vsqrt.v have frm, and checked spike that match that. On Mon, May 15, 2023 at 9:55 PM 钟居哲 wrote: > > I don't know why we should not add frm vfsqrt.v since I saw topper (LLVM > maintainer) said we should > not add frm into vsqrt.v. Maybe kito knows the re

RE: [PATCH 2/6] aarch64: Allow moves after tied-register intrinsics

Hi Richard, > -Original Message- > From: Gcc-patches bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Richard > Sandiford via Gcc-patches > Sent: Tuesday, May 9, 2023 7:48 AM > To: gcc-patches@gcc.gnu.org > Cc: Richard Sandiford > Subject: [PATCH 2/6] aarch64: Allow moves after t

Re: [PATCH RFC] c-family: make -fno-permissive upgrade pedwarns

On 5/15/23 03:32, Richard Biener wrote: On Fri, May 12, 2023 at 10:54 PM Jason Merrill via Gcc-patches wrote: In the context of the recent discussion, it occurred to me that this semantic would be useful, but currently there is no easy way to access it. Bikeshedding welcome; the use of this f

Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

I don't know why we should not add frm vfsqrt.v since I saw topper (LLVM maintainer) said we should not add frm into vsqrt.v. Maybe kito knows the reason ? https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226 juzhe.zh...@rivai.ai From: Jeff Law Date: 2023-05-15 21:52 To: juzhe.zhong

Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

On 5/15/23 07:44, Kito Cheng wrote: LGTM Agreed. jeff

Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

On 5/15/23 05:49, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong This patch is adding rounding mode operand and FRM_REGNUM dependency into floating-point instructions. The floating-point instructions we added FRM and rounding mode operand: 1. vfadd/vfsub 2. vfwadd/vfwsub 3. vfmul 4. vfdiv 5.

Re: [PATCH] RISC-V: Add rounding mode operand for floating point instructions

LGTM 於 2023年5月15日 週一，19:50寫道： > From: Juzhe-Zhong > > This patch is adding rounding mode operand and FRM_REGNUM dependency > into floating-point instructions. > > The floating-point instructions we added FRM and rounding mode operand: > 1. vfadd/vfsub > 2. vfwadd/vfwsub > 3. vfmul > 4. vfdiv > 5

Re: [PATCH] RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions

On 5/15/23 06:22, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong This patch is adding FRM and rounding mode into floating-point ternary instructions. This patch should be merged after optabs.cc patch. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_expander::use_

Re: [PATCH V3] RISC-V: Add rounding mode operand for fixed-point patterns

On 5/15/23 04:25, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong Since we are going to have fixed-point intrinsics that are modeling rounding mode https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/222 We should have operand to specify rounding mode in fixed-point instructions. We don'

Re: [PATCH] Fix assertion for unwind-dw2-fde.c btree changes

On 5/15/23 07:05, Thomas Neumann via Gcc-patches wrote: Hello, this patch breaks the build on targets where range is not declared i.e. where the #ifdef ATOMIC_FDE_FAST_PATH path is not taken. argh, I did not realize I tested the patch only on atomic fast path platforms. The patch below fixe

Re: [PATCH v9] RISC-V: Add the 'zfa' extension, version 0.2

According to Jeff's review feedback, the issues regarding UNSPEC's implementation of round, ceil, nearbyint, etc. still need to be determined: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/617706.html source: https://github.com/majin2020/gcc-mirror/commit/93d7a2d995cee588d494d1839f56e8151c6

RE: [PATCH] Fix assertion for unwind-dw2-fde.c btree changes

> -Original Message- > From: Thomas Neumann > Sent: Monday, May 15, 2023 2:06 PM > To: Kyrylo Tkachov ; Richard Biener > > Cc: Sören Tempel ; gcc-patches@gcc.gnu.org; > al...@ayaya.dev > Subject: Re: [PATCH] Fix assertion for unwind-dw2-fde.c btree changes > > > Hello, this patch break

[PATCH v9] RISC-V: Add the 'zfa' extension, version 0.2

This patch adds the 'Zfa' extension for riscv, which is based on: https://github.com/riscv/riscv-isa-manual/commits/zfb The binutils-gdb for 'Zfa' extension: https://sourceware.org/pipermail/binutils/2023-April/127060.html What needs special explanation is: 1, The immediate number of the instruct

RE: middle-end: Support early break/return auto-vectorization.

Hi, Yes I hope to upstream it this year. I'm busy cleaning up a new version of the patch which and hope to send it up for review again next week if all tests pass. Cheers, Tamar From: juzhe.zh...@rivai.ai Sent: Monday, May 15, 2023 6:20 AM To: gcc-patches Cc: rguenther ; Tamar Christina ; Ri

Re: [PATCH 1/2] PR gcc/98350:Add a param to control the length of the chain with FMA in reassoc pass

On Fri, May 12, 2023 at 11:05 AM Cui, Lili wrote: > > > ISTR there were no sufficient comments in the code explaining why > > rewrite_expr_tree_parallel_for_fma is better by design. In fact ... > > > > > > > > > > > > > > if (!reassoc_insert_powi_p > > > > > -

Re: [PATCH] Fix assertion for unwind-dw2-fde.c btree changes

Hello, this patch breaks the build on targets where range is not declared i.e. where the #ifdef ATOMIC_FDE_FAST_PATH path is not taken. argh, I did not realize I tested the patch only on atomic fast path platforms. The patch below fixes that by moving the check inside the #ifdef. I will chec

Re: [PATCH] OPTABS: Extend the number of expanding instructions pattern.

On Mon, 15 May 2023, juzhe.zh...@rivai.ai wrote: > From: Juzhe-Zhong > > Hi, Richi. > > We (RVV) is going to add a rounding mode operand into floating-point > instructions > which have 11 operands. > > Since we are going have intrinsic that is adding rounding mode argument: > https://github.c

RE: [PATCH] Fix assertion for unwind-dw2-fde.c btree changes

> -Original Message- > From: Gcc-patches bounces+kyrylo.tkachov=arm@gcc.gnu.org> On Behalf Of Richard Biener > via Gcc-patches > Sent: Monday, May 15, 2023 8:59 AM > To: Thomas Neumann > Cc: Sören Tempel ; gcc-patches@gcc.gnu.org; > al...@ayaya.dev > Subject: Re: [PATCH] Fix asserti

RE: [PATCH] vect: Missed opportunity to use [SU]ABD

From: Oluwatamilore Adebayo Sent: Wednesday, May 10, 2023 14:29 To: Richard Biener ; gcc-patches@gcc.gnu.org; Richard Sandiford Subject: Re: [PATCH] vect: Missed opportunity to use [SU]ABD When using inputs of 0x7fff and 0x8000 the result yielded is -1. When using inputs of -1 and 0x7fff the

Re: [PATCH 2/2] ivopts: Revert register pressure cost when there are enough registers.

On Mon, May 15, 2023 at 12:44 PM Richard Biener wrote: > > On Wed, Dec 21, 2022 at 2:12 PM Dimitrije Milošević > wrote: > > > > When there are enough registers, the register pressure cost is > > unnecessarily bumped by adding another n_cands. > > > > This behavior may result in register pressure

[PATCH] OPTABS: Extend the number of expanding instructions pattern.

From: Juzhe-Zhong Hi, Richi. We (RVV) is going to add a rounding mode operand into floating-point instructions which have 11 operands. Since we are going have intrinsic that is adding rounding mode argument: https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226 This is the patch that is

[PATCH] RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions

From: Juzhe-Zhong This patch is adding FRM and rounding mode into floating-point ternary instructions. This patch should be merged after optabs.cc patch. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_expander::use_ternop_insn): Add default rounding mode. * c

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

On Mon, 15 May 2023, Andre Vieira (lists) wrote: > > > On 15/05/2023 12:01, Richard Biener wrote: > > On Mon, 15 May 2023, Richard Sandiford wrote: > > > >> Richard Biener writes: > >>> On Fri, 12 May 2023, Richard Sandiford wrote: > >>> > Richard Biener writes: > > On Fri, 12 May 20

[PATCH] RISC-V: Add FRM and rounding mode operand into floating-point ternary instructions

From: Juzhe-Zhong This patch is adding FRM and rounding mode into floating-point ternary instructions. This patch should be merged after optabs.cc patch. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_expander::use_ternop_insn): Add default rounding mode. * c

Re: [PATCH v2] libstdc++: Do not use pthread_mutex_clocklock with ThreadSanitizer

On Friday 12 May 2023 at 11:32:56 +0100, Jonathan Wakely wrote: > On Fri, 12 May 2023 at 11:30, Mike Crowe wrote: > > On Thursday 11 May 2023 at 21:52:22 +0100, Jonathan Wakely wrote: > > > On Thu, 11 May 2023 at 13:42, Jonathan Wakely > > wrote: > > > > On Thu, 11 May 2023 at 13:19, Mike Crowe

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

On 15/05/2023 12:01, Richard Biener wrote: On Mon, 15 May 2023, Richard Sandiford wrote: Richard Biener writes: On Fri, 12 May 2023, Richard Sandiford wrote: Richard Biener writes: On Fri, 12 May 2023, Andre Vieira (lists) wrote: I have dealt with, I think..., most of your comments. T

[PATCH] RISC-V: Add rounding mode operand for floating point instructions

From: Juzhe-Zhong This patch is adding rounding mode operand and FRM_REGNUM dependency into floating-point instructions. The floating-point instructions we added FRM and rounding mode operand: 1. vfadd/vfsub 2. vfwadd/vfwsub 3. vfmul 4. vfdiv 5. vfwmul 6. vfwmacc/vfwnmacc/vfwmsac/vfwnmsac 7. vfs

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On Mon, May 15, 2023 at 01:08:51PM +0200, Richard Biener wrote: > Btw, why's there a trailing underscore for union but not intersect? Because union is a C++ keyword, while intersect is not. Jakub

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

Richard Biener writes: > On Mon, 15 May 2023, Richard Sandiford wrote: > >> Richard Biener writes: >> > But I'm also not sure >> > how much of that is really needed (it seems to be tied around >> > optimizing optabs space?) >> >> Not sure what you mean by "this". Optabs space shouldn't be a pro

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On Mon, May 15, 2023 at 12:35 PM Aldy Hernandez wrote: > > > We can now have int_range for automatically > resizable ranges. int_range_max is now int_range<3, true> > for a 69X reduction in size from current trunk, and 6.9X reduction from > GCC12. This incurs a 5% performance penalty for VRP th

[PATCH][committed] aarch64: Cost vector comparisons more accurately

Hi all, We are missing cases for combining of FACGE/FACGT instructions. In the testcase of the patch we generate: foo: fabsv3.4s, v0.4s fabsv0.4s, v1.4s fabsv1.4s, v2.4s fcmgt v0.4s, v3.4s, v0.4s fcmgt v1.4s, v3.4s, v1.4s b g

Re: [PATCH 0/7] openmp: OpenMP 5.1 loop transformation directives

On Mon, May 15, 2023 at 12:19:00PM +0200, Jakub Jelinek via Gcc-patches wrote: > For C++ in templates we obviously need to defer that until instantiations, > the constants in the clauses etc. could be template parameters etc. Even in C++ the how many canonical loop nest form loops does this transf

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

On Mon, 15 May 2023, Richard Sandiford wrote: > Richard Biener writes: > > On Fri, 12 May 2023, Richard Sandiford wrote: > > > >> Richard Biener writes: > >> > On Fri, 12 May 2023, Andre Vieira (lists) wrote: > >> > > >> >> I have dealt with, I think..., most of your comments. There's quite a >

Re: [PATCH 2/3] Refactor widen_plus as internal_fn

Richard Biener writes: > On Fri, 12 May 2023, Richard Sandiford wrote: > >> Richard Biener writes: >> > On Fri, 12 May 2023, Andre Vieira (lists) wrote: >> > >> >> I have dealt with, I think..., most of your comments. There's quite a few >> >> changes, I think it's all a bit simpler now. I made s

Re: [PATCH 2/2] ivopts: Revert register pressure cost when there are enough registers.

On Wed, Dec 21, 2022 at 2:12 PM Dimitrije Milošević wrote: > > When there are enough registers, the register pressure cost is > unnecessarily bumped by adding another n_cands. > > This behavior may result in register pressure costs for the case > when there are enough registers being higher than f

Re: [PATCH] Add auto-resizing capability to irange's [PR109695]

On Mon, May 15, 2023 at 12:35:23PM +0200, Aldy Hernandez wrote: > gcc/ChangeLog: > > PR tree-optimization/109695 > * value-range.cc (irange::operator=): Resize range. > (irange::union_): Same. > (irange::intersect): Same. > (irange::invert): Same. > (int_range_m

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