all sign injection operations (vfsgnjn/ vfsgnj/vfsgnjx and its friends) didn't involve rounding in the operation, so vfneg.v and vfabs.v don't need FRM.
On Mon, May 15, 2023 at 10:38 PM 钟居哲 <juzhe.zh...@rivai.ai> wrote: > > And what about vfabs ? I guess it also need FRM ? > vfneg/vfabs/vfsgnj/vfsgnj/vfsgnjx > vfneg.v vd,vs = vfsgnjn.vv vd,vs,vs > vfabs.v vd,vs = vfsgnjx.vv vd,vs,vs > > That's all questions I have, plz double check for me. > Thanks. > > > juzhe.zh...@rivai.ai > > From: Kito Cheng > Date: 2023-05-15 22:22 > To: 钟居哲 > CC: Jeff Law; gcc-patches; kito.cheng; palmer; palmer; rdapp.gcc > Subject: Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating point > instructions > > Oh, do you mean vfsqrt7/vfrec7 doesn't have frm, but vfsqrt/vfneg should > > have frm. > > Is that rigth? If yes, I am gonna send a patch to fix it immediately. > > Yes, and I also double checked spike implementation :P > > and it seems like you're not committed yet, so let's send V2 :) > > On Mon, May 15, 2023 at 10:12 PM 钟居哲 <juzhe.zh...@rivai.ai> wrote: > > > > Oh, do you mean vfsqrt7/vfrec7 doesn't have frm, but vfsqrt/vfneg should > > have frm. > > Is that rigth? If yes, I am gonna send a patch to fix it immediately. > > > > > > > > juzhe.zh...@rivai.ai > > > > From: Kito Cheng > > Date: 2023-05-15 22:07 > > To: 钟居哲 > > CC: Jeff Law; gcc-patches; kito.cheng; palmer; palmer; rdapp.gcc > > Subject: Re: Re: [PATCH] RISC-V: Add rounding mode operand for floating > > point instructions > > Oh, Craig says vfrsqrt7.v not have frm but vsqrt.v have frm, and > > checked spike that match that. > > > > On Mon, May 15, 2023 at 9:55 PM 钟居哲 <juzhe.zh...@rivai.ai> wrote: > > > > > > I don't know why we should not add frm vfsqrt.v since I saw topper (LLVM > > > maintainer) said we should > > > not add frm into vsqrt.v. Maybe kito knows the reason ? > > > > > > https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226 > > > > > > > > > > > > > > > juzhe.zh...@rivai.ai > > > > > > From: Jeff Law > > > Date: 2023-05-15 21:52 > > > To: juzhe.zhong; gcc-patches > > > CC: kito.cheng; kito.cheng; palmer; palmer; rdapp.gcc > > > Subject: Re: [PATCH] RISC-V: Add rounding mode operand for floating point > > > instructions > > > > > > > > > On 5/15/23 05:49, juzhe.zh...@rivai.ai wrote: > > > > From: Juzhe-Zhong <juzhe.zh...@rivai.ai> > > > > > > > > This patch is adding rounding mode operand and FRM_REGNUM dependency > > > > into floating-point instructions. > > > > > > > > The floating-point instructions we added FRM and rounding mode operand: > > > > 1. vfadd/vfsub > > > > 2. vfwadd/vfwsub > > > > 3. vfmul > > > > 4. vfdiv > > > > 5. vfwmul > > > > 6. vfwmacc/vfwnmacc/vfwmsac/vfwnmsac > > > > 7. vfsqrt7/vfrec7 > > > > 8. floating-point conversions. > > > > 9. floating-point reductions. > > > > > > > > The floating-point instructions we did NOT add FRM and rounding mode > > > > operand: > > > > 1. vfsqrt/vfneg > > > Assuming vfsqrt is actually an estimator the best place to handle > > > rounding modes is at the last step(s) after N-R or Goldschmidt > > > refinement steps. I haven't paid too much attention to FP yet, but this > > > is an area I've got fairly extensive experience. > > > > > > Sadly RISC-V's estimator is fairly poor and the single instance FMACs > > > are going to result in an implementation that may not actually be any > > > better than what glibc can do. > > > > > > Jeff > > > > > >
